TWI267331B - Multilayer wiring board, semiconductor device mounting board using same, and method of manufacturing multilayer wiring board - Google Patents
Multilayer wiring board, semiconductor device mounting board using same, and method of manufacturing multilayer wiring board Download PDFInfo
- Publication number
- TWI267331B TWI267331B TW92102163A TW92102163A TWI267331B TW I267331 B TWI267331 B TW I267331B TW 92102163 A TW92102163 A TW 92102163A TW 92102163 A TW92102163 A TW 92102163A TW I267331 B TWI267331 B TW I267331B
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- Taiwan
- Prior art keywords
- substrate
- wiring
- wiring board
- resin
- temperature
- Prior art date
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4632—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating thermoplastic or uncured resin sheets comprising printed circuits without added adhesive materials between the sheets
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
- H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
- H05K3/041—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by using a die for cutting the conductive material
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
- H05K3/1258—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by using a substrate provided with a shape pattern, e.g. grooves, banks, resist pattern
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
- H05K3/4617—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar single-sided circuit boards
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0102—Calcium [Ca]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
- H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
- H05K1/0373—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement containing additives, e.g. fillers
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
- H05K1/092—Dispersed materials, e.g. conductive pastes or inks
- H05K1/095—Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0104—Properties and characteristics in general
- H05K2201/0129—Thermoplastic polymer, e.g. auto-adhesive layer; Shaping of thermoplastic polymer
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/0154—Polyimide
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0203—Fillers and particles
- H05K2201/0206—Materials
- H05K2201/0209—Inorganic, non-metallic particles
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0352—Differences between the conductors of different layers of a multilayer
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0388—Other aspects of conductors
- H05K2201/0391—Using different types of conductors
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
- H05K2203/0108—Male die used for patterning, punching or transferring
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/06—Lamination
- H05K2203/065—Binding insulating layers without adhesive, e.g. by local heating or welding, before lamination of the whole PCB
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
- H05K3/045—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by making a conductive layer having a relief pattern, followed by abrading of the raised portions
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
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Description
1267331 五、發明說明（1) [發明所屬技術領域] 本發明係關於一種多層配線基板及使用該多層配線基 板之半導體裝置裝載基板，以及多層配線基板之製造方法 者。 [先前技術] 隨著近年來電子機器之小型化、多功能化，對於裝載 於電子機器之安裝基板，亦要求安裝更高密度之電子零 件。該安裝基板為了高密度地安裝電子零件，不僅電子零 件小型化，亦要求對印刷配線基板微細且高精密度之配線 加工。 另一方面，最近為了減低環境負擔，亦必須考慮關於 上述安裝基板之回收。因此，以熱可塑性樹脂為主要材料 之配線基板便受到矚目。 該配線基板係使用稱為超級工業塑膠之耐熱性優良的 熱可塑性樹脂者，不僅可做微細且高精確度之加工配線， 且具有高機械性強度、優良的電性絕緣性等特徵，而且具 有較容易回收等各種優點，因此為了對應配線之高密度 化，而進行研究一種使用高耐熱性之熱可塑性樹脂為印刷 配線基板之基板材料。 且，適合該基板材料之熱可塑性樹脂可例舉如液晶聚 合物或熱可塑性聚亞醯胺等。 在使用該熱可塑性樹脂之印刷配線基板中，和習知泛 用之印刷配線基板相同，在印刷配線基板上方層疊有銅 箔，接著，藉由濕式蝕刻等將前述銅箔蝕刻加工而形成配
314367.ptd 第11頁 1267331 五、發明說明（2) 線圖案，即所謂濕式製程，而在印刷配線基板上形成特定 之配線電路。 且，在印刷配線基板上形成配線電路之另一方法，係 藉由乾式製程形成配線電路之方法。 該方法係使用網版印刷法或定量法等，在印刷配線基 板上印刷特定配線圖案之導電膠，藉由熱處理該導電膠之 方式，在印刷配線基板上形成特定之配線電路。 印刷該導電膠之方法和習知之蝕刻加工銅箔之方法比 較，由於不須濕式蝕刻步驟，因此製造步驟可轉換成乾式 步驟，因而，具有更利於環境之優點。 該熱可塑性樹脂為謀求步驟過程之縮短化，而有效利 用該優良成形性或可塑性之優點，可視為最佳材料之基板 材料。 在習知之高对熱性之熱可塑性樹脂中，有利於為高而才 熱性基板材料的部分，當層疊該熱可塑性樹脂成一體化 時，必須加熱至該樹脂之溶點附近而熱溶接，但該加熱、 熱溶接時，會有溶點附近之彈性率大幅降低所造成的樹脂 流動使構成配線電路之導體產生歪曲之問題點。 另一方面，由於習知之印刷配線基板之製造線係適於 多量少樣之製造線，因此生產設備有加大之傾向。且，印 刷配線基板上形成配線電路時，一般使用化學蝕刻（濕式 蝕刻）或電鍍法，但就環境負擔之點來說並不佳。 且如上述，藉由乾式製程形成配線之方法可例舉如使 用導電膠之網版印刷法或定量法，但任一方法均對實現要
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314367.ptd 第12頁 1267331 五、發明說明（8) 線基板。且，在製造過程中，藉由採用藉由導電膠而以電 性方式連接之乾式製程的方式，不須藉由濕式製程形成配 線步驟，會減少製造過程中對環境方面的負擔。 [實施方式] 以下說明本發明之多層配線基板及使用該多層配線基 板之半導體裝置裝載基板，以及多層配線基板之製造方法 的各實施型態。 (第1實施型態） 第1圖表示本發明之第1實施型態的多層配線基板之剖 視圖，圖式中，符號1為，最上層基材（最上層配線基材），2 為最下層基材（最下層配線基材），3、4為夾設在最上層基 材1和最下層基材2之間的内層基材（配線基材）。 最上層基材1係通常為1 0 〇// m以下厚度之膜，薄板形 或片形者，在結晶溶解峰溫度為2 6 0°C以上之聚芳酮樹脂 和以非晶形聚醚醯亞胺樹脂為主成分之熱可塑性樹脂組合 物所構成之薄板形、膜形或片形的絕緣基材1 1之另一面 (該圖中為上側），形成有配線電路形成用之溝部1 2，同時 形成有貫穿絕緣基材1 1之通孔（貫穿孔）1 3，金屬箔1 4以露 出表面之狀態埋設在該溝部1 2，通孔1 3填入有導電膠硬化 而構成之導電材料1 5。包含該金屬箔1 4之絕緣基材1 1之表 面及内面為平坦化。 最下層基材2和上述最上層基材1為完全相同之構成， 相異點為絕緣基材1 1下側之面形成有配線電路形成用之溝 部12。
314367.ptd 第18頁 1267331 五、發明說明（9) t! π = ^基材3係通常為1 〇 〇" m以下厚度之膜，薄板形1 片形者，由盥上沭田， 厚扳形或 組合物所構成之镇妃_ …、」塑性树月曰 面（該圖中為上側)形、膜形或片形的絕緣基材11之另一
y成有貫穿絕緣基材11之通孔1 3，今、、蓋邱 1 2及通孔1 3埴入右道+ 3 β溝口P »+ ，、入有冷電膠硬化而構成之導電材料丨5。包含 该導電材料15之絕緣基材u之表面及内面為二5, 3 點為3 ί Ϊ =上述内層基材3為完全相同之構成，相異 ”…、、巴、、彖基材11下側之面形成有配線電路形成用之溝部 1 2 〇 該等最下層基材2、内層基材4、3及最上層美 依照該順序層疊且藉由熱溶接接合而成一體化，土而才以電性 方式連，該等基材丨至4之配線電路及各基材丨至4之間的配 線，係藉由導電膠硬化而構成之導電材料丨5所構成的。 構成上述絕緣基材丨丨之熱可塑性樹脂組合物之主成分 ^ f晶溶解峰溫度為2 6 0°C以上之聚芳酮樹脂，依照該構 造單位係包含芳香環結合、醚結合及酮結合之熱可塑性樹 月曰，4代表例有聚鱗酮、聚醚醚酮、聚鱗酮酮等。再者， 市面販售之聚醚醚S同有「PEEK151G」、「pEEK38lG」、 「PEEK4 5 0G」（任一種均為viCTREX公司之商品名稱」）。 且’非晶形聚醚醯亞胺樹脂依照該構造單位，係包含 芳香環結合、醚結合及亞胺結合之非晶形熱可塑性樹脂， 並非特別受限制者。然後，市面販售之聚醚酿亞胺有 「UltemCRS5001」、「uitemlOOO」（任〆種均為通用電
314367.ptd
第19頁 1267331 五、發明說明（10) 氣公司之商品名稱）。 上述熱可塑性樹脂組合物之樹脂組合，以對於由7 0至 25重量％之聚芳酮樹脂，和3〇至75重量％之非晶形聚醚醯 亞胺樹脂所構成之熱可塑性樹脂組合物1 〇 〇重量部，混合 以2 0重量部以上且5 0重量部以下之無機填充材料而構成之 組合物為佳。 2 5重量％的 高，因此多 %時，全體 解峰溫度在 定為30至75 於結晶性 超過75重量 即使結晶溶 填充材料。 何周知者。 硼（ΒΝ)、板 形鈦酸鈣 上。尤其， 3 0以上之片 方向之線性 板内產生龜 此處，將聚芳酮樹脂之含有率限定為7 0至 理由，係含有率超過7 0重量％時，由於結晶性 層化時的層疊性會降低，且含有率未達2 5重量 組合物之結晶性本身會降低，因此即使結晶溶 2 6 0°C以上，回流财熱性仍會降低。 且’將非晶形聚酸亞胺樹脂之含有率限 ，量％的理由，係含有率未達3 〇重量％時，由 高，因此多層化時的層疊性會降低，且含有率 %時，全體組成物之結晶性本身會降低，因此 解峰溫度在26〇°C以上，回流耐熱性仍會降低< 亦可對上述熱可塑性谢日匕& 么拖话* W企丨、 树月曰組合物添加無機 無機填充材料並益特g丨 例如，可例舉如滑石，亦可使用任 形碳酸約、板形氫氧化：母：玻璃薄片、氮化 等。該等可單獨添力，，、板形二氧化石夕、板 平均粒徑1 5// m以下，外# 、可組合添加2種以 形無機填充材料，由於比例（粒控/厚度）為 膨脹係數比，且可抑* t低平面方向和厚度 T抑制熱衝擊循環實驗時之基
314367.ptd 第20頁 1267331 五、發明說明αυ 裂者，因而較佳。 脂組合 佳。超 問題， 使用於 之差， 性膨脹 產生起 扭曲。 損壞該 外之各 劑、成 物100 過5 0重 線性膨 熱成形 由於絕 係數而 因於線 性質之 種添加 核劑、 劑的方法，可 表性含量為1 ( 聚鲢醯亞胺樹 之樹脂調整混 式混合之方 玄無機填充材料之添加量對熱可塑性樹 旦里^以2 0重S部以上且5 0重量部以下為 S 3 2 一 t於發生無機填充材料分散不良之 係數t易+不肖，且未達20重量部時，依據 ϋ璃£板機和絕緣基材1丨之線性膨脹係數 植=材11會發生尺寸收縮，進一步使降低線 ί t尺寸安定性之效果較小，在回流步驟中 性膨脹係數之内部應力，使基板產生彎曲或 亦可對上述熱可塑性樹脂組合物依照不 =度，適當添加其他樹脂或無機填充材料以 例如，安定劑、紫外線吸收劑、光安定 者色劑、滑劑、難燃劑等。 添加包含該等無機填充材料之各種添加 使用周知例如下述舉出之方法（a)、（b)。 (a)另外製作將各種添加劑以高濃度（代 重量％ )混合在聚芳酮樹脂及/或非晶形 2專基材（基材樹脂）之母料，在使用該母料 :濃度，使用捏合機或壓出機等而以機械 法。 只+ 1 機等，罝接將各種 械方式混合在使用之樹脂之方法。 添如劑以機 幸六#在該等方法Γ:(a)方法以分散性或力業性夕 乂土。進一步，在絕緣基材11表面為了改良和 點來看 知作性等，^
1267331 、發明說明（12) 適：施：模壓處理或電晕處理等。 適 膠 於使用樹脂系低溫择& ^ 5係加熱硬化導電膠者，因& 、銅崎等當作；；；？銀嶋、銀二) 接著，依據第2圖, 之多層配線基板之製造方法到第6圖A至B，說明本實施型態 此處，首先說明關 下層基材)及各内層基材之黎最:方層法基材巧上層基材及最 ;該等最外層…内層基材之多層配線者基’::^ (〇最外層基材之製造方法 首先，如第2圖a所- 、 以上之聚芳_樹脂和以=:準，結，溶解峰溫度為26(TC 熱可塑性樹脂組合物：形聚醚醯亞胺樹脂為主成分 該絕緣基材21::^㈣緣基材21。 可採用周知之方法、：溥板形或片形提供。成形方法 幸昆軋法等，雖無特別=^用，用T模之壓出禱造法，或 性等面來看，以使用τ疋/一彳片板之製膜性或安定生產 出鑄造法之成形溫度，果之壓出鑄造法較佳。使用Τ模之壓 等而適當調整，但大氩又，組合物之流動特性或製膜性 ( 2 6 0°C )以上，43(TC以;聚芳酮樹脂之結晶溶解峰溫度 接著，如第2圖B所一 基材2 1之特定位置带:’使用雷射或機械鑽頭等在絕緣 通孔13。 /成貝穿絕緣基材21之貫穿孔22，作為
314367.ptd 第22頁 1267331 五、發明說明G3) 接著’如第2圖C所不，II由刮墨印刷等將導電膠2 3填 入通孔1 3内，然後，以1 2(TC至i 6〇t將該導電膠23加熱硬 化3 0分鐘至6 0分鐘，作為導電材料i 5。 接著，藉由機械研磨等研削，除去殘留在絕緣基材21 上方之導電材料15,如第2圖D所示，通孔13填入有導電膠 硬化而構成之導電材料15,且獲得絕緣基材21表面平坦化 成特定之表面粗度之配線基材2 4。 接f=第3圖A所示，絕緣基材21之上側（一方面側） 介置以J ?泊31而在一主面配設有具凹凸之凹凸式轉錄治 ί!二方面伯"配設有絕緣基材21之玻璃轉 移溫度（τ g 1)以下且彈性率比绍絡 拔芏‘筮响_ 、、、巴緣基材2 1低的彈性膜33， 1示，將凹凸式轉錄治具32推壓在絕緣基 ?二=:璃移轉溫度（⑽以上且未達絕緣 基材2=開始結晶化溫度（Tcs)之溫度而埶 此處，絕緣基材21之玻填轉移溫（τ、^成 化溫度（Tcs)及彈性膜33之玻 1 開始、、·。曰日 示差掃描熱量（DSC)之方式得知轉係以測定 加熱速度10t /分鐘加埶被_ 二f 例如可藉由以 求出。 ’被則疋式料時所獲得之DSC狀態而 例如，包含有40重量％之姓曰 上之聚芳酮樹脂、60重量％之=曰曰曰冷解峰溫度為26(TC以 緣基材時，玻璃轉移溫度（Tgl 聚醚醯亞胺樹脂的絕 (Tcs)為2 2 5°C。 场185c，開始結晶化溫度 且，彈性膜33係絕緣基材 1之玻項轉移溫度（Tgl )以
1267331 五、發明說明（14) ----- ::Jt:比絕f基材21低者即τ ’例如，適於使 温度（Tg2A 10(rc。 4無性Μ 33之玻璃轉移 =4圖係絕緣基材21及彈性膜33之彈性 Γ二以'式V/為包含★40重量％之結晶溶解峰。 胺料Ρ的^之伞方酮樹脂、6〇重量％之非晶形聚醚醯亞 膜 的 <緣基材，Β為由間規聚苯乙烯所構成之彈性 %’彈性膜33在絕緣基材21軟化以前軟化， 會隨之彎曲，但不會塑性變形，可有效地隔開 上H 5 f度以彈性m 33之玻璃#移溫度（Tg2)以 以喝缘1= 材21之開始結晶化溫度（Tcs)較佳，而 緣，材21之玻璃轉移溫度（Tgl)以下者更佳。 緣基^ Π:: ’11由該熱成形，且藉由彈性膜33和絕 錄^具32之凹凸率差而沖穿金屬箔31，產生對應凹凸式轉 緣基材21内之金：ΐ t差的溶接強度差。例如’埋設在絕 Ϊ = :::的金一溶接強度弱，而可容易地 的金】：Sit剝VI:所示’ Τ簡單地從絕緣基材21將不用 而構成之導電材2 =:面並非必須存在有因導電膠硬化 1 5及通孔1 3，但以所有的金屬箔3 1之下
3l4367.ptd
第24頁 I26733l ^- 、發明說明（15) --一'— 有導電材料15之方式，溶接強度會變大，可將 的至屬箔31b更容易地去除。且，金屬每 了將不用 雖係不受限制者，彳曰全屬 〃' 種類及厚度 又隈fj I仁金屬咱31之厚度則以凹凸式轉錄、A日 2之凹凸高度以下之厚度為佳。對凹凸式專、彔具 ^。，m，使用具有9至35// m厚度之表面粗~化、電^之凹 例/屬箔）’但任意厚度均可剝離不用的電解銅箔即為5一 如第3圖E所示，從該絕緣基材21去除不用的金 材之ΐΐ，使用不圖示之成型模具在包含金屬笛31a及導電 ^枓15之絕緣基材21之兩面，以〇·5至1〇kg/cm ^絕緣基材21之開始結晶化溫度（Tcs)之溫度而施行力敎^ :坦=包含金屬箱31a及導電材料15之絕緣基材2ι之兩、面 依據上述，金屬箔14以露出表面之狀態埋設在最外戶 土材’即絕緣基材？ 1 曰 最上厗其u 獲于通孔13填入有導電材料15之 取上層基材34 (或最下層基材35)。 (2 )内層基材之製造方法 首先’如第5圖a所示，將壓模機4 1之凸部4 2熱轉錄在 妨 取Γ ^暴材相同的熱可塑性樹脂組合物所構成之 :緣基材2 1之表面（單面）。該熱轉錄條件例如溫度為1 7 5 至 2〇5C ’ 壓力為 2〇kg/cm2至 60kg/cni2。 如第5圖B所示，藉由該熱轉錄在絕緣基材2 1表面形成 配線電路形成用溝部43。 壓核機4 1係對絕緣基材2 1為脫模性良好之材質，例如
3l4367.ptd 第25頁 1267331 五、發明說明（16) ' 藉由玻埚陶瓷等構成者，尤其，適於使用3至5mm厚度之 耐熱玻璃。該壓模機4 1係使用光蝕刻法在耐熱玻璃板上形 成抗蝕光罩，然後，以使用該抗蝕光罩藉由喷砂法而形成 對應於配線電路圖案之凸部42的方式製作。 接著’如第5圖C所示，使用雷射或機械鑽頭等在絕緣 基材21之特定位置形成貫穿絕緣基材21之貫穿孔44，作為 通孔13。該通孔13亦可藉由壓模機41而和配線電路形成用 溝部43而同時成形。 接著’如第5圖D所示，藉由刮墨印刷等將導電膠4 5填 入在配線電路形成用溝部43及通孔丨3内，然後，以1 2(rc =1 6 0 C將該導電膠4 5加熱硬化3 〇分鐘至6 0分鐘，作為導 %材料1 5。因此’在絕緣基材2丨之特定位置形成導電電路 4 6及層間導通部4 7。 ^接著’如第5圖E所示，使用研磨機4 8研削去除殘留在 絕緣基材2 1上之導電材料丨5，同時使絕緣基材2丨表面平坦 化’如第5圖F所示，可獲得絕緣基材2丨之特定位置形成有 導電電路4 6及層間導通部4 7之内層基材4 9 (或内層基材 50) 〇 (3 )多層配線基材之製造方法 首先’如第6圖A所示，在層疊治具5丨内將具有彈性及 脫模性^緩衝膜52、最下層基材35、内層基材49、内層基 j才5 0、最亡層基材3 4、具有彈性及脫膜性之緩衝膜5 2依照 違順序重登’然後，藉由以溫度2 〇 〇至2 6 〇。〇，壓力2 〇至6 〇 kg/cm之條件熱溶接的方式，接合最下層基材託至最上層
314367.ptd 第26頁 1267331 五、發明說明（17) 基材34而一體化。 層疊最下層基材 基材34’且藉由熱 為2 6 0°C以上之聚 主成分之熱可塑性 配線電路形成用之 孔1 3 ’且將金屬箱 在通孔1 3填入導電 基材，因此除了具 的電性絕緣性之 ，可解決起因於樹 精確度且南精細之 及可靠性優良之多 物及導體配線之種 樣化，藉由組合各 現各種規格之多層 方式，可適用於少 性連接之方式，不 之負擔較少。 根據上述，如第6圖B所示，可獲得 35、内層基材49、内層基材5 0及最上層 溶接而二體化之多層配線基板53。 ^ 本κ &型態由於在結晶溶解峰溫度 方嗣樹脂和以t 樹脂組合物二f晶形聚醚醯亞胺樹脂為 溝部12,同0!構成的絕緣基材U，形成 14以露出表^形成貫穿絕緣基材11之通 膠硬化而構=之狀態埋設在該溝部1 2， 有優良的耐；；導電材料15而當作配線 外，可進犷 高機械性強度、優良 脂流動之^ ^溫溶接而不造成樹脂流動 導體配線。：歪曲之問題，而可視為高 層配線基板而，可提供一種電性特性 類或形狀的$ :選擇熱可塑性樹脂組合 種規格之配，可達成配線基材之多 配線基板。土材的方式，可容易地實 且，以 έ 量多樣之製：合各種規格之配線基材的 須藉由。藉由以導電膠之電 (第2實施型壬形成配線，對環境方面 第7圖表 ’、务明之第2實施型態之ϊ c封裝基板（半導
314367.ptd 第27頁 1267331 五、發明說明（18) 體裝置裝載基板）之剖視圖。 該I C封裝基板係最下層基材3 5、内層基材4 9及内層基 材5 0依照該順序，藉由熱溶接使一體化而為多層内插板型 基板6 1 ’作為I C晶片（半導體裝置）裝載部之内層基材5 〇之 上’直接固定有I C晶片（半導體裝置）6 3，同時以電性方式 連接該1C晶片63之銷（端子）64和導電電路46，進一步，該 1C晶片63係藉由環氧樹脂等封裝樹脂65封裝所構成的。 製造4 IC封裝基板時，首先，如第8圖A所示，在層疊 治具5 1内將具有彈性及脫模性之緩衝膜5 2、最下層基材 35、内層基材49、内層基材5〇、具有彈性及脫膜性之緩衝 膜5 2依知、该順序重疊，然後，藉由以溫度2 〇 〇至2 6 〇它，壓 力2 0至6 Okg/cm之條件熱溶接的方式，接合最下層基材35 至内層基材5 0而一體化，作為多層内插板型基板6卜 接著’如第8圖B所示，將I C晶片6 3裝載於作為I C晶片 裝載部之内層基材5 0上方之特定位置，以藉由熱盤6 8將該 I C晶片6 3保持在特定之溫度，例如絕緣基材之開始結晶化 溫度以下之1 7 5至2 0 5°C之狀態而熱壓接，如第8圖C所示， 以電性方式連接I c晶片6 3之銷6 4和導電電路4 6。 接著’塗佈環氧樹脂等封裝樹脂劑6 9而覆蓋丨c晶片 6 3 ’將該封裝樹脂劑6 9加熱硬化，作為封裝樹脂6 5。 如此’以裝載I C晶片6 3時之溫度設定成絕緣基材之開 始結晶化溫度以下之175至2 0 5°C的方式，可形成其後之低 溫層疊。且’亦可將急速熱硬化型之環氧樹脂供給到内層 基材5 0上方，藉由熱壓接而接合。
1267331 五、發明說明（19) 本實施型態亦可達成和第1實施型態之多層配線基板 同樣的效果。 且’作為I C晶片裝載部之内層基材5 〇上，由於直接固 疋I C晶片6 3，因此可獲得高精確度、高精細且高密度之j c 封裝基板。 (第3實施型態） 第9圖表示本發明之第3實施型態之I c封裝基板（半導 體裝置裝載基板）之剖視圖。 該I C封裝基板和第2實施型態之I C封裝基板之相異 點’係相對於第2實施型態之I C封裝基板在作為I c晶片裝 載部之内層基材50上，直接固定有1C晶片63，而本實施型 悲之I C封裝基板在作為I C晶片裝載部之内層基材5 〇上方， 介置以1C晶片固定用接合劑62固定1C晶片6 3之點。 製造該I C封裝基板時，和第實施型態之丨c封裝基板同 樣地製作多層内插板型基板6 1，接著，如第1 〇圖撕示， 將I C晶片固定用接合劑6 2塗佈在作為I C晶片裝載部之内層 基材5 0上方，而將I C晶片6 3置放在該I C晶片固定用接合劑 6 2上方之特定位置，以藉由熱盤6 8將該I C晶片6 3以保持在 特定溫度’例如絕緣基材之開始結晶化溫度以下之1 7 5至 2 0 5 C之狀悲而熱壓接，如第1 0圖B所示，以電性方式連接 I C晶片6 3之銷6 4和導電電路4 6。 接著’塗佈環氧樹脂等封裝樹脂劑6 9而覆蓋I C晶片6 3 及I C晶片固定用接合劑6 2，加熱硬化該封裝樹脂劑6 9，作 為封裝樹脂6 5。
314367.ptd 第29頁 1267331 五、發明說明（20) 本實施型態亦可和第1實施型態之多層配線基板達成 同樣的效果。 且，由於作為I C晶片裝載部之内層基材5 0上方，介置 以I C晶片固定用接合劑6 2而固定有I C晶片6 3，因此在無法 充分確保内層基材5 0和I C晶片6 3之間的絕緣性時，可藉由 I C晶片固定用接合劑6 2碟保絕緣性，而可獲得高精確度、 高精細且高密度之I C封裝基板。
314367.ptd 第30頁 1267331 圖式簡單說明 [圖式簡單說明] 第1圖表示本發明之第1實施型態之多層配線基板之剖 視圖。 第2圖A至D表示本發明之第1實施型態之多層配線基板 製造方法之過程圖。 第3圖A至E表示本發明之第1實施型態之多層配線基板 製造方法之過程圖。 第4圖表示絕緣基材及彈性膜之彈性率溫度依賴性之 示意圖。 第5圖A至F表示本發明之第1實施型態之多層配線基板 製造方法之過程圖。 第6圖A及B表示本發明之第1實施型態之多層配線基板 製造方法之過程圖。 第7圖表示本發明之第2實施型態之I C封裝基板之剖視 圖。 第8圖A至C表示本發明之第2實施型態之I C封裝基板製 造方法之過程圖。 第9圖表示本發明之第3實施型態之I C封裝基板之剖視 圖。 第1 0圖A及B表示本發明之第3實施型態之I C封裝基板 製造方法之過程圖。 1、 3 4配線基材、 2、 3 5配線基材、 材材 基基 層層 上下 最最 板 基 線 配 層 多
314367.ptd 第31頁 1267331 圖式簡單說明 3、4、4 9、5 0配線基材、内層基材
1卜 13^ 2 1絕緣基材 2 2、4 4貫穿孔、通 孔 12 溝部 14、 31、13a、3 lb金屬 箔 15 導電材料 23> 45導電膠 24 配線基材 32 凹凸式轉錄治具 33 彈性膜 41 壓模機 42 凸部 43 配線電路形成用 溝部 46 導電電路 47 層間導通部 48 研磨機 51 層疊治具 52 緩衝膜、彈性膜 53 多層配線基板 61 多層内插板型基板 62 I C晶片固定用接 合劑 63 I C晶片 64 銷（端子） 65 封裝樹脂 68 熱盤 69 封裝樹脂劑 Ag 銀 Cu 銅 DSC 示差掃描熱量 Pd !巴 T c s 開始結晶化溫度 Tg卜 Tg2玻璃移轉溫度 314367.ptd 第32頁
Claims (1)
1267331 ^^_92102163 申請專利範圍 修正 /.V 六 .―綠入： "jRT 之肤ί f:線基板，其特徵為，導體配線以露出表面 科炉里设在由結晶溶解峰温度為2 6 〇£>c以上之聚芳酮 ;月:二：晶形聚醚醯亞胺樹脂為主成分之熱可塑性 i ίΐ;;:ΐ;絕緣基材⑴)，而形成配線電 平±日化& s該導體配線之絕緣基材πι)表面 -化而構成之配線基材 性方iir:線基材°、2、3、4)彼此間= 間藉由熱二it: r化3、二絕緣基材⑴)彼此 配線美奸M f 〇 Μ化，同時以電性方式連接各 3 4 M it 、3、4 )之導體配線及配線基材U、2、 電材T二配^ = 之",線基板，其中，前述絕 樹脂和以非晶形J ==解t 了度為2 6 0°C以上之聚芳酮 樹脂組合物:曰溶融、V : f f樹脂為主成分之熱可塑性 所構成者〜練且急冷製膜而獲得之非晶形膜 如申請專利範圍第丨項之多層配線美 體配線由導電膠硬化而成之導電土 ^中，丽述導 (⑷所構成，至少露出前述金屬，上)：金屬箱 -種半導體裝置農載基板 面者。 圍第1項之多層配線基板裝冑於如申請專利範 -種多層配線基板之製造n體裳置所構成者。 解峰溫度為26(TC以上之聚芳㈣’ a在結晶溶 非日日形聚鍵酿 314367(修正版）.ptc 第33頁 案號 92102163 1267331
六、申請專利範圍 成ί之ί可塑性樹脂組合物所構成的絕 基材（21)之-表面或兩面’以前述熱可塑性樹脂组 合物之玻璃轉移溫度以上且未達開始結晶化溫产之瓜 度而施行熱形成，於前述一表面或兩 =⑴、m或由溝及貫穿孔(13、22)所=導； 6 、接著，藉由在前述導電區域填入導電膠（23)而來 成該導電膠（23)為導體配線之配線電路的方成 具有n”(21)和前述配線電路之配線基材成 接者，層豐禝數該配線基材，以前述開始結晶化 溫度以上之溫度而藉由熱溶接接合該等配線美材之p 緣基材（21)彼此之間並結晶化，同時藉由導^膠 而以電性方式連接配線基材彼此之間者。 如申請專利範圍第5項之多層配線基板之製造方法，置 中，前述絕緣基材（21 )係將結晶溶解峰溫度為26〇。〇 ^ 上之聚芳酮樹脂和以非晶形聚醚醯亞胺樹脂為主 之熱可塑性樹脂組合物，溶融混練且急冷^膜 ^ 之非晶形膜者。 &付 一種多層配線基板之製造方法，其特徵為，在結曰々 解峰溫度為2 60°C以上之聚芳酮樹脂和以非晶形聚阳驗合 亞胺樹脂為主成分之熱可塑性樹脂組合物所構成的絕μ 緣基材（21)之一面側，介置以金屬箔（31)配設凹凸、 =治具，同時在另-面侧，配設有前述絕緣基材工 (21)之玻璃轉移溫度以下且彈性率比前述絕緣基材
314367(修正版）.ptc 第34頁 1267331 _案號92102163_%年/月J曰 修正_ 六、申請專利範圍 (2 1 )低的彈性膜（5 2 )， 接著，使用前述凹凸式轉錄治具而以前述彈性膜 (5 2 )之玻璃移轉溫度以上且未達前述絕緣基材之開始 結晶化溫度之溫度而熱形成， 接著，剝離前述金屬箔（3 1 )，僅將對應前述凹凸 式轉錄治具之凸部位置的金屬箔（3 1 a )溶接在前述絕緣 基材（2 1 )者。
314367(修正版）.ptc 第35頁
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| JP3619395B2 (ja) * | 1999-07-30 | 2005-02-09 | 京セラ株式会社 | 半導体素子内蔵配線基板およびその製造方法 |
| JP2001119148A (ja) * | 1999-10-14 | 2001-04-27 | Sony Corp | Ｉｃチップ内蔵多層基板及びその製造方法 |
| JP2001196703A (ja) | 2000-01-14 | 2001-07-19 | Sony Corp | プリント配線基板及びその作製方法 |
| JP2001230520A (ja) | 2000-02-14 | 2001-08-24 | Sony Corp | 配線基板の製造方法及びそれにより得られた配線基板 |
| JP2001244609A (ja) | 2000-02-25 | 2001-09-07 | Sony Corp | 配線基板の製造方法及びそれにより得られた配線基板 |
| JP2001257448A (ja) | 2000-03-10 | 2001-09-21 | Sony Corp | プリント配線基板の製造方法及びそれにより得られたプリント配線基板 |
| JP2001267747A (ja) * | 2000-03-22 | 2001-09-28 | Nitto Denko Corp | 多層回路基板の製造方法 |
| JP2002248626A (ja) | 2001-02-26 | 2002-09-03 | Sony Corp | 転写用金型とその製造方法 |
| JP4576728B2 (ja) | 2001-03-06 | 2010-11-10 | ソニー株式会社 | 導電性ぺースト、プリント配線基板とその製造方法および半導体装置とその製造方法 |
| JP2002261444A (ja) | 2001-03-06 | 2002-09-13 | Sony Corp | 積層配線基板およびその製造方法 |
| JP2002261120A (ja) | 2001-03-06 | 2002-09-13 | Sony Corp | 実装基板とその製造方法および半導体装置 |
| JP2002270731A (ja) | 2001-03-14 | 2002-09-20 | Sony Corp | 配線基板及びその製造方法、並びに半導体装置 |
| JP2002290029A (ja) | 2001-03-26 | 2002-10-04 | Sony Corp | 配線基板の製造方法及び配線基板 |
-
2002
- 2002-02-05 JP JP2002028235A patent/JP4181778B2/ja not_active Expired - Fee Related
-
2003
- 2003-01-29 KR KR1020030005785A patent/KR100935837B1/ko not_active IP Right Cessation
- 2003-01-30 TW TW92102163A patent/TWI267331B/zh active
- 2003-02-03 US US10/357,183 patent/US6797367B2/en not_active Expired - Fee Related
-
2004
- 2004-08-24 US US10/925,644 patent/US7334324B2/en not_active Expired - Fee Related
-
2007
- 2007-11-20 US US11/943,410 patent/US20080116611A1/en not_active Abandoned
Also Published As
| Publication number | Publication date |
|---|---|
| JP4181778B2 (ja) | 2008-11-19 |
| KR20030066359A (ko) | 2003-08-09 |
| US7334324B2 (en) | 2008-02-26 |
| US20050025944A1 (en) | 2005-02-03 |
| US20030180510A1 (en) | 2003-09-25 |
| US20080116611A1 (en) | 2008-05-22 |
| TW200303164A (en) | 2003-08-16 |
| KR100935837B1 (ko) | 2010-01-11 |
| JP2003229663A (ja) | 2003-08-15 |
| US6797367B2 (en) | 2004-09-28 |
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