TW200910373A - Dynamic impedance control for input/output buffers - Google Patents
Dynamic impedance control for input/output buffers Download PDFInfo
- Publication number
- TW200910373A TW200910373A TW097117419A TW97117419A TW200910373A TW 200910373 A TW200910373 A TW 200910373A TW 097117419 A TW097117419 A TW 097117419A TW 97117419 A TW97117419 A TW 97117419A TW 200910373 A TW200910373 A TW 200910373A
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- 239000000872 buffer Substances 0.000 title description 21
- 238000000034 method Methods 0.000 claims abstract description 34
- 239000004065 semiconductor Substances 0.000 claims description 6
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- 101100443807 Pyrobaculum islandicum (strain DSM 4184 / JCM 9189 / GEO3) dpdh gene Proteins 0.000 description 3
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0005—Modifications of input or output impedance
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4093—Input/output [I/O] data interface arrangements, e.g. data buffers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
- G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/02—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding parasitic signals
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
- G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
- G11C7/1084—Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H17/00—Networks using digital techniques
- H03H17/0045—Impedance matching networks
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/38—Impedance-matching networks
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0278—Arrangements for impedance matching
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/22—Control and timing of internal memory operations
- G11C2207/2254—Calibration
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/028—Arrangements specific to the transmitter end
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Logic Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US94279807P | 2007-06-08 | 2007-06-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW200910373A true TW200910373A (en) | 2009-03-01 |
Family
ID=40093105
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW097117419A TW200910373A (en) | 2007-06-08 | 2008-05-12 | Dynamic impedance control for input/output buffers |
Country Status (9)
| Country | Link |
|---|---|
| US (5) | US7834654B2 (enExample) |
| EP (1) | EP2171844B1 (enExample) |
| JP (1) | JP5312453B2 (enExample) |
| KR (1) | KR20100029236A (enExample) |
| CN (1) | CN101779373B (enExample) |
| CA (1) | CA2688277A1 (enExample) |
| ES (1) | ES2507075T3 (enExample) |
| TW (1) | TW200910373A (enExample) |
| WO (1) | WO2008148197A1 (enExample) |
Cited By (3)
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| US8606211B2 (en) | 2009-06-23 | 2013-12-10 | Qualcomm Incorporated | High dynamic range receiver front-end with Q-enhancement |
| TWI806269B (zh) * | 2021-11-11 | 2023-06-21 | 瑞昱半導體股份有限公司 | 具有自參考阻抗的集成電路 |
| TWI841169B (zh) * | 2022-09-29 | 2024-05-01 | 南亞科技股份有限公司 | 測試介面電路 |
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| KR100772533B1 (ko) | 2006-09-27 | 2007-11-01 | 주식회사 하이닉스반도체 | 온 다이 터미네이션 회로 및 그의 구동 방법 |
| TW200910373A (en) | 2007-06-08 | 2009-03-01 | Mosaid Technologies Inc | Dynamic impedance control for input/output buffers |
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-
2008
- 2008-05-12 TW TW097117419A patent/TW200910373A/zh unknown
- 2008-06-06 CN CN2008801022640A patent/CN101779373B/zh not_active Expired - Fee Related
- 2008-06-06 KR KR1020107000345A patent/KR20100029236A/ko not_active Abandoned
- 2008-06-06 EP EP08757205.3A patent/EP2171844B1/en not_active Not-in-force
- 2008-06-06 WO PCT/CA2008/001069 patent/WO2008148197A1/en not_active Ceased
- 2008-06-06 CA CA002688277A patent/CA2688277A1/en not_active Abandoned
- 2008-06-06 JP JP2010510622A patent/JP5312453B2/ja not_active Expired - Fee Related
- 2008-06-06 US US12/134,451 patent/US7834654B2/en active Active
- 2008-06-06 ES ES08757205.3T patent/ES2507075T3/es active Active
-
2010
- 2010-10-29 US US12/915,796 patent/US8035413B2/en active Active
-
2011
- 2011-09-29 US US13/248,330 patent/US8847623B2/en active Active
-
2014
- 2014-09-29 US US14/499,275 patent/US9300291B2/en active Active
-
2016
- 2016-03-24 US US15/079,085 patent/US20160277027A1/en not_active Abandoned
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8606211B2 (en) | 2009-06-23 | 2013-12-10 | Qualcomm Incorporated | High dynamic range receiver front-end with Q-enhancement |
| TWI806269B (zh) * | 2021-11-11 | 2023-06-21 | 瑞昱半導體股份有限公司 | 具有自參考阻抗的集成電路 |
| TWI841169B (zh) * | 2022-09-29 | 2024-05-01 | 南亞科技股份有限公司 | 測試介面電路 |
| US12130331B2 (en) | 2022-09-29 | 2024-10-29 | Nanya Technology Corporation | Test interface circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| US20150008956A1 (en) | 2015-01-08 |
| CN101779373A (zh) | 2010-07-14 |
| JP5312453B2 (ja) | 2013-10-09 |
| US20160277027A1 (en) | 2016-09-22 |
| US8847623B2 (en) | 2014-09-30 |
| US20080303546A1 (en) | 2008-12-11 |
| EP2171844B1 (en) | 2014-06-25 |
| CN101779373B (zh) | 2013-06-12 |
| US7834654B2 (en) | 2010-11-16 |
| US20110043246A1 (en) | 2011-02-24 |
| ES2507075T3 (es) | 2014-10-14 |
| WO2008148197A1 (en) | 2008-12-11 |
| JP2010529759A (ja) | 2010-08-26 |
| US9300291B2 (en) | 2016-03-29 |
| US8035413B2 (en) | 2011-10-11 |
| EP2171844A1 (en) | 2010-04-07 |
| EP2171844A4 (en) | 2010-08-25 |
| KR20100029236A (ko) | 2010-03-16 |
| CA2688277A1 (en) | 2008-12-11 |
| US20120019282A1 (en) | 2012-01-26 |
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