TW200506950A - Nonvolatile semiconductor memory device, and programming method and erasing method thereof - Google Patents
Nonvolatile semiconductor memory device, and programming method and erasing method thereofInfo
- Publication number
- TW200506950A TW200506950A TW093117351A TW93117351A TW200506950A TW 200506950 A TW200506950 A TW 200506950A TW 093117351 A TW093117351 A TW 093117351A TW 93117351 A TW93117351 A TW 93117351A TW 200506950 A TW200506950 A TW 200506950A
- Authority
- TW
- Taiwan
- Prior art keywords
- line voltage
- voltage
- bit line
- word line
- resistive element
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0023—Address circuits or decoders
- G11C13/0026—Bit-line or column circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0023—Address circuits or decoders
- G11C13/0028—Word-line or row circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
- G11C16/3427—Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
- G11C2013/009—Write using potential difference applied between cell electrodes
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/30—Resistive cell, memory material aspects
- G11C2213/31—Material having complex metal oxide, e.g. perovskite structure
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/70—Resistive array aspects
- G11C2213/77—Array wherein the memory element being directly connected to the bit lines and word lines without any access device being used
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Materials Engineering (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003171489 | 2003-06-17 | ||
JP2003327026A JP2005032401A (ja) | 2003-06-17 | 2003-09-19 | 不揮発性半導体記憶装置及びその書き込み方法と消去方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200506950A true TW200506950A (en) | 2005-02-16 |
TWI248616B TWI248616B (en) | 2006-02-01 |
Family
ID=33422160
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW093117351A TWI248616B (en) | 2003-06-17 | 2004-06-16 | Nonvolatile semiconductor memory device, and programming method and erasing method thereof |
Country Status (7)
Country | Link |
---|---|
US (1) | US6992920B2 (zh) |
EP (1) | EP1489620B1 (zh) |
JP (1) | JP2005032401A (zh) |
KR (1) | KR100687016B1 (zh) |
CN (1) | CN100565702C (zh) |
DE (1) | DE602004004566T2 (zh) |
TW (1) | TWI248616B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI596610B (zh) * | 2013-10-04 | 2017-08-21 | 財團法人工業技術研究院 | 電阻式非揮發性記憶體及其操作方法 |
Families Citing this family (48)
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US6962648B2 (en) * | 2003-09-15 | 2005-11-08 | Global Silicon Net Corp. | Back-biased face target sputtering |
JP4189395B2 (ja) * | 2004-07-28 | 2008-12-03 | シャープ株式会社 | 不揮発性半導体記憶装置及び読み出し方法 |
JP2006114087A (ja) * | 2004-10-13 | 2006-04-27 | Sony Corp | 記憶装置及び半導体装置 |
US7425504B2 (en) * | 2004-10-15 | 2008-09-16 | 4D-S Pty Ltd. | Systems and methods for plasma etching |
US20060081466A1 (en) * | 2004-10-15 | 2006-04-20 | Makoto Nagashima | High uniformity 1-D multiple magnet magnetron source |
US20060081467A1 (en) * | 2004-10-15 | 2006-04-20 | Makoto Nagashima | Systems and methods for magnetron deposition |
JP2006203098A (ja) * | 2005-01-24 | 2006-08-03 | Sharp Corp | 不揮発性半導体記憶装置 |
JP4427464B2 (ja) * | 2005-02-02 | 2010-03-10 | シャープ株式会社 | 不揮発性半導体記憶装置及びその動作方法 |
JP4313372B2 (ja) | 2005-05-11 | 2009-08-12 | シャープ株式会社 | 不揮発性半導体記憶装置 |
JP4469319B2 (ja) | 2005-06-17 | 2010-05-26 | シャープ株式会社 | 半導体記憶装置 |
JP2007026492A (ja) * | 2005-07-13 | 2007-02-01 | Sony Corp | 記憶装置及び半導体装置 |
JP4309877B2 (ja) * | 2005-08-17 | 2009-08-05 | シャープ株式会社 | 半導体記憶装置 |
US20070084716A1 (en) * | 2005-10-16 | 2007-04-19 | Makoto Nagashima | Back-biased face target sputtering based high density non-volatile data storage |
US20070084717A1 (en) * | 2005-10-16 | 2007-04-19 | Makoto Nagashima | Back-biased face target sputtering based high density non-volatile caching data storage |
JP4054347B2 (ja) | 2005-12-16 | 2008-02-27 | シャープ株式会社 | 不揮発性半導体記憶装置 |
JP4203506B2 (ja) * | 2006-01-13 | 2009-01-07 | シャープ株式会社 | 不揮発性半導体記憶装置及びその書き換え方法 |
JP4594878B2 (ja) * | 2006-02-23 | 2010-12-08 | シャープ株式会社 | 可変抵抗素子の抵抗制御方法及び不揮発性半導体記憶装置 |
US8395199B2 (en) | 2006-03-25 | 2013-03-12 | 4D-S Pty Ltd. | Systems and methods for fabricating self-aligned memory cell |
JP4460552B2 (ja) * | 2006-07-04 | 2010-05-12 | シャープ株式会社 | 半導体記憶装置 |
US20080011603A1 (en) * | 2006-07-14 | 2008-01-17 | Makoto Nagashima | Ultra high vacuum deposition of PCMO material |
US7932548B2 (en) | 2006-07-14 | 2011-04-26 | 4D-S Pty Ltd. | Systems and methods for fabricating self-aligned memory cell |
US8454810B2 (en) | 2006-07-14 | 2013-06-04 | 4D-S Pty Ltd. | Dual hexagonal shaped plasma source |
JP4251576B2 (ja) * | 2006-07-28 | 2009-04-08 | シャープ株式会社 | 不揮発性半導体記憶装置 |
US8308915B2 (en) | 2006-09-14 | 2012-11-13 | 4D-S Pty Ltd. | Systems and methods for magnetron deposition |
US7379364B2 (en) * | 2006-10-19 | 2008-05-27 | Unity Semiconductor Corporation | Sensing a signal in a two-terminal memory array having leakage current |
US7372753B1 (en) * | 2006-10-19 | 2008-05-13 | Unity Semiconductor Corporation | Two-cycle sensing in a two-terminal memory array having leakage current |
JP4427560B2 (ja) * | 2007-05-21 | 2010-03-10 | 株式会社東芝 | 不揮発性メモリ装置のデータ書き込み方法 |
JP4252624B2 (ja) | 2007-06-01 | 2009-04-08 | パナソニック株式会社 | 抵抗変化型記憶装置 |
KR100914267B1 (ko) * | 2007-06-20 | 2009-08-27 | 삼성전자주식회사 | 가변저항 메모리 장치 및 그것의 형성방법 |
JP4607252B2 (ja) * | 2008-02-25 | 2011-01-05 | パナソニック株式会社 | 抵抗変化素子の駆動方法およびそれを用いた抵抗変化型記憶装置 |
US7920407B2 (en) * | 2008-10-06 | 2011-04-05 | Sandisk 3D, Llc | Set and reset detection circuits for reversible resistance switching memory material |
KR101523677B1 (ko) * | 2009-02-26 | 2015-05-28 | 삼성전자주식회사 | 플래시 메모리 장치 및 그것의 프로그램 방법 그리고 그것을 포함하는 메모리 시스템 |
US8325508B2 (en) * | 2009-06-08 | 2012-12-04 | Panasonic Corporation | Writing method for variable resistance nonvolatile memory element, and variable resistance nonvolatile memory device |
TWI428929B (zh) * | 2009-11-24 | 2014-03-01 | Ind Tech Res Inst | 控制方法 |
US8817521B2 (en) | 2009-11-24 | 2014-08-26 | Industrial Technology Research Institute | Control method for memory cell |
JP5598338B2 (ja) * | 2011-01-13 | 2014-10-01 | ソニー株式会社 | 記憶装置およびその動作方法 |
JP5404683B2 (ja) * | 2011-03-23 | 2014-02-05 | 株式会社東芝 | 抵抗変化メモリ |
WO2012153488A1 (ja) | 2011-05-11 | 2012-11-15 | パナソニック株式会社 | クロスポイント型抵抗変化不揮発性記憶装置およびその読み出し方法 |
JP5542742B2 (ja) * | 2011-05-26 | 2014-07-09 | 株式会社東芝 | 半導体記憶装置 |
TWI506627B (zh) | 2011-08-30 | 2015-11-01 | Ind Tech Res Inst | 電阻式記憶體及其寫入驗證方法 |
JP2013089662A (ja) | 2011-10-14 | 2013-05-13 | Renesas Electronics Corp | 半導体装置 |
JP5630742B2 (ja) * | 2011-12-05 | 2014-11-26 | 株式会社東芝 | 半導体記憶装置 |
JP5479657B1 (ja) | 2012-04-09 | 2014-04-23 | パナソニック株式会社 | 不揮発性記憶装置、およびそのフォーミング方法 |
KR102015637B1 (ko) | 2012-08-31 | 2019-08-28 | 삼성전자주식회사 | 가변 저항 메모리 장치 및 그 소거 검증 방법 |
US9047945B2 (en) * | 2012-10-15 | 2015-06-02 | Marvell World Trade Ltd. | Systems and methods for reading resistive random access memory (RRAM) cells |
CN104700891B (zh) * | 2013-12-09 | 2019-01-08 | 华邦电子股份有限公司 | 电阻式存储器装置及其写入方法 |
CN105895152B (zh) * | 2016-04-01 | 2019-05-21 | 北京大学 | 一种基于单相导通存储单元的存储阵列读取方法 |
US11594271B2 (en) * | 2019-05-08 | 2023-02-28 | Ferroelectric Memory Gmbh | Memory cell driver, memory cell arrangement, and methods thereof |
Family Cites Families (17)
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US81489A (en) * | 1868-08-25 | fuller | ||
JPH0677434A (ja) * | 1992-08-27 | 1994-03-18 | Hitachi Ltd | 半導体記憶装置 |
US5463586A (en) * | 1993-05-28 | 1995-10-31 | Macronix International Co., Ltd. | Erase and program verification circuit for non-volatile memory |
US6204139B1 (en) * | 1998-08-25 | 2001-03-20 | University Of Houston | Method for switching the properties of perovskite materials used in thin film resistors |
US6366497B1 (en) * | 2000-03-30 | 2002-04-02 | Intel Corporation | Method and apparatus for low voltage sensing in flash memories |
US20020036291A1 (en) * | 2000-06-20 | 2002-03-28 | Parker Ian D. | Multilayer structures as stable hole-injecting electrodes for use in high efficiency organic electronic devices |
US20020024835A1 (en) * | 2000-07-07 | 2002-02-28 | Thompson Michael O. | Non-volatile passive matrix device and method for readout of the same |
NO312699B1 (no) * | 2000-07-07 | 2002-06-17 | Thin Film Electronics Asa | Adressering av minnematrise |
US6661730B1 (en) * | 2000-12-22 | 2003-12-09 | Matrix Semiconductor, Inc. | Partial selection of passive element memory cell sub-arrays for write operation |
KR100432510B1 (ko) * | 2001-02-02 | 2004-05-20 | 주식회사 쓰리비 시스템 | 부착형 비접촉식 전자카드 |
US6426907B1 (en) * | 2001-01-24 | 2002-07-30 | Infineon Technologies North America Corp. | Reference for MRAM cell |
KR20030001178A (ko) * | 2001-06-28 | 2003-01-06 | 주식회사 하이닉스반도체 | 반도체 소자의 플러그 형성 방법 |
US6693821B2 (en) * | 2001-06-28 | 2004-02-17 | Sharp Laboratories Of America, Inc. | Low cross-talk electrically programmable resistance cross point memory |
US7044911B2 (en) * | 2001-06-29 | 2006-05-16 | Philometron, Inc. | Gateway platform for biological monitoring and delivery of therapeutic compounds |
US6787013B2 (en) * | 2001-09-10 | 2004-09-07 | Eumed Biotechnology Co., Ltd. | Biosensor |
JP4205938B2 (ja) * | 2002-12-05 | 2009-01-07 | シャープ株式会社 | 不揮発性メモリ装置 |
JP3804612B2 (ja) * | 2003-01-07 | 2006-08-02 | セイコーエプソン株式会社 | 強誘電体記憶装置 |
-
2003
- 2003-09-19 JP JP2003327026A patent/JP2005032401A/ja active Pending
-
2004
- 2004-06-16 TW TW093117351A patent/TWI248616B/zh active
- 2004-06-17 DE DE602004004566T patent/DE602004004566T2/de not_active Expired - Lifetime
- 2004-06-17 CN CNB2004100495725A patent/CN100565702C/zh not_active Expired - Fee Related
- 2004-06-17 KR KR1020040046807A patent/KR100687016B1/ko active IP Right Grant
- 2004-06-17 EP EP04253628A patent/EP1489620B1/en not_active Expired - Lifetime
- 2004-06-17 US US10/872,100 patent/US6992920B2/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI596610B (zh) * | 2013-10-04 | 2017-08-21 | 財團法人工業技術研究院 | 電阻式非揮發性記憶體及其操作方法 |
Also Published As
Publication number | Publication date |
---|---|
EP1489620B1 (en) | 2007-01-31 |
KR20040111205A (ko) | 2004-12-31 |
US6992920B2 (en) | 2006-01-31 |
EP1489620A2 (en) | 2004-12-22 |
KR100687016B1 (ko) | 2007-02-27 |
DE602004004566T2 (de) | 2007-10-25 |
JP2005032401A (ja) | 2005-02-03 |
DE602004004566D1 (de) | 2007-03-22 |
CN1574077A (zh) | 2005-02-02 |
EP1489620A3 (en) | 2005-02-09 |
US20040257864A1 (en) | 2004-12-23 |
TWI248616B (en) | 2006-02-01 |
CN100565702C (zh) | 2009-12-02 |
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