KR840001777A - 반도체 집적회로 장치 - Google Patents
반도체 집적회로 장치 Download PDFInfo
- Publication number
- KR840001777A KR840001777A KR1019820004389A KR820004389A KR840001777A KR 840001777 A KR840001777 A KR 840001777A KR 1019820004389 A KR1019820004389 A KR 1019820004389A KR 820004389 A KR820004389 A KR 820004389A KR 840001777 A KR840001777 A KR 840001777A
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor integrated
- integrated circuit
- circuit device
- film
- program
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims description 14
- 230000001681 protective effect Effects 0.000 claims 6
- 239000002184 metal Substances 0.000 claims 2
- 238000001465 metallisation Methods 0.000 claims 2
- 230000003247 decreasing effect Effects 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
- 150000002736 metal compounds Chemical class 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5252—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
- H01L23/5254—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Toxicology (AREA)
- Electromagnetism (AREA)
- Health & Medical Sciences (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제4a도는 본 발명에 따르는 반도체 집적회로 장치의 하나의 실시예를 표시하는 평면도.
제4b도는 제4a도에서 A-B선으로 표시된 부분의 단면도.
제4c도는 제4a도에서 C-D선으로 표시된 부분의 단면도.
Claims (10)
- 반도체 기판상에 형성된 절연막 위에 회로의 프로그램용의 배선층을 형성하고, 그 회로 프로그램 용의 배선층의 프로그램부분(절단 또는 접속할 부분)을 제외하고 그 주변에다 레이저광을 막아주는 보호용 마스크를 부설한 것을 특징으로 하는 반도체 집적회로장치.
- 상기의 보호 마스크의 재료와 회로 프로그램용 배선층과의 사이에 절연막을 개재(介在)시키는 것을 특징으로 하는 특허청구의 범위 1의 반도체 집적회로장치.
- 상기의 회로 프로그램용의 배선층으로 2개의 저저항부가 고저항부를 중간에 두고 서로 대향하고 있는 반도체층으로 되어 있고, 상기 고저항부의 저항치가 감소하게 됨으로서 회로구성이 변경되게끔 배치되어 있는 것을 포함하는 반도체 집적회로 장치이고, 이와 같은 상기 고저항부를 마스크로 덮지 않은 회로 프로그램 부분이 되게 한 것을 특징으로 하는 특허청구의 범위 1의 반도체 집적회로장치.
- 상기의 회로 프로그램 배선층으로서 금속화(metaligation)층을 포함하는 것을 특징으로 하는 특허청구의 범위 1의 반도체 집적회로장치.
- 상기의 금속화층이 Al층 또는 Al을 함유하는 층인 것을 특징으로 하는 특허청구의 범위 4의 반도체 집적회로장치.
- 보호 마스크의 막의 재료를 금속 또는 금속화합물로 하는 것을 특징으로 하는 특허청구의 범위 1의 반도체 집적회로장치.
- 보호 마스크로 사용하는 금속막을 AL막으로 하고 이 Al막의 두께를 0.5-2㎛가 되게 한 것을 특징으로 하는 특허청구의 범위 6의 반도체 집적회로장치.
- 보호 마스크의 막이 배선층의 프로그램 부분의 창(프로그램 부분이 노출된 곳)을 경계로 하여 2개 이상의 전기적으로 절연된 부분으로 분리되어 있고 또 이들 마스크의 막이 배선 부분과도 전기적으로 절연되어 있는 것을 특징으로 하는 특허청구 범위 1의 반도체 집적회로 장치.
- 보호 마스크의 막이 프로그램 부분을 갖는 배선층을 양쪽에서 감싸고 있는 형태로 형성된 Al백선층인 것을 특징으로 하는 특허청구의 범위 1의 반도체 집적회로장치.
- ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56-153695 | 1981-09-30 | ||
JP56153695A JPS5856355A (ja) | 1981-09-30 | 1981-09-30 | 半導体集積回路装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR840001777A true KR840001777A (ko) | 1984-05-16 |
KR900002087B1 KR900002087B1 (en) | 1990-03-31 |
Family
ID=15568105
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR8204389A KR900002087B1 (en) | 1981-09-30 | 1982-09-29 | Semiconductor intergruted circuit device |
Country Status (5)
Country | Link |
---|---|
US (1) | US4581628A (ko) |
EP (1) | EP0075926B1 (ko) |
JP (1) | JPS5856355A (ko) |
KR (1) | KR900002087B1 (ko) |
DE (1) | DE3277855D1 (ko) |
Families Citing this family (36)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59957A (ja) * | 1982-06-25 | 1984-01-06 | Fujitsu Ltd | 半導体装置 |
JPS59201441A (ja) * | 1983-04-30 | 1984-11-15 | Toshiba Corp | 集束イオンビ−ムを用いたヒユ−ズ切断方法 |
CA1186070A (en) * | 1983-06-17 | 1985-04-23 | Iain D. Calder | Laser activated polysilicon connections for redundancy |
US4924287A (en) * | 1985-01-20 | 1990-05-08 | Avner Pdahtzur | Personalizable CMOS gate array device and technique |
JPH0789567B2 (ja) * | 1985-02-25 | 1995-09-27 | 株式会社日立製作所 | 半導体装置 |
JPH0719842B2 (ja) * | 1985-05-23 | 1995-03-06 | 三菱電機株式会社 | 半導体装置の冗長回路 |
JPH0821623B2 (ja) * | 1985-09-20 | 1996-03-04 | 株式会社日立製作所 | レ−ザ処理方法 |
US4681778A (en) * | 1985-11-14 | 1987-07-21 | Optical Materials, Inc. | Method and apparatus for making electrical connections utilizing a dielectric-like metal film |
US5329152A (en) * | 1986-11-26 | 1994-07-12 | Quick Technologies Ltd. | Ablative etch resistant coating for laser personalization of integrated circuits |
IL82113A (en) * | 1987-04-05 | 1992-08-18 | Zvi Orbach | Fabrication of customized integrated circuits |
US5223735A (en) * | 1988-09-30 | 1993-06-29 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor integrated circuit device in which circuit functions can be remedied or changed and the method for producing the same |
US4974048A (en) * | 1989-03-10 | 1990-11-27 | The Boeing Company | Integrated circuit having reroutable conductive paths |
JP2816394B2 (ja) * | 1989-10-24 | 1998-10-27 | セイコークロック株式会社 | 半導体装置 |
DE69324637T2 (de) * | 1992-07-31 | 1999-12-30 | Hughes Electronics Corp., El Segundo | Sicherheitssystem für integrierte Schaltung und Verfahren mit implantierten Leitungen |
TW278229B (en) * | 1994-12-29 | 1996-06-11 | Siemens Ag | Fuse structure for an integrated circuit device and method for manufacturing a fuse structure |
JPH0935917A (ja) * | 1995-07-17 | 1997-02-07 | Mitsubishi Electric Corp | 混成集積回路のトリミング装置及びその方法 |
US5783846A (en) * | 1995-09-22 | 1998-07-21 | Hughes Electronics Corporation | Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering |
US5986319A (en) | 1997-03-19 | 1999-11-16 | Clear Logic, Inc. | Laser fuse and antifuse structures formed over the active circuitry of an integrated circuit |
JP3037191B2 (ja) * | 1997-04-22 | 2000-04-24 | 日本電気アイシーマイコンシステム株式会社 | 半導体装置 |
US5973375A (en) * | 1997-06-06 | 1999-10-26 | Hughes Electronics Corporation | Camouflaged circuit structure with step implants |
JP4255142B2 (ja) * | 1998-02-05 | 2009-04-15 | 株式会社ルネサステクノロジ | 半導体装置 |
US6396368B1 (en) | 1999-11-10 | 2002-05-28 | Hrl Laboratories, Llc | CMOS-compatible MEM switches and method of making |
US7217977B2 (en) | 2004-04-19 | 2007-05-15 | Hrl Laboratories, Llc | Covert transformation of transistor properties as a circuit protection method |
US6815816B1 (en) | 2000-10-25 | 2004-11-09 | Hrl Laboratories, Llc | Implanted hidden interconnections in a semiconductor device for preventing reverse engineering |
US7294935B2 (en) * | 2001-01-24 | 2007-11-13 | Hrl Laboratories, Llc | Integrated circuits protected against reverse engineering and method for fabricating the same using an apparent metal contact line terminating on field oxide |
US6791191B2 (en) | 2001-01-24 | 2004-09-14 | Hrl Laboratories, Llc | Integrated circuits protected against reverse engineering and method for fabricating the same using vias without metal terminations |
US6774413B2 (en) | 2001-06-15 | 2004-08-10 | Hrl Laboratories, Llc | Integrated circuit structure with programmable connector/isolator |
US6740942B2 (en) | 2001-06-15 | 2004-05-25 | Hrl Laboratories, Llc. | Permanently on transistor implemented using a double polysilicon layer CMOS process with buried contact |
US6897535B2 (en) | 2002-05-14 | 2005-05-24 | Hrl Laboratories, Llc | Integrated circuit with reverse engineering protection |
US6700161B2 (en) * | 2002-05-16 | 2004-03-02 | International Business Machines Corporation | Variable resistor structure and method for forming and programming a variable resistor for electronic circuits |
US7049667B2 (en) * | 2002-09-27 | 2006-05-23 | Hrl Laboratories, Llc | Conductive channel pseudo block process and circuit to inhibit reverse engineering |
US6979606B2 (en) | 2002-11-22 | 2005-12-27 | Hrl Laboratories, Llc | Use of silicon block process step to camouflage a false transistor |
AU2003293540A1 (en) | 2002-12-13 | 2004-07-09 | Raytheon Company | Integrated circuit modification using well implants |
US7242063B1 (en) | 2004-06-29 | 2007-07-10 | Hrl Laboratories, Llc | Symmetric non-intrusive and covert technique to render a transistor permanently non-operable |
US7675796B2 (en) * | 2005-12-27 | 2010-03-09 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
US8168487B2 (en) * | 2006-09-28 | 2012-05-01 | Hrl Laboratories, Llc | Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3584183A (en) * | 1968-10-03 | 1971-06-08 | North American Rockwell | Laser encoding of diode arrays |
JPS5130437B1 (ko) * | 1970-03-25 | 1976-09-01 | ||
BE794202A (fr) * | 1972-01-19 | 1973-05-16 | Intel Corp | Liaison fusible pour circuit integre sur substrat semi-conducteur pour memoires |
JPS5910587B2 (ja) * | 1977-08-10 | 1984-03-09 | 株式会社日立製作所 | 半導体装置の保護装置 |
US4272775A (en) * | 1978-07-03 | 1981-06-09 | National Semiconductor Corporation | Laser trim protection process and structure |
US4228451A (en) * | 1978-07-21 | 1980-10-14 | Monolithic Memories, Inc. | High resistivity semiconductor resistor device |
JPS582439B2 (ja) * | 1978-11-27 | 1983-01-17 | 富士通株式会社 | ブ−トストラツプ回路 |
US4238839A (en) * | 1979-04-19 | 1980-12-09 | National Semiconductor Corporation | Laser programmable read only memory |
DE3036869C2 (de) * | 1979-10-01 | 1985-09-05 | Hitachi, Ltd., Tokio/Tokyo | Integrierte Halbleiterschaltung und Schaltkreisaktivierverfahren |
JPS56138948A (en) * | 1980-03-31 | 1981-10-29 | Fujitsu Ltd | Manufacture of ic memory |
JPS571244A (en) * | 1980-06-03 | 1982-01-06 | Seiko Epson Corp | Semiconductor device |
JPS5775442A (en) * | 1980-10-29 | 1982-05-12 | Toshiba Corp | Semiconductor device |
JPS58170A (ja) * | 1981-06-24 | 1983-01-05 | Mitsubishi Electric Corp | 半導体装置 |
-
1981
- 1981-09-30 JP JP56153695A patent/JPS5856355A/ja active Granted
-
1982
- 1982-09-27 US US06/424,370 patent/US4581628A/en not_active Expired - Fee Related
- 1982-09-28 EP EP82108968A patent/EP0075926B1/en not_active Expired
- 1982-09-28 DE DE8282108968T patent/DE3277855D1/de not_active Expired
- 1982-09-29 KR KR8204389A patent/KR900002087B1/ko active
Also Published As
Publication number | Publication date |
---|---|
JPS5856355A (ja) | 1983-04-04 |
EP0075926A2 (en) | 1983-04-06 |
EP0075926A3 (en) | 1985-05-08 |
US4581628A (en) | 1986-04-08 |
EP0075926B1 (en) | 1987-12-16 |
KR900002087B1 (en) | 1990-03-31 |
JPH0312464B2 (ko) | 1991-02-20 |
DE3277855D1 (en) | 1988-01-28 |
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