JPWO2009122835A1 - 電子部品モジュール及び該電子部品モジュールの製造方法 - Google Patents
電子部品モジュール及び該電子部品モジュールの製造方法 Download PDFInfo
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- JPWO2009122835A1 JPWO2009122835A1 JP2010505481A JP2010505481A JPWO2009122835A1 JP WO2009122835 A1 JPWO2009122835 A1 JP WO2009122835A1 JP 2010505481 A JP2010505481 A JP 2010505481A JP 2010505481 A JP2010505481 A JP 2010505481A JP WO2009122835 A1 JPWO2009122835 A1 JP WO2009122835A1
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- electronic component
- conductive
- conductive post
- component module
- resin layer
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Abstract
Description
2、3 表面実装部品
4 樹脂層
5 導電体層
6 導電性ポスト
7、8 電極パッド
9 はんだ
11 電子部品モジュール
まず、図1を参照して実施例1の電子部品モジュールの構成を説明する。図1は、本発明の実施例1に係る電子部品モジュール11の構成を示す断面図である。
、これらのセラミック粉末にホウ珪酸等のガラスを混合したガラス複合系材料、ZnO−MgO−Al2 O3 −SiO2 系等の結晶化ガラスを用いた結晶化ガラス系材料、BaO−Al2 O3 −SiO2 系セラミック粉末、Al2 O3 −CaO−SiO2 −MgO−B2 O3 系セラミック粉末等の非ガラス系材料を挙げることができる。低温焼結セラミック材料を用いることによって、層間接続導体、面内配線導体等としてAg、Cu等の低抵抗の低融点金属を用いることができ、その結果、Ag、Cu等を主成分とする導体パターンと未焼成セラミック積層体とを例えば1050℃以下の低温で同時焼成することができる。
図9は、本発明の実施例2に係る電子部品モジュール21の構成を示す断面図である。図9に示す電子部品モジュール21は、表面実装部品2、3、3が搭載された回路基板22と、表面実装部品2、3、3を覆う樹脂層4と、樹脂層4の表面に形成され、アンテナとして機能する導電体層24とを有する。そして、表面実装部品3上には導電性ポスト23が形成されており、表面実装部品3と導電体層24とは導電性ポスト23を介して導電接続されている。
図10は、本発明の実施例3に係る電子部品モジュール31の構成を示す断面図である。図10に示す電子部品モジュール31は、回路基板1の上側の面に表面実装部品2、3、3が搭載され、回路基板1の下側の面に表面実装部品3、3、・・・が搭載された両面実装型の回路基板32をコア基板とするものであり、さらに、回路基板1の上側の面には表面実装部品2、3、3を覆う樹脂層33、回路基板1の下側の面には表面実装部品3、3、・・・を覆う樹脂層34が形成されている。回路基板1の上側の面に搭載された表面実装部品3上には、上述した実施例1と同様の導電性ポスト6が形成されており、表面実装部品3と導電体層5とは導電性ポスト6を介して接続されている。そして、回路基板1の下側の面に搭載された表面実装部品3の外部電極3bは、上述した例と同様、回路基板32側で回路基板32の電極パッド8に接続されるとともに、反対側で導電性ポスト35に接続されている。つまり、導電性ポスト35は表面実装部品3の外部電極3b上に形成されており、導電体層36と表面実装部品3の外部電極3bとは導電性ポスト35を介して電気的に接続されている。
図11は、本発明の実施例4に係る電子部品モジュール41の構成を示す断面図である。図11に示す電子部品モジュール41は、表面実装部品2、3、3が搭載された回路基板42と、表面実装部品2、3、3を覆う樹脂層43と、樹脂層43の表面に設けられた導電体層45とを有する。そして、表面実装部品2上には導電性ポスト44が形成されており、表面実装部品2の素体と導電体層45とは導電性ポスト44を介して接続されている。
図12は、本発明の実施例5に係る電子部品モジュール51の構成を示す断面図である。図12に示す電子部品モジュール51は、表面実装部品3、3、表面実装部品52が搭載された回路基板53と、表面実装部品3、3、52を覆う樹脂層54と、樹脂層54の上面に形成された導電体層55とを有するものである。そして、表面実装部品52上には導電性ポスト56が形成されており、表面実装部品52と導電体層55とは導電性ポスト56を介して電気的に接続されている。
Claims (13)
- 少なくとも1つの表面実装部品が搭載された回路基板と、
前記表面実装部品を覆う樹脂層と、
該樹脂層の表面に形成された導電体層と
を有する電子部品モジュールにおいて、
前記表面実装部品上に少なくとも1つの導電性ポストが形成されており、前記表面実装部品と前記導電体層とが前記導電性ポストを介して導電接続されていることを特徴とする電子部品モジュール。 - 前記導電性ポストは、前記表面実装部品側から前記導電体層側に向かって断面積が漸次小さくなるテーパ形状を有していることを特徴とする請求項1に記載の電子部品モジュール。
- 前記導電性ポストは、流動性を持つ導電材料を所定の厚みに積み重ねた後に固化させることにより形成されていることを特徴とする請求項1又は2に記載の電子部品モジュール。
- 前記表面実装部品は、前記回路基板側とは反対側の表面にも外部電極を備える表面実装部品であって、前記導電性ポストは前記外部電極と導電接続するように形成されていることを特徴とする請求項1乃至3のいずれか一項に記載の電子部品モジュール。
- グランド電位にある前記外部電極と前記導電体層とが前記導電性ポストを介して導電接続されることを特徴とする請求項4に記載の電子部品モジュール。
- 前記外部電極はアンテナに接続される給電電極であり、前記外部電極と前記導電体層とが前記導電性ポストを介して導電接続されることを特徴とする請求項4に記載の電子部品モジュール。
- 前記外部電極はマザーボードに接続される入出力端子であり、前記外部電極と前記導電体層とが前記導電性ポストを介して導電接続されることを特徴とする請求項4に記載の電子部品モジュール。
- 前記表面実装部品は発熱性の表面実装部品であり、前記表面実装部品と前記導電体層とが前記導電性ポストを介して導電接続されることを特徴とする請求項1乃至3のいずれか一項に記載の電子部品モジュール。
- 少なくとも1つの表面実装部品が搭載された回路基板を準備する工程、
前記表面実装部品上に、所定高さの導電性ポストを形成する工程、
前記回路基板上に前記表面実装部品を覆う樹脂層を設け、前記導電性ポストの一部を前記樹脂層の表面に露出させる工程、及び
前記樹脂層の表面に、前記樹脂層の表面に露出した前記導電性ポストに導電接続する導電体層を形成する工程
を含むことを特徴とする電子部品モジュールの製造方法。 - 前記導電性ポストを、前記表面実装部品側から前記導電体層側に向かって断面積が漸次小さくなるテーパ形状を有するように形成することを特徴とする請求項9に記載の電子部品モジュールの製造方法。
- 前記導電性ポストを、流動性を持つ導電材料を所定の厚みに積み重ねた後に固化させることにより形成することを特徴とする請求項9又は10に記載の電子部品モジュールの製造方法。
- 前記流動性を持つ導電材料として導電性溶液を用い、前記導電性溶液を吐出口から複数回にわたって吐出して積み重ねることを特徴とする請求項11に記載の電子部品モジュールの製造方法。
- 前記導電性ポストが覆われるよう前記樹脂層を設け、前記樹脂層の表面に前記導電性ポストの一部が露出するまで前記樹脂層を研磨することを特徴とする請求項9乃至12のいずれか一項に記載の電子部品モジュールの製造方法。
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JP2003258009A (ja) * | 2002-03-05 | 2003-09-12 | Seiko Epson Corp | 半導体装置及びその製造方法、回路基板並びに電子機器 |
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US8315060B2 (en) | 2012-11-20 |
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