JPH09213100A5 - - Google Patents
Info
- Publication number
- JPH09213100A5 JPH09213100A5 JP1996235053A JP23505396A JPH09213100A5 JP H09213100 A5 JPH09213100 A5 JP H09213100A5 JP 1996235053 A JP1996235053 A JP 1996235053A JP 23505396 A JP23505396 A JP 23505396A JP H09213100 A5 JPH09213100 A5 JP H09213100A5
- Authority
- JP
- Japan
- Prior art keywords
- normal
- memory cells
- spare
- memory cell
- test
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23505396A JP3865828B2 (ja) | 1995-11-28 | 1996-09-05 | 半導体記憶装置 |
| KR1019960055343A KR100227058B1 (ko) | 1995-11-28 | 1996-11-19 | 반도체 기억장치 및 그 결함 검사방법 |
| US08/752,419 US5764576A (en) | 1995-11-28 | 1996-11-19 | Semiconductor memory device and method of checking same for defect |
| US09/058,885 US5999464A (en) | 1995-11-28 | 1998-04-13 | Semiconductor memory device and method of checking same for defect |
| US09/385,582 US6301163B1 (en) | 1995-11-28 | 1999-08-27 | Semiconductor memory device and method of checking same for defect |
| US09/912,518 US6400621B2 (en) | 1995-11-28 | 2001-07-26 | Semiconductor memory device and method of checking same for defect |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7-309609 | 1995-11-28 | ||
| JP30960995 | 1995-11-28 | ||
| JP23505396A JP3865828B2 (ja) | 1995-11-28 | 1996-09-05 | 半導体記憶装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPH09213100A JPH09213100A (ja) | 1997-08-15 |
| JPH09213100A5 true JPH09213100A5 (enExample) | 2004-09-09 |
| JP3865828B2 JP3865828B2 (ja) | 2007-01-10 |
Family
ID=26531925
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23505396A Expired - Fee Related JP3865828B2 (ja) | 1995-11-28 | 1996-09-05 | 半導体記憶装置 |
Country Status (3)
| Country | Link |
|---|---|
| US (4) | US5764576A (enExample) |
| JP (1) | JP3865828B2 (enExample) |
| KR (1) | KR100227058B1 (enExample) |
Families Citing this family (53)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3865828B2 (ja) | 1995-11-28 | 2007-01-10 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
| JPH10172298A (ja) * | 1996-12-05 | 1998-06-26 | Mitsubishi Electric Corp | 半導体記憶装置 |
| JPH117761A (ja) * | 1997-06-13 | 1999-01-12 | Toshiba Corp | 画像用メモリ |
| US6003149A (en) * | 1997-08-22 | 1999-12-14 | Micron Technology, Inc. | Test method and apparatus for writing a memory array with a reduced number of cycles |
| US5923610A (en) * | 1997-10-24 | 1999-07-13 | Advanced Array Corp. | Timing scheme for memory arrays |
| US6049505A (en) | 1998-05-22 | 2000-04-11 | Micron Technology, Inc. | Method and apparatus for generating memory addresses for testing memory devices |
| JP2000057781A (ja) * | 1998-08-10 | 2000-02-25 | Univ Kyoto | Exclusive−OR型機能メモリ及びその読出し方法 |
| JP4141656B2 (ja) * | 2000-06-07 | 2008-08-27 | 株式会社東芝 | 半導体メモリ集積回路および半導体メモリ装置をテストする方法 |
| JP2002025291A (ja) | 2000-07-07 | 2002-01-25 | Mitsubishi Electric Corp | 半導体記憶装置 |
| US6407953B1 (en) * | 2001-02-02 | 2002-06-18 | Matrix Semiconductor, Inc. | Memory array organization and related test method particularly well suited for integrated circuits having write-once memory arrays |
| US6889307B1 (en) | 2001-11-16 | 2005-05-03 | Matrix Semiconductor, Inc. | Integrated circuit incorporating dual organization memory array |
| DE60323232D1 (de) * | 2002-07-08 | 2008-10-09 | Nxp Bv | Elektronische schaltung mit prüfeinheit zur prüfung von verbindungsleitungen |
| JP4497801B2 (ja) * | 2002-08-27 | 2010-07-07 | Okiセミコンダクタ株式会社 | 半導体記憶装置 |
| KR100484254B1 (ko) * | 2002-10-31 | 2005-04-22 | 주식회사 하이닉스반도체 | 반도체 메모리 장치의 리던던시 회로 및 그를 이용한 페일구제방법 |
| US6920072B2 (en) * | 2003-02-28 | 2005-07-19 | Union Semiconductor Technology Corporation | Apparatus and method for testing redundant memory elements |
| US20070070210A1 (en) * | 2003-04-11 | 2007-03-29 | Piccionelli Gregory A | Video production with selectable camera angles |
| JP2004328545A (ja) * | 2003-04-25 | 2004-11-18 | Sharp Corp | デコード回路ならびにそれを用いるディスク記録/再生装置の受光アンプ回路および光学ピックアップ |
| US7509543B2 (en) * | 2003-06-17 | 2009-03-24 | Micron Technology, Inc. | Circuit and method for error test, recordation, and repair |
| JP4424952B2 (ja) * | 2003-09-16 | 2010-03-03 | 株式会社ルネサステクノロジ | 不揮発性半導体記憶装置 |
| JP2005267817A (ja) * | 2004-03-22 | 2005-09-29 | Oki Electric Ind Co Ltd | 半導体記憶装置と冗長救済アドレスの読出方法 |
| US20050285222A1 (en) | 2004-06-29 | 2005-12-29 | Kong-Beng Thei | New fuse structure |
| JP2006107590A (ja) * | 2004-10-04 | 2006-04-20 | Nec Electronics Corp | 半導体集積回路装置及びそのテスト方法 |
| US7729185B2 (en) * | 2007-11-01 | 2010-06-01 | Arm Limited | Apparatus and method for detection of address decoder open faults |
| CN101441587B (zh) * | 2007-11-19 | 2011-05-18 | 辉达公司 | 用于自动分析gpu测试结果的方法和系统 |
| US8132131B2 (en) * | 2007-12-18 | 2012-03-06 | International Business Machines Corporation | Design structure including failing address register and compare logic for multi-pass repair of memory arrays |
| US20090154270A1 (en) * | 2007-12-18 | 2009-06-18 | Barth Jr John E | Failing address register and compare logic for multi-pass repair of memory arrays |
| US7872902B2 (en) * | 2008-08-18 | 2011-01-18 | Qimonda Ag | Integrated circuit with bit lines positioned in different planes |
| US8316175B2 (en) | 2009-11-03 | 2012-11-20 | Inphi Corporation | High throughput flash memory system |
| US9170878B2 (en) | 2011-04-11 | 2015-10-27 | Inphi Corporation | Memory buffer with data scrambling and error correction |
| US8472265B2 (en) * | 2011-05-10 | 2013-06-25 | Elite Semiconductor Memory Technology Inc. | Repairing circuit for memory circuit and method thereof and memory circuit using the same |
| JP5737003B2 (ja) * | 2011-06-27 | 2015-06-17 | 富士通セミコンダクター株式会社 | 半導体メモリ、システムおよび半導体メモリの製造方法 |
| US8902638B2 (en) * | 2011-09-16 | 2014-12-02 | Inphi Corporation | Replacement of a faulty memory cell with a spare cell for a memory circuit |
| US9158726B2 (en) | 2011-12-16 | 2015-10-13 | Inphi Corporation | Self terminated dynamic random access memory |
| US8949473B1 (en) | 2012-02-16 | 2015-02-03 | Inphi Corporation | Hybrid memory blade |
| US9069717B1 (en) | 2012-03-06 | 2015-06-30 | Inphi Corporation | Memory parametric improvements |
| US8861277B1 (en) | 2012-06-26 | 2014-10-14 | Inphi Corporation | Method of using non-volatile memories for on-DIMM memory address list storage |
| US9647799B2 (en) | 2012-10-16 | 2017-05-09 | Inphi Corporation | FEC coding identification |
| US10185499B1 (en) | 2014-01-07 | 2019-01-22 | Rambus Inc. | Near-memory compute module |
| US9553670B2 (en) | 2014-03-03 | 2017-01-24 | Inphi Corporation | Optical module |
| US9874800B2 (en) | 2014-08-28 | 2018-01-23 | Inphi Corporation | MZM linear driver for silicon photonics device characterized as two-channel wavelength combiner and locker |
| KR20160031631A (ko) * | 2014-09-12 | 2016-03-23 | 삼성전자주식회사 | 반도체 메모리 장치의 리던던시 영역 테스트 방법 |
| US9325419B1 (en) | 2014-11-07 | 2016-04-26 | Inphi Corporation | Wavelength control of two-channel DEMUX/MUX in silicon photonics |
| US9473090B2 (en) | 2014-11-21 | 2016-10-18 | Inphi Corporation | Trans-impedance amplifier with replica gain control |
| US9553689B2 (en) | 2014-12-12 | 2017-01-24 | Inphi Corporation | Temperature insensitive DEMUX/MUX in silicon photonics |
| US9461677B1 (en) | 2015-01-08 | 2016-10-04 | Inphi Corporation | Local phase correction |
| US9484960B1 (en) | 2015-01-21 | 2016-11-01 | Inphi Corporation | Reconfigurable FEC |
| US9547129B1 (en) | 2015-01-21 | 2017-01-17 | Inphi Corporation | Fiber coupler for silicon photonics |
| US9548726B1 (en) | 2015-02-13 | 2017-01-17 | Inphi Corporation | Slew-rate control and waveshape adjusted drivers for improving signal integrity on multi-loads transmission line interconnects |
| US9632390B1 (en) | 2015-03-06 | 2017-04-25 | Inphi Corporation | Balanced Mach-Zehnder modulator |
| US9847839B2 (en) | 2016-03-04 | 2017-12-19 | Inphi Corporation | PAM4 transceivers for high-speed communication |
| KR102650154B1 (ko) * | 2016-12-08 | 2024-03-22 | 삼성전자주식회사 | 가상 페일 생성기를 포함하는 메모리 장치 및 그것의 메모리 셀 리페어 방법 |
| KR102096668B1 (ko) | 2019-12-24 | 2020-04-03 | (주)코리아시스템 | 발광 디바이스 |
| US11880607B2 (en) * | 2020-12-02 | 2024-01-23 | Mediatek Singapore Pte. Ltd. | Memory with fuse pins shared by multiple-type repairs |
Family Cites Families (26)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4055754A (en) * | 1975-12-22 | 1977-10-25 | Chesley Gilman D | Memory device and method of testing the same |
| JPS62293598A (ja) * | 1986-06-12 | 1987-12-21 | Toshiba Corp | 半導体記憶装置 |
| DE3751002T2 (de) * | 1986-10-20 | 1995-10-05 | Nippon Telegraph & Telephone | Halbleiterspeicher. |
| JPH02310898A (ja) * | 1989-05-25 | 1990-12-26 | Nec Corp | メモリ回路 |
| JPH031397A (ja) * | 1989-05-29 | 1991-01-08 | Fujitsu Ltd | 半導体集積回路 |
| JP2773271B2 (ja) * | 1989-07-26 | 1998-07-09 | 日本電気株式会社 | 半導体記憶装置 |
| US4996670A (en) * | 1989-09-28 | 1991-02-26 | International Business Machines Corporation | Zero standby power, radiation hardened, memory redundancy circuit |
| JPH0752597B2 (ja) * | 1989-10-30 | 1995-06-05 | 三菱電機株式会社 | 半導体メモリ装置 |
| JPH0468719A (ja) * | 1990-07-04 | 1992-03-04 | Mitsubishi Electric Corp | 通信装置 |
| FR2665793B1 (fr) * | 1990-08-10 | 1993-06-18 | Sgs Thomson Microelectronics | Circuit integre de memoire avec redondance et adressage ameliore en mode de test. |
| EP0503100B1 (en) * | 1990-10-02 | 1998-05-27 | Kabushiki Kaisha Toshiba | Semiconductor memory |
| US5343429A (en) * | 1991-12-06 | 1994-08-30 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device having redundant circuit and method of testing to see whether or not redundant circuit is used therein |
| US5313424A (en) * | 1992-03-17 | 1994-05-17 | International Business Machines Corporation | Module level electronic redundancy |
| US5327382A (en) * | 1992-09-09 | 1994-07-05 | Katsunori Seno | Method of testing redundant memory cells |
| US5377146A (en) * | 1993-07-23 | 1994-12-27 | Alliance Semiconductor Corporation | Hierarchical redundancy scheme for high density monolithic memories |
| US5404331A (en) * | 1993-07-30 | 1995-04-04 | Sgs-Thomson Microelectronics, Inc. | Redundancy element check in IC memory without programming substitution of redundant elements |
| KR0133832B1 (ko) * | 1993-12-28 | 1998-04-23 | 김주용 | 리던던시 로오/컬럼 프리테스트 장치 |
| JPH07226100A (ja) * | 1994-02-15 | 1995-08-22 | Nec Corp | 半導体メモリ装置 |
| US5530674A (en) * | 1994-04-29 | 1996-06-25 | Sgs-Thomson Microelectronics, Inc. | Structure capable of simultaneously testing redundant and non-redundant memory elements during stress testing of an integrated circuit memory device |
| JPH0817197A (ja) * | 1994-06-30 | 1996-01-19 | Fujitsu Ltd | 半導体記憶装置 |
| JPH08259899A (ja) * | 1995-03-23 | 1996-10-08 | Three Bond Co Ltd | シアノアクリレート系接着剤組成物 |
| JP3774500B2 (ja) * | 1995-05-12 | 2006-05-17 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
| US5631868A (en) * | 1995-11-28 | 1997-05-20 | International Business Machines Corporation | Method and apparatus for testing redundant word and bit lines in a memory array |
| JP3865828B2 (ja) * | 1995-11-28 | 2007-01-10 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
| US6002621A (en) * | 1996-12-12 | 1999-12-14 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device |
| JP2000260199A (ja) * | 1999-03-04 | 2000-09-22 | Nec Corp | 半導体記憶装置 |
-
1996
- 1996-09-05 JP JP23505396A patent/JP3865828B2/ja not_active Expired - Fee Related
- 1996-11-19 US US08/752,419 patent/US5764576A/en not_active Expired - Fee Related
- 1996-11-19 KR KR1019960055343A patent/KR100227058B1/ko not_active Expired - Fee Related
-
1998
- 1998-04-13 US US09/058,885 patent/US5999464A/en not_active Expired - Lifetime
-
1999
- 1999-08-27 US US09/385,582 patent/US6301163B1/en not_active Expired - Lifetime
-
2001
- 2001-07-26 US US09/912,518 patent/US6400621B2/en not_active Expired - Fee Related
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