JP3865828B2 - 半導体記憶装置 - Google Patents

半導体記憶装置 Download PDF

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Publication number
JP3865828B2
JP3865828B2 JP23505396A JP23505396A JP3865828B2 JP 3865828 B2 JP3865828 B2 JP 3865828B2 JP 23505396 A JP23505396 A JP 23505396A JP 23505396 A JP23505396 A JP 23505396A JP 3865828 B2 JP3865828 B2 JP 3865828B2
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JP
Japan
Prior art keywords
normal
memory cell
spare
test
row
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP23505396A
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English (en)
Japanese (ja)
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JPH09213100A (ja
JPH09213100A5 (enExample
Inventor
秀人 日高
幹雄 朝倉
清広 古谷
哲夫 加藤
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Renesas Technology Corp
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Renesas Technology Corp
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Filing date
Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to JP23505396A priority Critical patent/JP3865828B2/ja
Priority to KR1019960055343A priority patent/KR100227058B1/ko
Priority to US08/752,419 priority patent/US5764576A/en
Publication of JPH09213100A publication Critical patent/JPH09213100A/ja
Priority to US09/058,885 priority patent/US5999464A/en
Priority to US09/385,582 priority patent/US6301163B1/en
Priority to US09/912,518 priority patent/US6400621B2/en
Publication of JPH09213100A5 publication Critical patent/JPH09213100A5/ja
Application granted granted Critical
Publication of JP3865828B2 publication Critical patent/JP3865828B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
    • G11C29/24—Accessing extra cells, e.g. dummy cells or redundant cells
    • H10P74/00—
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
    • G11C29/802—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout by encoding redundancy signals

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  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
JP23505396A 1995-11-28 1996-09-05 半導体記憶装置 Expired - Fee Related JP3865828B2 (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP23505396A JP3865828B2 (ja) 1995-11-28 1996-09-05 半導体記憶装置
KR1019960055343A KR100227058B1 (ko) 1995-11-28 1996-11-19 반도체 기억장치 및 그 결함 검사방법
US08/752,419 US5764576A (en) 1995-11-28 1996-11-19 Semiconductor memory device and method of checking same for defect
US09/058,885 US5999464A (en) 1995-11-28 1998-04-13 Semiconductor memory device and method of checking same for defect
US09/385,582 US6301163B1 (en) 1995-11-28 1999-08-27 Semiconductor memory device and method of checking same for defect
US09/912,518 US6400621B2 (en) 1995-11-28 2001-07-26 Semiconductor memory device and method of checking same for defect

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP7-309609 1995-11-28
JP30960995 1995-11-28
JP23505396A JP3865828B2 (ja) 1995-11-28 1996-09-05 半導体記憶装置

Publications (3)

Publication Number Publication Date
JPH09213100A JPH09213100A (ja) 1997-08-15
JPH09213100A5 JPH09213100A5 (enExample) 2004-09-09
JP3865828B2 true JP3865828B2 (ja) 2007-01-10

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JP23505396A Expired - Fee Related JP3865828B2 (ja) 1995-11-28 1996-09-05 半導体記憶装置

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US (4) US5764576A (enExample)
JP (1) JP3865828B2 (enExample)
KR (1) KR100227058B1 (enExample)

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US8132131B2 (en) * 2007-12-18 2012-03-06 International Business Machines Corporation Design structure including failing address register and compare logic for multi-pass repair of memory arrays
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US8316175B2 (en) 2009-11-03 2012-11-20 Inphi Corporation High throughput flash memory system
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US8472265B2 (en) * 2011-05-10 2013-06-25 Elite Semiconductor Memory Technology Inc. Repairing circuit for memory circuit and method thereof and memory circuit using the same
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US8902638B2 (en) * 2011-09-16 2014-12-02 Inphi Corporation Replacement of a faulty memory cell with a spare cell for a memory circuit
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US8949473B1 (en) 2012-02-16 2015-02-03 Inphi Corporation Hybrid memory blade
US9069717B1 (en) 2012-03-06 2015-06-30 Inphi Corporation Memory parametric improvements
US8861277B1 (en) 2012-06-26 2014-10-14 Inphi Corporation Method of using non-volatile memories for on-DIMM memory address list storage
US9647799B2 (en) 2012-10-16 2017-05-09 Inphi Corporation FEC coding identification
US10185499B1 (en) 2014-01-07 2019-01-22 Rambus Inc. Near-memory compute module
US9553670B2 (en) 2014-03-03 2017-01-24 Inphi Corporation Optical module
US9874800B2 (en) 2014-08-28 2018-01-23 Inphi Corporation MZM linear driver for silicon photonics device characterized as two-channel wavelength combiner and locker
KR20160031631A (ko) * 2014-09-12 2016-03-23 삼성전자주식회사 반도체 메모리 장치의 리던던시 영역 테스트 방법
US9325419B1 (en) 2014-11-07 2016-04-26 Inphi Corporation Wavelength control of two-channel DEMUX/MUX in silicon photonics
US9473090B2 (en) 2014-11-21 2016-10-18 Inphi Corporation Trans-impedance amplifier with replica gain control
US9553689B2 (en) 2014-12-12 2017-01-24 Inphi Corporation Temperature insensitive DEMUX/MUX in silicon photonics
US9461677B1 (en) 2015-01-08 2016-10-04 Inphi Corporation Local phase correction
US9484960B1 (en) 2015-01-21 2016-11-01 Inphi Corporation Reconfigurable FEC
US9547129B1 (en) 2015-01-21 2017-01-17 Inphi Corporation Fiber coupler for silicon photonics
US9548726B1 (en) 2015-02-13 2017-01-17 Inphi Corporation Slew-rate control and waveshape adjusted drivers for improving signal integrity on multi-loads transmission line interconnects
US9632390B1 (en) 2015-03-06 2017-04-25 Inphi Corporation Balanced Mach-Zehnder modulator
US9847839B2 (en) 2016-03-04 2017-12-19 Inphi Corporation PAM4 transceivers for high-speed communication
KR102650154B1 (ko) * 2016-12-08 2024-03-22 삼성전자주식회사 가상 페일 생성기를 포함하는 메모리 장치 및 그것의 메모리 셀 리페어 방법
KR102096668B1 (ko) 2019-12-24 2020-04-03 (주)코리아시스템 발광 디바이스
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Also Published As

Publication number Publication date
JPH09213100A (ja) 1997-08-15
US6400621B2 (en) 2002-06-04
US20020006064A1 (en) 2002-01-17
US6301163B1 (en) 2001-10-09
US5764576A (en) 1998-06-09
US5999464A (en) 1999-12-07
KR100227058B1 (ko) 1999-10-15
KR970030588A (ko) 1997-06-26

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