JP6005347B2 - 半導体装置の作製方法 - Google Patents
半導体装置の作製方法 Download PDFInfo
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- JP6005347B2 JP6005347B2 JP2011196867A JP2011196867A JP6005347B2 JP 6005347 B2 JP6005347 B2 JP 6005347B2 JP 2011196867 A JP2011196867 A JP 2011196867A JP 2011196867 A JP2011196867 A JP 2011196867A JP 6005347 B2 JP6005347 B2 JP 6005347B2
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- oxide semiconductor
- film
- semiconductor film
- insulating film
- transistor
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/564—Details not otherwise provided for, e.g. protection against moisture
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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Description
本実施の形態では、結晶性酸化物半導体の作製方法、及び当該酸化物半導体を用いたトランジスタの作製方法について、図1及び図2を用いて説明する。図1は、半導体装置の構成の一形態であるトランジスタの作製工程を示す断面図であり、図2の一点破線A−Bの断面図は図1(E)に相当する。本実施の形態では、トップゲート構造のトランジスタを用いて説明する。
本実施の形態では、実施の形態1と異なる構造のトランジスタの作製方法について、図5及び図6を用いて説明する。本実施の形態では、酸化物絶縁膜及び結晶性酸化物半導体膜の間に一対の電極が設けられる点が実施の形態1と異なる。なお、図6の一点破線C−Dの断面図は図5(D)に相当する。
本実施の形態では、実施の形態1及び実施の形態2と異なるトランジスタについて、図7及び図8を用いて説明する。本実施の形態では、ゲート電極が基板側に設けられるボトムゲート構造のトランジスタである点が実施の形態1及び実施の形態2と異なる。なお、図8の一点破線E−Fの断面図は図7(C)に相当する。
本実施の形態では、実施の形態3とは異なるボトムゲート型のトランジスタについて、図9及び図10を用いて説明する。本実施の形態では、ゲート絶縁膜及び酸化物半導体膜の間に一対の電極が設けられる点が実施の形態3と異なる。なお、図10の一点破線G−Hの断面図は図9(D)に相当する。
本実施の形態では、実施の形態1乃至実施の形態4において、複数のゲート電極を有するトランジスタについて説明する。ここでは、実施の形態3に示すトランジスタを用いて説明するが、実施の形態1、実施の形態2及び実施の形態4に適宜適用することができる。
本実施の形態では、実施の形態1乃至実施の形態5と比較して、結晶性酸化物半導体膜及び一対の電極の接触抵抗を低減できるトランジスタの作製方法について、説明する。
本実施の形態では、実施の形態1に示した酸化物絶縁膜53の形成から加熱処理を行い、ソース電極またはドレイン電極となる導電膜を形成するまでの工程を大気に触れることなく連続的に行う製造装置の一例を図13に示す。
本実施の形態では、実施の形態1乃至7に示す酸化物半導体を用いたトランジスタを使用し、電力が供給されない状況でも記憶内容の保持が可能で、かつ、書き込み回数にも制限が無い、新たな構造の半導体装置の一例を示す。
本実施の形態では、同一基板上に少なくとも駆動回路の一部と、画素部に配置するトランジスタを作製する例について以下に説明する。
本明細書に開示する半導体装置は、さまざまな電子機器(遊技機も含む)に適用することができる。電子機器としては、例えば、テレビジョン装置(テレビ、またはテレビジョン受信機ともいう)、コンピュータ用などのモニタ、デジタルカメラ、デジタルビデオカメラ等のカメラ、デジタルフォトフレーム、携帯電話機(携帯電話、携帯電話装置ともいう)、携帯型ゲーム機、携帯情報端末、音響再生装置、パチンコ機などの大型ゲーム機などが挙げられる。上記実施の形態で説明した半導体装置を具備する電子機器の例について説明する。
13 搬送室
14 カセットポート
15 基板加熱室
31 処理室
33 排気手段
35 ガス供給手段
37 電源装置
40 基板支持体
41 ターゲット
43 イオン
51 基板
53 酸化物絶縁膜
55 結晶性酸化物半導体膜
57 結晶性酸化物半導体膜
59 結晶性酸化物半導体膜
61 電極
63 ゲート絶縁膜
65 ゲート電極
69 絶縁膜
71 電極
73 結晶性酸化物半導体膜
75 結晶性酸化物半導体膜
77 ゲート絶縁膜
79 ゲート電極
81 絶縁膜
83 配線
84 バッファ
85 バッファ
87 バッファ
91 ゲート電極
93 ゲート絶縁膜
95 結晶性酸化物半導体膜
99 結晶性酸化物半導体膜
101 電極
103 絶縁膜
105 電極
107 結晶性酸化物半導体膜
109 結晶性酸化物半導体膜
10a スパッタ装置
10b スパッタ装置
10c スパッタ装置
110 保護絶縁膜
111 保護膜
113 バックゲート電極
115 絶縁膜
120 トランジスタ
128 層間絶縁膜
12a ロードロック室
200 基板
206 素子分離絶縁膜
208 ゲート絶縁膜
210 ゲート電極
214 不純物領域
216 チャネル形成領域
218 サイドウォール絶縁膜
220 高濃度不純物領域
224 金属化合物領域
226 層間絶縁膜
248 電極
260 トランジスタ
265 容量素子
55a 種結晶
55b 結晶性酸化物半導体膜
602 ゲート配線
603 ゲート配線
616 ソース電極またはドレイン電極
628 トランジスタ
629 トランジスタ
651 液晶素子
652 液晶素子
690 容量配線
230a ソース電極またはドレイン電極
230b ソース電極またはドレイン電極
242a 配線
242b 配線
2800 筐体
2801 筐体
2802 表示パネル
2803 スピーカー
2804 マイクロフォン
2805 操作キー
2806 ポインティングデバイス
2807 カメラ用レンズ
2808 外部接続端子
2810 太陽電池セル
2811 外部メモリスロット
3001 本体
3002 筐体
3004 キーボードボタン
3021 本体
3022 固定部
3023 表示部
3024 操作ボタン
3025 外部メモリスロット
5300 基板
5301 画素部
5302 走査線駆動回路
5303 走査線駆動回路
5304 信号線駆動回路
6400 画素
6401 スイッチング用トランジスタ
6402 駆動用トランジスタ
6403 容量素子
6404 発光素子
6405 信号線
6406 走査線
6407 電源線
6408 共通電極
9600 テレビジョン装置
9601 筐体
9602 記憶媒体再生録画部
9603 表示部
9604 外部接続端子
9605 スタンド
9606 外部メモリ
3003a 表示部
3003b 表示部
Claims (3)
- 基板上に酸化物絶縁膜を形成する工程と、
前記基板を200℃以上400℃以下で加熱しながら、前記酸化物絶縁膜上に酸化物半導体膜を形成する工程と、
前記酸化物半導体膜を不活性ガス雰囲気で加熱する工程と、を有し、
前記酸化物半導体膜は、インジウムと、亜鉛と、ガリウムとを有し、
前記酸化物半導体膜は、a−b面において六角形の格子を有する結合を有し、且つ前記基板の平面に概略垂直なc軸を有する六方晶構造の結晶を有することを特徴とする半導体装置の作製方法。 - 請求項1において、
前記酸化物半導体膜を加熱する工程において、前記酸化物絶縁膜から前記酸化物半導体膜に酸素が供給されることを特徴とする半導体装置の作製方法。 - 請求項1または請求項2において、
前記酸化物半導体膜を加熱する工程における加熱温度は、前記酸化物半導体膜を形成する工程での前記基板の加熱温度よりも、高いことを特徴とする半導体装置の作製方法。
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