JP5675443B2 - 配線基板及び配線基板の製造方法 - Google Patents

配線基板及び配線基板の製造方法 Download PDF

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Publication number
JP5675443B2
JP5675443B2 JP2011048021A JP2011048021A JP5675443B2 JP 5675443 B2 JP5675443 B2 JP 5675443B2 JP 2011048021 A JP2011048021 A JP 2011048021A JP 2011048021 A JP2011048021 A JP 2011048021A JP 5675443 B2 JP5675443 B2 JP 5675443B2
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JP
Japan
Prior art keywords
layer
metal layer
pad
insulating layer
plating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2011048021A
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English (en)
Japanese (ja)
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JP2012186296A5 (enExample
JP2012186296A (ja
Inventor
金子　健太郎
健太郎 金子
利晃 青木
利晃 青木
浩己 伝田
浩己 伝田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2011048021A priority Critical patent/JP5675443B2/ja
Priority to US13/410,031 priority patent/US9236334B2/en
Publication of JP2012186296A publication Critical patent/JP2012186296A/ja
Publication of JP2012186296A5 publication Critical patent/JP2012186296A5/ja
Application granted granted Critical
Publication of JP5675443B2 publication Critical patent/JP5675443B2/ja
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Classifications

    • H10W90/701—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
    • H10W70/65—
    • H10W70/6525—
    • H10W70/66—
    • H10W70/687—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0307—Providing micro- or nanometer scale roughness on a metal surface, e.g. by plating of nodules or dendrites
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4661—Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor
    • H10W70/685—
    • H10W72/884—
    • H10W74/15—
    • H10W90/724—
    • H10W90/734—
    • H10W90/754—

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)
JP2011048021A 2011-03-04 2011-03-04 配線基板及び配線基板の製造方法 Active JP5675443B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2011048021A JP5675443B2 (ja) 2011-03-04 2011-03-04 配線基板及び配線基板の製造方法
US13/410,031 US9236334B2 (en) 2011-03-04 2012-03-01 Wiring substrate and method for manufacturing wiring substrates

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011048021A JP5675443B2 (ja) 2011-03-04 2011-03-04 配線基板及び配線基板の製造方法

Publications (3)

Publication Number Publication Date
JP2012186296A JP2012186296A (ja) 2012-09-27
JP2012186296A5 JP2012186296A5 (enExample) 2014-01-09
JP5675443B2 true JP5675443B2 (ja) 2015-02-25

Family

ID=46752589

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011048021A Active JP5675443B2 (ja) 2011-03-04 2011-03-04 配線基板及び配線基板の製造方法

Country Status (2)

Country Link
US (1) US9236334B2 (enExample)
JP (1) JP5675443B2 (enExample)

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JP6266907B2 (ja) * 2013-07-03 2018-01-24 新光電気工業株式会社 配線基板及び配線基板の製造方法
JP6161437B2 (ja) * 2013-07-03 2017-07-12 新光電気工業株式会社 配線基板及びその製造方法、半導体パッケージ
JP6131135B2 (ja) * 2013-07-11 2017-05-17 新光電気工業株式会社 配線基板及びその製造方法
JP6223909B2 (ja) * 2013-07-11 2017-11-01 新光電気工業株式会社 配線基板及びその製造方法
KR20150040577A (ko) * 2013-10-07 2015-04-15 삼성전기주식회사 패키지 기판
TWI550801B (zh) * 2013-11-13 2016-09-21 南茂科技股份有限公司 封裝結構及其製造方法
US20160233188A1 (en) * 2013-12-02 2016-08-11 Smartrac Technology Gmbh Contact bumps methods of making contact bumps
KR20150064976A (ko) * 2013-12-04 2015-06-12 삼성전기주식회사 인쇄회로기판 및 그 제조방법
US10020275B2 (en) * 2013-12-26 2018-07-10 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductive packaging device and manufacturing method thereof
US20150195912A1 (en) * 2014-01-08 2015-07-09 Zhuhai Advanced Chip Carriers & Electronic Substrate Solutions Technologies Co. Ltd. Substrates With Ultra Fine Pitch Flip Chip Bumps
JP6133227B2 (ja) * 2014-03-27 2017-05-24 新光電気工業株式会社 配線基板及びその製造方法
KR102211741B1 (ko) * 2014-07-21 2021-02-03 삼성전기주식회사 인쇄회로기판 및 인쇄회로기판의 제조 방법
JP5795415B1 (ja) * 2014-08-29 2015-10-14 新光電気工業株式会社 配線基板及びその製造方法
JP6626687B2 (ja) * 2015-10-28 2019-12-25 新光電気工業株式会社 配線基板、半導体装置及び配線基板の製造方法
JP2017084997A (ja) * 2015-10-29 2017-05-18 イビデン株式会社 プリント配線板及びその製造方法
JP6619294B2 (ja) * 2016-05-24 2019-12-11 新光電気工業株式会社 配線基板及びその製造方法と電子部品装置
JP6594264B2 (ja) * 2016-06-07 2019-10-23 新光電気工業株式会社 配線基板及び半導体装置、並びにそれらの製造方法
TWI712344B (zh) * 2017-08-18 2020-12-01 景碩科技股份有限公司 可做電性測試的多層電路板及其製法
TWI719241B (zh) * 2017-08-18 2021-02-21 景碩科技股份有限公司 可做電性測試的多層電路板及其製法
KR102531762B1 (ko) 2017-09-29 2023-05-12 엘지이노텍 주식회사 인쇄회로기판 및 이의 제조 방법
US11257745B2 (en) 2017-09-29 2022-02-22 Intel Corporation Electroless metal-defined thin pad first level interconnects for lithographically defined vias
US10347507B2 (en) * 2017-09-29 2019-07-09 Lg Innotek Co., Ltd. Printed circuit board
KR102551747B1 (ko) * 2018-09-13 2023-07-06 삼성전자주식회사 반도체 패키지
CN110783728A (zh) * 2018-11-09 2020-02-11 广州方邦电子股份有限公司 一种柔性连接器及制作方法
JP2020188209A (ja) * 2019-05-16 2020-11-19 イビデン株式会社 プリント配線板とプリント配線板の製造方法
US10950531B2 (en) 2019-05-30 2021-03-16 Advanced Semiconductor Engineering, Inc. Semiconductor device package and method of manufacturing the same
US20210111110A1 (en) * 2019-10-09 2021-04-15 Advanced Semiconductor Engineering, Inc. Semiconductor device package
JP2021132068A (ja) * 2020-02-18 2021-09-09 イビデン株式会社 プリント配線板、プリント配線板の製造方法
US12191161B2 (en) * 2020-12-23 2025-01-07 Intel Corporation Multi-step isotropic etch patterning of thick copper layers for forming high aspect-ratio conductors
CN116528466A (zh) * 2022-01-21 2023-08-01 奥特斯奥地利科技与系统技术有限公司 具有突出部的部件承载件和制造方法
KR20230140717A (ko) * 2022-03-30 2023-10-10 엘지이노텍 주식회사 회로 기판 및 이를 포함하는 반도체 패키지
CN116895636B (zh) * 2023-09-11 2024-01-12 芯爱科技(南京)有限公司 封装基板及其制法

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JP2008004687A (ja) * 2006-06-21 2008-01-10 Shinko Electric Ind Co Ltd 半導体装置の製造方法
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Publication number Publication date
US20120222894A1 (en) 2012-09-06
US9236334B2 (en) 2016-01-12
JP2012186296A (ja) 2012-09-27

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