JP5631574B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP5631574B2 JP5631574B2 JP2009254181A JP2009254181A JP5631574B2 JP 5631574 B2 JP5631574 B2 JP 5631574B2 JP 2009254181 A JP2009254181 A JP 2009254181A JP 2009254181 A JP2009254181 A JP 2009254181A JP 5631574 B2 JP5631574 B2 JP 5631574B2
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Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136213—Storage capacitors associated with the pixel electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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Description
図1に薄膜トランジスタ170を基板上に設ける例を示す。なお、図1は薄膜トランジスタの断面図の一例である。
酸化物半導体層と接するソース電極の側面の角度θ1及びドレイン電極の側面の角度θ2を20°以上90°未満とし、ソース電極及びドレイン電極の側面における電極上端から電極下端までの距離を大きくすることによって第1の電界集中緩和領域106aの長さL1及び第2電界集中緩和領域106bの長さL2を長くして電界集中を緩和させる。さらに、ソース電極及びドレイン電極の膜厚を厚くすることによっても電極側面における電極上端から電極下端までの距離を大きくできる。
図1では、ソース電極層(ドレイン電極層)側面の下端を始点としソース電極層(ドレイン電極層)側面の上端を結んだ直線がソース電極層(ドレイン電極層)側面の傾きにほぼ一致する例を示したが、本実施の形態では、ソース電極層(ドレイン電極層)側面に段差を有する例を図2を用いて説明する。少なくともソース電極層の下端部の側面の角度θ1、及びドレイン電極層の下端部の側面の角度θ2が20°以上90°未満であれば、電極側面に段差を有してもよい。なお、図2において図1と共通の部分には同じ符号を用いる。
本実施の形態では、薄膜トランジスタ及びその作製工程について、図3乃至図9を用いて説明する。
本実施の形態では、半導体装置として電子ペーパーの例を示す。
本実施の形態では、半導体装置の一例である表示装置において、同一基板上に少なくとも駆動回路の一部と、画素部に配置する薄膜トランジスタを作製する例について以下に説明する。
本実施の形態では、半導体装置として発光表示装置の例を示す。表示装置の有する表示素子としては、ここではエレクトロルミネッセンスを利用する発光素子を用いて示す。エレクトロルミネッセンスを利用する発光素子は、発光材料が有機化合物であるか、無機化合物であるかによって区別され、一般的に、前者は有機EL素子、後者は無機EL素子と呼ばれている。
本実施の形態では、半導体装置の一形態に相当する液晶表示パネルの上面及び断面について、図20(A1)、図20(A2)、図20(B)を用いて説明する。図20(A1)、図20(A2)は、第1の基板4001上に形成された実施の形態1で示したIn−Ga−Zn−O系非単結晶膜を半導体層として含む薄膜トランジスタ4010、4011、及び液晶素子4013を、第2の基板4006との間にシール材4005によって封止した、パネルの上面図であり、図20(B)は、図20(A1)、図20(A2)のM−Nにおける断面図に相当する。
電子ペーパーは、情報を表示するものであればあらゆる分野の電子機器に用いることが可能である。例えば、電子ペーパーを用いて、電子書籍(電子ブック)、ポスター、電車などの乗り物の車内広告、クレジットカード等の各種カードにおける表示等に適用することができる。電子機器の一例を図23、図24に示す。
半導体装置は、さまざまな電子機器(遊技機も含む)に適用することができる。電子機器としては、例えば、テレビジョン装置(テレビ、またはテレビジョン受信機ともいう)、コンピュータ用などのモニタ、デジタルカメラ、デジタルビデオカメラ、デジタルフォトフレーム、携帯電話機(携帯電話、携帯電話装置ともいう)、携帯型ゲーム機、携帯情報端末、音響再生装置、パチンコ機などの大型ゲーム機などが挙げられる。
実施の形態1または実施の形態2においては、バッファ層を設ける例を示したが、本実施の形態ではバッファ層を設けない例を示す。また、2つのnチャネル型の薄膜トランジスタを用いてインバータ回路を構成する例を以下に説明する。
本実施の形態では、図33に示したモデル構造の薄膜トランジスタにストレスを印加して電気特性の劣化の度合いを計算によって求める。
101:ゲート電極
102:ゲート絶縁層
103:酸化物半導体層
104a:第1のバッファ層
104b:第2のバッファ層
105a:ソース電極層
105b:ドレイン電極層
Claims (2)
- 絶縁表面を有する基板と、
前記基板上のゲート電極と、
前記ゲート電極上のゲート絶縁膜と、
前記ゲート絶縁膜上の、第1の金属膜及び第2の金属膜と、
前記第1の金属膜上の第1の層と、
前記第2の金属膜上の第2の層と、
前記第1の金属膜の側面に設けられ、前記第1の層より導電率が低い第1の酸化物層と、
前記第2の金属膜の側面に設けられ、前記第2の層より導電率が低い第2の酸化物層と、
前記第1の層と、前記第2の層と、前記第1の酸化物層と、前記第2の酸化物層とに接する酸化物半導体層と、を有し、
前記第1の金属膜の側面は、前記基板とのなす角度が20°以上90°未満である領域を有し、
前記第2の金属膜の側面は、前記基板とのなす角度が20°以上90°未満である領域を有し、
前記第1の層及び前記第2の層は、前記酸化物半導体層より低抵抗であることを特徴とする半導体装置。 - 請求項1において、
前記第1の層は、インジウムと、ガリウムと、亜鉛と、を有することを特徴とする半導体装置。
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