JP5452900B2 - 半導体膜付き基板の作製方法 - Google Patents

半導体膜付き基板の作製方法 Download PDF

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Publication number
JP5452900B2
JP5452900B2 JP2008233715A JP2008233715A JP5452900B2 JP 5452900 B2 JP5452900 B2 JP 5452900B2 JP 2008233715 A JP2008233715 A JP 2008233715A JP 2008233715 A JP2008233715 A JP 2008233715A JP 5452900 B2 JP5452900 B2 JP 5452900B2
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Prior art keywords
single crystal
crystal semiconductor
tray
semiconductor substrates
substrate
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Expired - Fee Related
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JP2008233715A
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Japanese (ja)
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JP2009094487A (ja
JP2009094487A5 (enExample
Inventor
舜平 山崎
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP2008233715A priority Critical patent/JP5452900B2/ja
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Publication of JP2009094487A5 publication Critical patent/JP2009094487A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1902—Preparing horizontally inhomogeneous wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/24—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement by concurrent transfer of multiple parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13454—Drivers integrated on the active matrix substrate

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  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
JP2008233715A 2007-09-21 2008-09-11 半導体膜付き基板の作製方法 Expired - Fee Related JP5452900B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008233715A JP5452900B2 (ja) 2007-09-21 2008-09-11 半導体膜付き基板の作製方法

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2007245904 2007-09-21
JP2007245904 2007-09-21
JP2007245898 2007-09-21
JP2007245898 2007-09-21
JP2008233715A JP5452900B2 (ja) 2007-09-21 2008-09-11 半導体膜付き基板の作製方法

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JP2009094487A JP2009094487A (ja) 2009-04-30
JP2009094487A5 JP2009094487A5 (enExample) 2011-10-13
JP5452900B2 true JP5452900B2 (ja) 2014-03-26

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US (1) US8822305B2 (enExample)
JP (1) JP5452900B2 (enExample)
CN (1) CN101393859B (enExample)
TW (1) TWI470682B (enExample)

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JP5498670B2 (ja) * 2007-07-13 2014-05-21 株式会社半導体エネルギー研究所 半導体基板の作製方法
JP5250228B2 (ja) * 2007-09-21 2013-07-31 株式会社半導体エネルギー研究所 半導体装置の作製方法
TWI437696B (zh) * 2007-09-21 2014-05-11 半導體能源研究所股份有限公司 半導體裝置及其製造方法
JP2009094488A (ja) * 2007-09-21 2009-04-30 Semiconductor Energy Lab Co Ltd 半導体膜付き基板の作製方法
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CN112887895B (zh) * 2021-01-26 2022-06-07 苏州工业园区纳米产业技术研究院有限公司 一种调整mems麦克风吸合电压的工艺方法
TWI782703B (zh) * 2021-09-13 2022-11-01 錼創顯示科技股份有限公司 發光二極體結構及其製造方法
CN113782654B (zh) * 2021-09-13 2025-02-07 錼创显示科技股份有限公司 发光二极管结构及其制造方法
JP2024064422A (ja) * 2022-10-28 2024-05-14 沖電気工業株式会社 半導体素子の製造方法、半導体層支持構造体、および半導体基板
JP2024064494A (ja) * 2022-10-28 2024-05-14 沖電気工業株式会社 半導体素子の製造方法、半導体層支持構造体、および半導体基板

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Also Published As

Publication number Publication date
TW200937508A (en) 2009-09-01
US20090079025A1 (en) 2009-03-26
CN101393859A (zh) 2009-03-25
JP2009094487A (ja) 2009-04-30
TWI470682B (zh) 2015-01-21
CN101393859B (zh) 2013-10-30
US8822305B2 (en) 2014-09-02

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