TWI470682B - 設置有半導體膜的基底及其製造方法 - Google Patents
設置有半導體膜的基底及其製造方法 Download PDFInfo
- Publication number
- TWI470682B TWI470682B TW97135885A TW97135885A TWI470682B TW I470682 B TWI470682 B TW I470682B TW 97135885 A TW97135885 A TW 97135885A TW 97135885 A TW97135885 A TW 97135885A TW I470682 B TWI470682 B TW I470682B
- Authority
- TW
- Taiwan
- Prior art keywords
- single crystal
- crystal semiconductor
- substrate
- semiconductor substrates
- disk
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, the devices being individual devices of subclass H10D or integrated devices of class H10
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13454—Drivers integrated on the active matrix substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Thin Film Transistor (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007245898 | 2007-09-21 | ||
| JP2007245904 | 2007-09-21 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200937508A TW200937508A (en) | 2009-09-01 |
| TWI470682B true TWI470682B (zh) | 2015-01-21 |
Family
ID=40470734
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW97135885A TWI470682B (zh) | 2007-09-21 | 2008-09-18 | 設置有半導體膜的基底及其製造方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US8822305B2 (enExample) |
| JP (1) | JP5452900B2 (enExample) |
| CN (1) | CN101393859B (enExample) |
| TW (1) | TWI470682B (enExample) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWD209041S (zh) | 2019-10-25 | 2020-12-21 | 日商昭和電工材料股份有限公司 | 製造半導體裝置用的膜片 |
| TWD209201S (zh) | 2019-10-25 | 2021-01-01 | 日商昭和電工材料股份有限公司 | 製造半導體裝置用的膜片 |
| TWD209199S (zh) | 2019-10-25 | 2021-01-01 | 日商昭和電工材料股份有限公司 | 製造半導體裝置用的膜片 |
| TWD209200S (zh) | 2019-10-25 | 2021-01-01 | 日商昭和電工材料股份有限公司 | 製造半導體裝置用的膜片 |
Families Citing this family (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4884180B2 (ja) * | 2006-11-21 | 2012-02-29 | 東京エレクトロン株式会社 | 基板処理装置および基板処理方法 |
| JP5498670B2 (ja) * | 2007-07-13 | 2014-05-21 | 株式会社半導体エネルギー研究所 | 半導体基板の作製方法 |
| TWI437696B (zh) | 2007-09-21 | 2014-05-11 | 半導體能源研究所股份有限公司 | 半導體裝置及其製造方法 |
| JP2009094488A (ja) * | 2007-09-21 | 2009-04-30 | Semiconductor Energy Lab Co Ltd | 半導体膜付き基板の作製方法 |
| JP5250228B2 (ja) * | 2007-09-21 | 2013-07-31 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| TWI493609B (zh) * | 2007-10-23 | 2015-07-21 | Semiconductor Energy Lab | 半導體基板、顯示面板及顯示裝置的製造方法 |
| KR101651206B1 (ko) * | 2009-05-26 | 2016-08-25 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Soi 기판의 제작 방법 |
| JP5760392B2 (ja) * | 2009-11-04 | 2015-08-12 | ボンドテック株式会社 | 接合方法、接合システムおよび半導体装置 |
| JP5789798B2 (ja) * | 2010-05-28 | 2015-10-07 | ボンドテック株式会社 | 接合方法および接合システム |
| CN102593260A (zh) * | 2012-03-13 | 2012-07-18 | 常州比太科技有限公司 | 用等离子激发形成氮化硅膜的方法 |
| JP6245791B2 (ja) * | 2012-03-27 | 2017-12-13 | 日亜化学工業株式会社 | 縦型窒化物半導体素子およびその製造方法 |
| JP2014209091A (ja) * | 2013-03-25 | 2014-11-06 | ローム株式会社 | 半導体装置 |
| CN108417523B (zh) * | 2018-04-16 | 2020-08-04 | 歌尔股份有限公司 | Led衬底的剥离方法 |
| CN114424325B (zh) * | 2019-08-07 | 2025-12-05 | 应用材料公司 | 用于3d nand的修改的堆叠 |
| US11443987B2 (en) | 2020-05-29 | 2022-09-13 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor devices with backside air gap dielectric |
| TWI850407B (zh) * | 2020-06-19 | 2024-08-01 | 巴黎文理研究大學 | 用於基板上液體之經控制沉積的系統及方法、該系統的用途及藉由該方法獲得的產物 |
| FR3114683B1 (fr) * | 2020-09-25 | 2025-10-17 | Semco Smartech France | Support pour substrats semiconducteurs pour traitement PECVD avec forte capacité de chargement de substrats |
| CN112887895B (zh) * | 2021-01-26 | 2022-06-07 | 苏州工业园区纳米产业技术研究院有限公司 | 一种调整mems麦克风吸合电压的工艺方法 |
| TWI782703B (zh) | 2021-09-13 | 2022-11-01 | 錼創顯示科技股份有限公司 | 發光二極體結構及其製造方法 |
| CN113782654B (zh) * | 2021-09-13 | 2025-02-07 | 錼创显示科技股份有限公司 | 发光二极管结构及其制造方法 |
| JP2024064422A (ja) * | 2022-10-28 | 2024-05-14 | 沖電気工業株式会社 | 半導体素子の製造方法、半導体層支持構造体、および半導体基板 |
| JP2024064494A (ja) * | 2022-10-28 | 2024-05-14 | 沖電気工業株式会社 | 半導体素子の製造方法、半導体層支持構造体、および半導体基板 |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US20050277296A1 (en) * | 2004-06-10 | 2005-12-15 | Adetutu Olubunmi O | Method to reduce impurity elements during semiconductor film deposition |
| US7087134B2 (en) * | 2004-03-31 | 2006-08-08 | Hewlett-Packard Development Company, L.P. | System and method for direct-bonding of substrates |
| US20060255341A1 (en) * | 2005-04-21 | 2006-11-16 | Aonex Technologies, Inc. | Bonded intermediate substrate and method of making same |
| US20060280591A1 (en) * | 2005-05-27 | 2006-12-14 | Danville Automation Holdings Llc | Funnel plate |
| US20070026638A1 (en) * | 2005-07-27 | 2007-02-01 | Silicon Genesis Corporation | Method and structure for fabricating multiple tiled regions onto a plate using a controlled cleaving process |
| TW200818321A (en) * | 2006-05-31 | 2008-04-16 | Corning Inc | Semiconductor on insulator structure made using radiation annealing |
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| JPH0547726A (ja) * | 1991-08-20 | 1993-02-26 | Fujitsu Ltd | 半導体装置の製造方法 |
| FR2681472B1 (fr) | 1991-09-18 | 1993-10-29 | Commissariat Energie Atomique | Procede de fabrication de films minces de materiau semiconducteur. |
| US6159825A (en) | 1997-05-12 | 2000-12-12 | Silicon Genesis Corporation | Controlled cleavage thin film separation process using a reusable substrate |
| US6534380B1 (en) * | 1997-07-18 | 2003-03-18 | Denso Corporation | Semiconductor substrate and method of manufacturing the same |
| JP3324469B2 (ja) | 1997-09-26 | 2002-09-17 | 信越半導体株式会社 | Soiウエーハの製造方法ならびにこの方法で製造されるsoiウエーハ |
| JP3501642B2 (ja) | 1997-12-26 | 2004-03-02 | キヤノン株式会社 | 基板処理方法 |
| JPH11330474A (ja) * | 1998-05-13 | 1999-11-30 | Toshiba Corp | 液晶表示装置およびその製造方法 |
| JP2000012864A (ja) * | 1998-06-22 | 2000-01-14 | Semiconductor Energy Lab Co Ltd | 半導体装置の作製方法 |
| JP2000077287A (ja) * | 1998-08-26 | 2000-03-14 | Nissin Electric Co Ltd | 結晶薄膜基板の製造方法 |
| US6287941B1 (en) | 1999-04-21 | 2001-09-11 | Silicon Genesis Corporation | Surface finishing of SOI substrates using an EPI process |
| US6653209B1 (en) | 1999-09-30 | 2003-11-25 | Canon Kabushiki Kaisha | Method of producing silicon thin film, method of constructing SOI substrate and semiconductor device |
| US6583440B2 (en) | 2000-11-30 | 2003-06-24 | Seiko Epson Corporation | Soi substrate, element substrate, semiconductor device, electro-optical apparatus, electronic equipment, method of manufacturing the soi substrate, method of manufacturing the element substrate, and method of manufacturing the electro-optical apparatus |
| US7253032B2 (en) | 2001-04-20 | 2007-08-07 | Semiconductor Energy Laboratory Co., Ltd. | Method of flattening a crystallized semiconductor film surface by using a plate |
| JP4439789B2 (ja) * | 2001-04-20 | 2010-03-24 | 株式会社半導体エネルギー研究所 | レーザ照射装置、並びに半導体装置の作製方法 |
| FR2835097B1 (fr) | 2002-01-23 | 2005-10-14 | Procede optimise de report d'une couche mince de carbure de silicium sur un substrat d'accueil | |
| JP4182323B2 (ja) | 2002-02-27 | 2008-11-19 | ソニー株式会社 | 複合基板、基板製造方法 |
| JP2003282885A (ja) * | 2002-03-26 | 2003-10-03 | Sharp Corp | 半導体装置およびその製造方法 |
| US7119365B2 (en) | 2002-03-26 | 2006-10-10 | Sharp Kabushiki Kaisha | Semiconductor device and manufacturing method thereof, SOI substrate and display device using the same, and manufacturing method of the SOI substrate |
| JP4091338B2 (ja) | 2002-05-17 | 2008-05-28 | 株式会社日立ハイテクインスツルメンツ | 半導体チップの移送装置 |
| KR100511656B1 (ko) | 2002-08-10 | 2005-09-07 | 주식회사 실트론 | 나노 에스오아이 웨이퍼의 제조방법 및 그에 따라 제조된나노 에스오아이 웨이퍼 |
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| SG178762A1 (en) | 2007-04-13 | 2012-03-29 | Semiconductor Energy Lab | Display device, method for manufacturing display device, and soi substrate |
| CN102592977B (zh) | 2007-06-20 | 2015-03-25 | 株式会社半导体能源研究所 | 半导体装置的制造方法 |
| JP5460984B2 (ja) | 2007-08-17 | 2014-04-02 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| TWI437696B (zh) | 2007-09-21 | 2014-05-11 | 半導體能源研究所股份有限公司 | 半導體裝置及其製造方法 |
| JP2009094488A (ja) | 2007-09-21 | 2009-04-30 | Semiconductor Energy Lab Co Ltd | 半導体膜付き基板の作製方法 |
| JP5250228B2 (ja) | 2007-09-21 | 2013-07-31 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
-
2008
- 2008-09-11 JP JP2008233715A patent/JP5452900B2/ja not_active Expired - Fee Related
- 2008-09-17 US US12/211,945 patent/US8822305B2/en not_active Expired - Fee Related
- 2008-09-18 TW TW97135885A patent/TWI470682B/zh not_active IP Right Cessation
- 2008-09-19 CN CN200810149273.7A patent/CN101393859B/zh not_active Expired - Fee Related
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7087134B2 (en) * | 2004-03-31 | 2006-08-08 | Hewlett-Packard Development Company, L.P. | System and method for direct-bonding of substrates |
| US20050277296A1 (en) * | 2004-06-10 | 2005-12-15 | Adetutu Olubunmi O | Method to reduce impurity elements during semiconductor film deposition |
| US20060255341A1 (en) * | 2005-04-21 | 2006-11-16 | Aonex Technologies, Inc. | Bonded intermediate substrate and method of making same |
| US20060280591A1 (en) * | 2005-05-27 | 2006-12-14 | Danville Automation Holdings Llc | Funnel plate |
| US20070026638A1 (en) * | 2005-07-27 | 2007-02-01 | Silicon Genesis Corporation | Method and structure for fabricating multiple tiled regions onto a plate using a controlled cleaving process |
| TW200818321A (en) * | 2006-05-31 | 2008-04-16 | Corning Inc | Semiconductor on insulator structure made using radiation annealing |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWD209041S (zh) | 2019-10-25 | 2020-12-21 | 日商昭和電工材料股份有限公司 | 製造半導體裝置用的膜片 |
| TWD209201S (zh) | 2019-10-25 | 2021-01-01 | 日商昭和電工材料股份有限公司 | 製造半導體裝置用的膜片 |
| TWD209199S (zh) | 2019-10-25 | 2021-01-01 | 日商昭和電工材料股份有限公司 | 製造半導體裝置用的膜片 |
| TWD209200S (zh) | 2019-10-25 | 2021-01-01 | 日商昭和電工材料股份有限公司 | 製造半導體裝置用的膜片 |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101393859A (zh) | 2009-03-25 |
| US20090079025A1 (en) | 2009-03-26 |
| TW200937508A (en) | 2009-09-01 |
| CN101393859B (zh) | 2013-10-30 |
| JP5452900B2 (ja) | 2014-03-26 |
| US8822305B2 (en) | 2014-09-02 |
| JP2009094487A (ja) | 2009-04-30 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |