JP4674273B2 - 試験装置および情報処理システム - Google Patents
試験装置および情報処理システム Download PDFInfo
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- JP4674273B2 JP4674273B2 JP2010514324A JP2010514324A JP4674273B2 JP 4674273 B2 JP4674273 B2 JP 4674273B2 JP 2010514324 A JP2010514324 A JP 2010514324A JP 2010514324 A JP2010514324 A JP 2010514324A JP 4674273 B2 JP4674273 B2 JP 4674273B2
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- 238000012360 testing method Methods 0.000 title claims description 158
- 230000010365 information processing Effects 0.000 title claims description 10
- 238000004891 communication Methods 0.000 claims description 34
- 230000004044 response Effects 0.000 claims description 32
- 238000012545 processing Methods 0.000 claims description 27
- 238000012546 transfer Methods 0.000 claims description 12
- 208000033748 Device issues Diseases 0.000 claims 1
- 230000005540 biological transmission Effects 0.000 description 23
- 238000000034 method Methods 0.000 description 14
- 230000008569 process Effects 0.000 description 14
- 238000005259 measurement Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 2
- 238000011990 functional testing Methods 0.000 description 2
- 230000000644 propagated effect Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000001419 dependent effect Effects 0.000 description 1
- 239000000284 extract Substances 0.000 description 1
- 238000010348 incorporation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
- G01R31/31907—Modular tester, e.g. controlling and coordinating instruments in a bus based architecture
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
- G01R31/2834—Automated test systems [ATE]; using microprocessors or computers
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
- G01R31/31919—Storing and outputting test patterns
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
- G01R31/31926—Routing signals to or from the device under test [DUT], e.g. switch matrix, pin multiplexing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/273—Tester hardware, i.e. output processing circuits
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/273—Tester hardware, i.e. output processing circuits
- G06F11/2733—Test interface between tester and unit under test
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/273—Tester hardware, i.e. output processing circuits
- G06F11/277—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault-free response
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/50—Testing arrangements
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- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Computer Networks & Wireless Communication (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Signal Processing (AREA)
- Tests Of Electronic Circuits (AREA)
- Information Transfer Systems (AREA)
Description
1.米国特許出願第61/057206号 出願日 2008年5月30日
Claims (6)
- 被試験デバイスを試験する試験装置であって、
前記被試験デバイスとの間で信号を授受する試験ユニットと、
前記試験ユニットを制御する制御装置と、
前記制御装置と前記試験ユニットとの間を中継する中継装置と、
を備え、
前記中継装置は、
前記制御装置から当該中継装置へのコマンドを受けて、前記試験ユニットへ転送する第1通信部と、
前記コマンドを受け取った前記試験ユニットが当該中継装置へ折り返し返送する折返コマンドを受け取る第2通信部と、
前記第2通信部が前記折返コマンドを受け取ったことに応じて、前記折返コマンドにより指定される処理を実行する実行部と、
を有する試験装置。 - 前記実行部は、前記折返コマンドを受けたことに応じて、タイマ動作またはカウンタ動作を開始する
請求項1に記載の試験装置。 - 複数の前記試験ユニットを備え、
前記中継装置は、前記制御装置と、前記複数の試験ユニットのそれぞれとの間を中継し、
前記第1通信部は、前記複数の試験ユニットのそれぞれに対して、前記コマンドを転送し、
前記実行部は、前記複数の試験ユニットの全てから前記折返コマンドを受けたことに応じて、前記折返コマンドにより指定される処理を実行する
請求項1から2の何れかに記載の試験装置。 - 前記制御装置は、前記中継装置へ書込コマンドを発行し、
前記中継装置の前記第1通信部は、前記制御装置により発行された前記書込コマンドを、前記試験ユニットへ転送し、
前記試験ユニットは、前記中継装置から前記書込コマンドを受けると、受け取った前記書込コマンドを前記折返コマンドとして前記中継装置へ返送し、
前記中継装置の前記実行部は、前記試験ユニットから前記折返コマンドを受け取ったことに応じて処理を実行する
請求項1から3の何れかに記載の試験装置。 - 前記第1通信部は、前記制御装置から、前記実行部の実行結果を読み出す読出コマンドを受け取り、
前記実行部は、前記第1通信部が前記読出コマンドを受け取ったことに応じて、実行結果を前記制御装置に返信する
請求項1から4の何れかに記載の試験装置。 - 処理ユニットと、
前記処理ユニットを制御する制御装置と、
前記制御装置と前記処理ユニットとの間を中継する中継装置と、
を備え、
前記中継装置は、
前記制御装置から当該中継装置へのコマンドを受けて、前記処理ユニットへ転送する第1通信部と、
前記コマンドを受け取った前記処理ユニットが当該中継装置へ折り返し返送する折返コマンドを受け取る第2通信部と、
前記第2通信部が前記折返コマンドを受け取ったことに応じて、前記折返コマンドにより指定される処理を実行する実行部と、
を有する情報処理システム。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US5720608P | 2008-05-30 | 2008-05-30 | |
US61/057,206 | 2008-05-30 | ||
PCT/JP2008/064251 WO2009144837A1 (ja) | 2008-05-30 | 2008-08-07 | 試験装置および情報処理システム |
Publications (2)
Publication Number | Publication Date |
---|---|
JP4674273B2 true JP4674273B2 (ja) | 2011-04-20 |
JPWO2009144837A1 JPWO2009144837A1 (ja) | 2011-09-29 |
Family
ID=41376735
Family Applications (4)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2010514324A Active JP4674273B2 (ja) | 2008-05-30 | 2008-08-07 | 試験装置および情報処理システム |
JP2010514325A Expired - Fee Related JP4674274B2 (ja) | 2008-05-30 | 2008-08-08 | 試験装置、情報処理システムおよびデータ伝送方法 |
JP2010514326A Pending JPWO2009144839A1 (ja) | 2008-05-30 | 2008-08-08 | 試験装置および情報処理システム |
JP2010514329A Active JP4674275B2 (ja) | 2008-05-30 | 2008-08-29 | 試験装置および試験方法 |
Family Applications After (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2010514325A Expired - Fee Related JP4674274B2 (ja) | 2008-05-30 | 2008-08-08 | 試験装置、情報処理システムおよびデータ伝送方法 |
JP2010514326A Pending JPWO2009144839A1 (ja) | 2008-05-30 | 2008-08-08 | 試験装置および情報処理システム |
JP2010514329A Active JP4674275B2 (ja) | 2008-05-30 | 2008-08-29 | 試験装置および試験方法 |
Country Status (4)
Country | Link |
---|---|
US (4) | US20110196638A1 (ja) |
JP (4) | JP4674273B2 (ja) |
KR (4) | KR101137537B1 (ja) |
WO (4) | WO2009144837A1 (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10288685B2 (en) * | 2014-04-30 | 2019-05-14 | Keysight Technologies, Inc. | Multi-bank digital stimulus response in a single field programmable gate array |
TWI615619B (zh) * | 2016-06-24 | 2018-02-21 | 致伸科技股份有限公司 | 與受測物通訊之方法以及應用該方法之系統 |
TWI653519B (zh) * | 2017-05-03 | 2019-03-11 | 和碩聯合科技股份有限公司 | 配置單元、檢測系統及檢測方法 |
CN114968365B (zh) * | 2022-07-27 | 2022-10-28 | 广州智慧城市发展研究院 | 适配器寄存器单元及包含其的主机适配器电路 |
Citations (1)
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WO2008044421A1 (fr) * | 2006-10-12 | 2008-04-17 | Advantest Corporation | Testeur et procédé de commande |
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JPS63213018A (ja) | 1987-02-28 | 1988-09-05 | Ricoh Co Ltd | 外部記憶制御装置 |
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JPH0581165A (ja) * | 1991-09-19 | 1993-04-02 | Fujitsu Ltd | データ転送回路 |
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US5875293A (en) * | 1995-08-08 | 1999-02-23 | Dell Usa, L.P. | System level functional testing through one or more I/O ports of an assembled computer system |
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KR100295559B1 (ko) * | 1998-05-14 | 2001-07-12 | 박종섭 | 램버스디램의번인테스트보드 |
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JP2002071762A (ja) * | 2000-06-13 | 2002-03-12 | Advantest Corp | 半導体試験装置及びそのモニタ装置 |
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-
2008
- 2008-08-07 WO PCT/JP2008/064251 patent/WO2009144837A1/ja active Application Filing
- 2008-08-07 KR KR1020107025746A patent/KR101137537B1/ko active IP Right Grant
- 2008-08-07 JP JP2010514324A patent/JP4674273B2/ja active Active
- 2008-08-08 KR KR1020107025469A patent/KR101215387B1/ko not_active IP Right Cessation
- 2008-08-08 JP JP2010514325A patent/JP4674274B2/ja not_active Expired - Fee Related
- 2008-08-08 KR KR1020107025609A patent/KR101138198B1/ko active IP Right Grant
- 2008-08-08 JP JP2010514326A patent/JPWO2009144839A1/ja active Pending
- 2008-08-08 WO PCT/JP2008/064349 patent/WO2009144839A1/ja active Application Filing
- 2008-08-08 WO PCT/JP2008/064347 patent/WO2009144838A1/ja active Application Filing
- 2008-08-29 KR KR1020107026131A patent/KR101137539B1/ko active IP Right Grant
- 2008-08-29 WO PCT/JP2008/065598 patent/WO2009144844A1/ja active Application Filing
- 2008-08-29 JP JP2010514329A patent/JP4674275B2/ja active Active
-
2010
- 2010-11-09 US US12/942,915 patent/US20110196638A1/en not_active Abandoned
- 2010-11-12 US US12/945,736 patent/US8942946B2/en active Active
- 2010-11-12 US US12/945,731 patent/US8805634B2/en active Active
- 2010-11-12 US US12/945,758 patent/US20110208448A1/en not_active Abandoned
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2008044421A1 (fr) * | 2006-10-12 | 2008-04-17 | Advantest Corporation | Testeur et procédé de commande |
Also Published As
Publication number | Publication date |
---|---|
US8942946B2 (en) | 2015-01-27 |
KR20110005273A (ko) | 2011-01-17 |
KR101138198B1 (ko) | 2012-05-14 |
KR20110005271A (ko) | 2011-01-17 |
US20110208465A1 (en) | 2011-08-25 |
JPWO2009144839A1 (ja) | 2011-09-29 |
KR101215387B1 (ko) | 2012-12-26 |
US20110208448A1 (en) | 2011-08-25 |
JPWO2009144837A1 (ja) | 2011-09-29 |
KR101137537B1 (ko) | 2012-04-23 |
US20110196638A1 (en) | 2011-08-11 |
WO2009144839A1 (ja) | 2009-12-03 |
WO2009144844A1 (ja) | 2009-12-03 |
JP4674274B2 (ja) | 2011-04-20 |
JP4674275B2 (ja) | 2011-04-20 |
US8805634B2 (en) | 2014-08-12 |
KR101137539B1 (ko) | 2012-04-23 |
JPWO2009144844A1 (ja) | 2011-09-29 |
KR20110005283A (ko) | 2011-01-17 |
JPWO2009144838A1 (ja) | 2011-09-29 |
WO2009144838A1 (ja) | 2009-12-03 |
KR20110005265A (ko) | 2011-01-17 |
US20110282616A1 (en) | 2011-11-17 |
WO2009144837A1 (ja) | 2009-12-03 |
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