JP4237344B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
- Publication number
- JP4237344B2 JP4237344B2 JP25218199A JP25218199A JP4237344B2 JP 4237344 B2 JP4237344 B2 JP 4237344B2 JP 25218199 A JP25218199 A JP 25218199A JP 25218199 A JP25218199 A JP 25218199A JP 4237344 B2 JP4237344 B2 JP 4237344B2
- Authority
- JP
- Japan
- Prior art keywords
- gate electrode
- insulating film
- film
- element isolation
- material film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
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- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- Element Separation (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25218199A JP4237344B2 (ja) | 1998-09-29 | 1999-09-06 | 半導体装置及びその製造方法 |
| US09/405,838 US6222225B1 (en) | 1998-09-29 | 1999-09-27 | Semiconductor device and manufacturing method thereof |
| US09/800,914 US6413809B2 (en) | 1998-09-29 | 2001-03-08 | Method of manufacturing a non-volatile memory having an element isolation insulation film embedded in the trench |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27612698 | 1998-09-29 | ||
| JP10-276126 | 1998-09-29 | ||
| JP25218199A JP4237344B2 (ja) | 1998-09-29 | 1999-09-06 | 半導体装置及びその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2000174242A JP2000174242A (ja) | 2000-06-23 |
| JP2000174242A5 JP2000174242A5 (enExample) | 2005-06-30 |
| JP4237344B2 true JP4237344B2 (ja) | 2009-03-11 |
Family
ID=26540586
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP25218199A Expired - Fee Related JP4237344B2 (ja) | 1998-09-29 | 1999-09-06 | 半導体装置及びその製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (2) | US6222225B1 (enExample) |
| JP (1) | JP4237344B2 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7941588B2 (en) | 2006-09-29 | 2011-05-10 | Kabushiki Kaisha Toshiba | Multi-level nonvolatile semiconductor memory device |
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| US20080079059A1 (en) * | 1991-04-24 | 2008-04-03 | Eon Silicon Solution Inc. | Method of manufacturing a nonvolatile semiconductor memory device and select gate device having a stacked gate structure |
| JP3540633B2 (ja) * | 1998-11-11 | 2004-07-07 | 株式会社東芝 | 半導体装置の製造方法 |
| JP3602010B2 (ja) | 1999-08-02 | 2004-12-15 | シャープ株式会社 | 半導体記憶装置の製造方法 |
| TW484228B (en) * | 1999-08-31 | 2002-04-21 | Toshiba Corp | Non-volatile semiconductor memory device and the manufacturing method thereof |
| JP3785003B2 (ja) * | 1999-09-20 | 2006-06-14 | 株式会社東芝 | 不揮発性半導体記憶装置の製造方法 |
| JP3383244B2 (ja) * | 1999-09-29 | 2003-03-04 | シャープ株式会社 | 半導体トランジスタ及びその製造方法 |
| JP2001168306A (ja) * | 1999-12-09 | 2001-06-22 | Toshiba Corp | 不揮発性半導体記憶装置及びその製造方法 |
| US6448606B1 (en) * | 2000-02-24 | 2002-09-10 | Advanced Micro Devices, Inc. | Semiconductor with increased gate coupling coefficient |
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| US20030224572A1 (en) * | 2002-06-03 | 2003-12-04 | Hsiao-Ying Yang | Flash memory structure having a T-shaped floating gate and its fabricating method |
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| US6828212B2 (en) * | 2002-10-22 | 2004-12-07 | Atmel Corporation | Method of forming shallow trench isolation structure in a semiconductor device |
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| KR100537276B1 (ko) * | 2002-11-18 | 2005-12-19 | 주식회사 하이닉스반도체 | 반도체 소자의 제조 방법 |
| WO2004053992A2 (en) * | 2002-12-06 | 2004-06-24 | Koninklijke Philips Electronics N.V. | Shallow trench isolation in floating gate devices |
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| JP5522915B2 (ja) * | 2008-09-30 | 2014-06-18 | ローム株式会社 | 半導体記憶装置およびその製造方法 |
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| CN104752356B (zh) * | 2013-12-25 | 2018-07-06 | 北京兆易创新科技股份有限公司 | 一种或非型闪存的浮栅的制作方法 |
| JP5781190B2 (ja) * | 2014-04-07 | 2015-09-16 | ローム株式会社 | 半導体記憶装置 |
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| JP2022143850A (ja) * | 2021-03-18 | 2022-10-03 | キオクシア株式会社 | 半導体装置 |
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| US6281103B1 (en) * | 1993-07-27 | 2001-08-28 | Micron Technology, Inc. | Method for fabricating gate semiconductor |
| JPH07297300A (ja) * | 1994-04-26 | 1995-11-10 | Sony Corp | 不揮発性メモリの製造方法 |
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| US6034393A (en) * | 1997-06-16 | 2000-03-07 | Mitsubishi Denki Kabushiki Kaisha | Nonvolatile semiconductor memory device using trench isolation and manufacturing method thereof |
| US6130129A (en) * | 1998-07-09 | 2000-10-10 | Winbond Electronics Corp. | Method of making self-aligned stacked gate flush memory with high control gate to floating gate coupling ratio |
-
1999
- 1999-09-06 JP JP25218199A patent/JP4237344B2/ja not_active Expired - Fee Related
- 1999-09-27 US US09/405,838 patent/US6222225B1/en not_active Expired - Fee Related
-
2001
- 2001-03-08 US US09/800,914 patent/US6413809B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7941588B2 (en) | 2006-09-29 | 2011-05-10 | Kabushiki Kaisha Toshiba | Multi-level nonvolatile semiconductor memory device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2000174242A (ja) | 2000-06-23 |
| US6413809B2 (en) | 2002-07-02 |
| US6222225B1 (en) | 2001-04-24 |
| US20010018253A1 (en) | 2001-08-30 |
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