JP2015195380A - トランジスタおよび半導体装置 - Google Patents
トランジスタおよび半導体装置 Download PDFInfo
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- JP2015195380A JP2015195380A JP2015067224A JP2015067224A JP2015195380A JP 2015195380 A JP2015195380 A JP 2015195380A JP 2015067224 A JP2015067224 A JP 2015067224A JP 2015067224 A JP2015067224 A JP 2015067224A JP 2015195380 A JP2015195380 A JP 2015195380A
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- conductor
- insulator
- transistor
- semiconductor
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Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
- H01L29/78693—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate the semiconducting oxide being amorphous
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
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Abstract
Description
以下では、本発明の一態様に係るトランジスタの構造について説明する。
図1(A)および図1(B)は、本発明の一態様に係るトランジスタ490の上面図および断面図である。図1(A)は上面図である。図1(B)は、図1(A)に示す一点鎖線A1−A2、および一点鎖線A3−A4に対応する断面図である。なお、図1(A)の上面図では、図の明瞭化のために一部の要素を省いて図示している。
以下では、図1に示したトランジスタ490の作製方法について説明する。
以下では、図1などに示したトランジスタ490とは、異なる構造を有するトランジスタ590について説明する。図9(A)および図9(B)は、本発明の一態様に係るトランジスタ590の上面図および断面図である。図9(A)は上面図である。図9(B)は、図9(A)に示す一点鎖線B1−B2、および一点鎖線B3−B4に対応する断面図である。なお、図9(A)の上面図では、図の明瞭化のために一部の要素を省いて図示している。
以下では、図9に示したトランジスタ590の作製方法について説明する。
以下では、本発明の一態様に係る半導体装置を例示する。
以下では、本発明の一態様に係るトランジスタを利用した回路の一例について説明する。
図14(A)に示す回路図は、pチャネル型のトランジスタ2200とnチャネル型のトランジスタ2100を直列に接続し、かつそれぞれのゲートを接続した、いわゆるCMOSインバータの構成を示している。
図15は、図14(A)に対応する半導体装置の断面図である。図15に示す半導体装置は、トランジスタ2200と、トランジスタ2200の上方に配置するトランジスタ2100と、を有する。なお、トランジスタ2100として、図1に示したトランジスタ490を用いた例を示しているが、本発明の一態様に係る半導体装置は、これに限定されるものではない。例えば、図4(A)に示したトランジスタ490、図4(B)に示したトランジスタ490、図9に示したトランジスタ590、図10(A)に示したトランジスタ590または図10(B)に示したトランジスタ590などを、トランジスタ2100として用いても構わない。よって、トランジスタ2100については、適宜上述したトランジスタについての記載を参酌する。
また図14(B)に示す回路図は、トランジスタ2100とトランジスタ2200のそれぞれのソースとドレインを接続した構成を示している。このような構成とすることで、いわゆるCMOSアナログスイッチとして機能させることができる。
本発明の一態様に係るトランジスタを用いた、電力が供給されない状況でも記憶内容の保持が可能で、かつ、書き込み回数にも制限が無い半導体装置(記憶装置)の一例を図18に示す。
以下では、上述したトランジスタや上述した記憶装置などの半導体装置を含むCPUについて説明する。
以下では、本発明の一態様に係る表示装置の構成例について説明する。
図21(A)には、本発明の一態様に係る表示装置の上面図を示す。また、図21(B)には、本発明の一態様に係る表示装置の画素に液晶素子を用いた場合における画素回路を示す。また、図21(C)には、本発明の一態様に係る表示装置の画素に有機EL素子を用いた場合における画素回路を示す。
また、画素の回路構成の一例を図21(B)に示す。ここでは、VA型液晶表示装置の画素などに適用することができる画素回路を示す。
画素の回路構成の他の一例を図21(C)に示す。ここでは、有機EL素子を用いた表示装置の画素構造を示す。
本発明の一態様に係る半導体装置は、表示機器、パーソナルコンピュータ、記録媒体を備えた画像再生装置(代表的にはDVD:Digital Versatile Disc等の記録媒体を再生し、その画像を表示しうるディスプレイを有する装置)に用いることができる。その他に、本発明の一態様に係る半導体装置を用いることができる電子機器として、携帯電話、携帯型を含むゲーム機、携帯データ端末、電子書籍端末、ビデオカメラ、デジタルスチルカメラ等のカメラ、ゴーグル型ディスプレイ(ヘッドマウントディスプレイ)、ナビゲーションシステム、音響再生装置(カーオーディオ、デジタルオーディオプレイヤー等)、複写機、ファクシミリ、プリンタ、プリンタ複合機、現金自動預け入れ払い機(ATM)、自動販売機などが挙げられる。これら電子機器の具体例を図22に示す。
401 絶縁体
402 絶縁体
404 導電体
406 半導体
406a 半導体層
406b 半導体層
406c 半導体層
408 絶縁体
410 絶縁体
412 絶縁体
413 導電体
416 導電体
416a 導電体
416b 導電体
416c 導電体
418 絶縁体
424a 導電体
424b 導電体
424c 導電体
426a 導電体
426b 導電体
426c 導電体
438 絶縁体
439 絶縁体
450 半導体基板
452 絶縁体
454 導電体
456 領域
460 領域
462 絶縁体
464 絶縁体
466 絶縁体
468 絶縁体
470 領域
474a 領域
474b 領域
476a 導電体
476b 導電体
478a 導電体
478b 導電体
478c 導電体
480a 導電体
480b 導電体
480c 導電体
490 トランジスタ
500 基板
501 絶縁体
502 絶縁体
504 導電体
506 半導体
508 絶縁体
510 絶縁体
512 絶縁体
513 導電体
516 導電体
516a 導電体
516b 導電体
518 絶縁体
524a 導電体
524b 導電体
526a 導電体
526b 導電体
538 絶縁体
539 絶縁体
590 トランジスタ
901 筐体
902 筐体
903 表示部
904 表示部
905 マイクロフォン
906 スピーカー
907 操作キー
908 スタイラス
911 筐体
912 筐体
913 表示部
914 表示部
915 接続部
916 操作キー
921 筐体
922 表示部
923 キーボード
924 ポインティングデバイス
931 筐体
932 冷蔵室用扉
933 冷凍室用扉
941 筐体
942 筐体
943 表示部
944 操作キー
945 レンズ
946 接続部
951 車体
952 車輪
953 ダッシュボード
954 ライト
1189 ROMインターフェース
1190 基板
1191 ALU
1192 ALUコントローラ
1193 インストラクションデコーダ
1194 インタラプトコントローラ
1195 タイミングコントローラ
1196 レジスタ
1197 レジスタコントローラ
1198 バスインターフェース
1199 ROM
1200 記憶素子
1201 回路
1202 回路
1203 スイッチ
1204 スイッチ
1206 論理素子
1207 容量素子
1208 容量素子
1209 トランジスタ
1210 トランジスタ
1213 トランジスタ
1214 トランジスタ
1220 回路
2100 トランジスタ
2200 トランジスタ
3001 配線
3002 配線
3003 配線
3004 配線
3005 配線
3200 トランジスタ
3300 トランジスタ
3400 容量素子
5000 基板
5001 画素部
5002 走査線駆動回路
5003 走査線駆動回路
5004 信号線駆動回路
5010 容量線
5012 走査線
5013 走査線
5014 信号線
5016 トランジスタ
5017 トランジスタ
5018 液晶素子
5019 液晶素子
5020 画素
5021 スイッチング用トランジスタ
5022 駆動用トランジスタ
5023 容量素子
5024 発光素子
5025 信号線
5026 走査線
5027 電源線
5028 共通電極
Claims (7)
- 酸化物半導体と、第1の導電体と、第2の導電体と、第3の導電体と、第1の絶縁体と、第2の絶縁体と、を有し、
前記第1の導電体は、第1の領域と、第2の領域と、第3の領域と、を有し、
前記第1の領域は、前記第1の絶縁体を介して、前記第1の導電体と前記酸化物半導体とが互いに重なる領域を有し、
前記第2の領域は、前記第1の絶縁体および前記第2の絶縁体を介して、前記第1の導電体と前記第2の導電体とが互いに重なる領域を有し、
前記第3の領域は、前記第1の絶縁体および前記第2の絶縁体を介して、前記第1の導電体と前記第3の導電体とが互いに重なる領域を有し、
前記酸化物半導体は、第4の領域と、第5の領域と、を有し、
前記第4の領域は、前記酸化物半導体と前記第2の導電体とが互いに接する領域を有し、
前記第5の領域は、前記酸化物半導体と前記第3の導電体とが互いに接する領域を有することを特徴とするトランジスタ。 - pチャネル型トランジスタと、nチャネル型トランジスタと、を有し、
前記pチャネル型トランジスタのソースまたはドレインの一方は、前記nチャネル型トランジスタのソースまたはドレインの一方と電気的に接続され、
前記pチャネル型トランジスタのゲートは、前記nチャネル型トランジスタのゲートと電気的に接続され、
前記pチャネル型トランジスタは、チャネル形成領域にシリコンを有し、
前記nチャネル型トランジスタは、請求項1に記載のトランジスタであることを特徴とする半導体装置。 - 請求項2において、
前記pチャネル型トランジスタは、上面の結晶面が(110)面の領域を有するシリコン基板に設けられることを特徴とする半導体装置。 - 請求項2または請求項3において、
前記pチャネル型トランジスタの前記チャネル形成領域は、表面近傍に向けてn型の導電型を付与する不純物濃度が高くなる濃度勾配を有することを特徴とする半導体装置。 - 請求項2乃至請求項4のいずれか一において、
前記pチャネル型トランジスタのゲートは、仕事関数が4.5eV以上の導電体を有することを特徴とする半導体装置。 - 請求項2乃至請求項5のいずれか一において、
前記酸化物半導体がインジウムを有することを特徴とする半導体装置。 - 請求項2乃至請求項6のいずれか一において、
前記酸化物半導体は、第1の酸化物半導体層と、第2の酸化物半導体層と、第3の酸化物半導体層と、を有し、
前記第1の酸化物半導体層と、前記第2の酸化物半導体層と、前記第3の酸化物半導体層とが、互いに重なる領域を有することを特徴とする半導体装置。
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