JP2014109453A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP2014109453A JP2014109453A JP2012262826A JP2012262826A JP2014109453A JP 2014109453 A JP2014109453 A JP 2014109453A JP 2012262826 A JP2012262826 A JP 2012262826A JP 2012262826 A JP2012262826 A JP 2012262826A JP 2014109453 A JP2014109453 A JP 2014109453A
- Authority
- JP
- Japan
- Prior art keywords
- flip
- flop
- data
- circuit
- malfunction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/037—Bistable circuits
- H03K3/0375—Bistable circuits provided with means for increasing reliability; for protection; for ensuring a predetermined initial state when the supply voltage has been applied; for storing the actual state when the supply voltage fails
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/27—Testing of devices without physical removal from the circuit of which they form part, e.g. compensating for effects surrounding elements
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31703—Comparison aspects, e.g. signature analysis, comparators
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31725—Timing aspects, e.g. clock distribution, skew, propagation delay
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Semiconductor Integrated Circuits (AREA)
- Tests Of Electronic Circuits (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
- Logic Circuits (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012262826A JP2014109453A (ja) | 2012-11-30 | 2012-11-30 | 半導体装置 |
| EP13190845.1A EP2738941A1 (en) | 2012-11-30 | 2013-10-30 | Semiconductor device |
| US14/077,277 US9229046B2 (en) | 2012-11-30 | 2013-11-12 | Semiconductor device |
| CN201310628016.2A CN103852713B (zh) | 2012-11-30 | 2013-11-29 | 半导体装置 |
| US14/955,015 US9350333B2 (en) | 2012-11-30 | 2015-11-30 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012262826A JP2014109453A (ja) | 2012-11-30 | 2012-11-30 | 半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2014109453A true JP2014109453A (ja) | 2014-06-12 |
| JP2014109453A5 JP2014109453A5 (https=) | 2015-10-08 |
Family
ID=49546251
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012262826A Pending JP2014109453A (ja) | 2012-11-30 | 2012-11-30 | 半導体装置 |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US9229046B2 (https=) |
| EP (1) | EP2738941A1 (https=) |
| JP (1) | JP2014109453A (https=) |
| CN (1) | CN103852713B (https=) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6360387B2 (ja) * | 2014-08-19 | 2018-07-18 | ルネサスエレクトロニクス株式会社 | プロセッサシステム、エンジン制御システム及び制御方法 |
| KR102617240B1 (ko) * | 2017-02-28 | 2023-12-27 | 에스케이하이닉스 주식회사 | 반도체 장치 |
| WO2019106225A1 (en) * | 2017-12-01 | 2019-06-06 | Minima Processor Oy | Method and arrangement for ensuring valid data at a second stage of a digital register circuit |
| US12182260B2 (en) * | 2017-12-18 | 2024-12-31 | Nuvoton Technology Corporation | System and method for detecting fault injection attacks |
| JP2019113939A (ja) * | 2017-12-21 | 2019-07-11 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US12085611B2 (en) | 2018-10-16 | 2024-09-10 | Minima Processor Oy | Applications of adaptive microelectronic circuits that are designed for testability |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0875825A (ja) * | 1994-09-09 | 1996-03-22 | Fujitsu Ltd | 試験回路及びその試験方法並びに試験回路を用いた試験方法 |
| JP2001526809A (ja) * | 1997-05-07 | 2001-12-18 | ゼネラル・ダイナミックス・インフォメーション・システムズ・インコーポレーテッド | コンピュータ・システム用非割り込み電力制御 |
| JP2002107425A (ja) * | 2000-09-29 | 2002-04-10 | Hitachi Ltd | 半導体集積回路 |
| US20020077782A1 (en) * | 1999-05-10 | 2002-06-20 | Fruehling Terry L. | Secured microcontroller architecture |
| JP2002181893A (ja) * | 2000-12-11 | 2002-06-26 | Mitsubishi Electric Corp | 半導体装置の検査方法および検査装置 |
| JP2003036697A (ja) * | 2001-07-25 | 2003-02-07 | Mitsubishi Electric Corp | 半導体メモリのテスト回路および半導体メモリデバイス |
| JP2006269477A (ja) * | 2005-03-22 | 2006-10-05 | Seiko Epson Corp | 半導体集積回路 |
| JP2009200739A (ja) * | 2008-02-20 | 2009-09-03 | Panasonic Corp | 半導体集積回路 |
Family Cites Families (56)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63755A (ja) * | 1986-06-20 | 1988-01-05 | Fujitsu Ltd | 半導体記憶装置 |
| JP3077075B2 (ja) * | 1993-09-22 | 2000-08-14 | 株式会社日立製作所 | 電力変換装置 |
| EP0653708B1 (en) * | 1993-10-15 | 2000-08-16 | Hitachi, Ltd. | Logic circuit having error detection function, redundant resource management method, and fault tolerant system using it |
| US5815512A (en) * | 1994-05-26 | 1998-09-29 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory testing device |
| TW428092B (en) * | 1998-05-20 | 2001-04-01 | Advantest Corp | Semiconductor test system |
| US6693436B1 (en) * | 1999-12-23 | 2004-02-17 | Intel Corporation | Method and apparatus for testing an integrated circuit having an output-to-output relative signal |
| JP4174167B2 (ja) * | 2000-04-04 | 2008-10-29 | 株式会社アドバンテスト | 半導体集積回路の故障解析方法および故障解析装置 |
| JP4488595B2 (ja) * | 2000-06-08 | 2010-06-23 | 株式会社アドバンテスト | テストパターン生成方法 |
| JP2003035747A (ja) * | 2001-07-19 | 2003-02-07 | Mitsubishi Electric Corp | 半導体検査システムおよび半導体検査方法 |
| JP2003234647A (ja) * | 2002-02-13 | 2003-08-22 | Allied Tereshisu Kk | 半導体デバイス用誤動作抑制回路 |
| WO2003076959A1 (fr) * | 2002-03-08 | 2003-09-18 | Advantest Corporation | Dispositif testeur a semi-conducteur et procede de mesure de synchronisation pour ce dispositif |
| JP4628096B2 (ja) * | 2002-06-10 | 2011-02-09 | 株式会社アドバンテスト | 半導体試験装置 |
| KR100545748B1 (ko) * | 2002-08-09 | 2006-01-24 | 마쯔시다덴기산교 가부시키가이샤 | 반도체 집적회로 장치의 설계 방법 및 설계 장치 |
| WO2004057354A1 (ja) * | 2002-12-20 | 2004-07-08 | Advantest Corporation | 半導体試験装置 |
| JP4232477B2 (ja) * | 2003-02-13 | 2009-03-04 | パナソニック株式会社 | 半導体集積回路の検証方法 |
| WO2004102217A1 (ja) * | 2003-05-15 | 2004-11-25 | Advantest Corporation | 試験装置 |
| JP2005300308A (ja) * | 2004-04-09 | 2005-10-27 | Oki Electric Ind Co Ltd | 半導体集積回路 |
| WO2005124378A1 (ja) * | 2004-06-17 | 2005-12-29 | Advantest Corporation | 試験装置及び試験方法 |
| DE102004036145A1 (de) * | 2004-07-26 | 2006-03-23 | Infineon Technologies Ag | Halbleiterschaltungseinrichtung und System zum Testen einer Halbleitervorrichtung |
| JP2006352304A (ja) * | 2005-06-14 | 2006-12-28 | Renesas Technology Corp | 半導体集積回路 |
| JP4762754B2 (ja) * | 2006-02-17 | 2011-08-31 | 富士通セミコンダクター株式会社 | 半導体装置および電子装置 |
| US7970565B2 (en) * | 2006-02-27 | 2011-06-28 | Advantest Corporation | Measuring device, test device, electronic device, program, and recording medium |
| JP4949707B2 (ja) * | 2006-03-22 | 2012-06-13 | ルネサスエレクトロニクス株式会社 | 半導体装置及びそのテスト方法 |
| JP5173216B2 (ja) * | 2006-04-18 | 2013-04-03 | パナソニック株式会社 | 半導体集積回路システム、半導体集積回路、オペレーティングシステム及び半導体集積回路の制御方法 |
| JP4684942B2 (ja) * | 2006-05-10 | 2011-05-18 | ルネサスエレクトロニクス株式会社 | 半導体装置及び観測用フリップフロップの配置方法 |
| JP4984214B2 (ja) * | 2006-05-11 | 2012-07-25 | 日産自動車株式会社 | シリンダブロック用鉄系溶射薄膜及びシリンダブロック |
| JP2007309733A (ja) * | 2006-05-17 | 2007-11-29 | Matsushita Electric Ind Co Ltd | 半導体集積回路および半導体集積回路の検査方法 |
| JP2008028345A (ja) * | 2006-07-25 | 2008-02-07 | Matsushita Electric Ind Co Ltd | 誤動作検知回路を含む半導体集積回路とその設計方法 |
| JP2008042367A (ja) * | 2006-08-03 | 2008-02-21 | Renesas Technology Corp | 半導体装置 |
| US8270225B2 (en) * | 2007-03-22 | 2012-09-18 | Advantest Corporation | Data receiving circuit |
| JP2008256491A (ja) | 2007-04-04 | 2008-10-23 | Matsushita Electric Ind Co Ltd | 信号遅延検出用回路及びそれを用いた集積回路の検査方法 |
| KR101085564B1 (ko) * | 2007-04-27 | 2011-11-24 | 가부시키가이샤 어드밴티스트 | 시험 장치 및 시험 방법 |
| JP4924223B2 (ja) * | 2007-06-12 | 2012-04-25 | 富士通セミコンダクター株式会社 | 半導体装置 |
| US7827454B2 (en) * | 2007-07-17 | 2010-11-02 | Renesas Electronics Corporation | Semiconductor device |
| US8132136B2 (en) * | 2007-08-06 | 2012-03-06 | International Business Machines Corporation | Dynamic critical path detector for digital logic circuit paths |
| JP2009048674A (ja) * | 2007-08-14 | 2009-03-05 | Nec Electronics Corp | 半導体集積回路 |
| JP5023983B2 (ja) * | 2007-11-14 | 2012-09-12 | 横河電機株式会社 | 半導体試験装置 |
| JP2009150726A (ja) * | 2007-12-19 | 2009-07-09 | Panasonic Corp | 半導体装置 |
| JP2009290857A (ja) * | 2008-01-11 | 2009-12-10 | Toshiba Corp | 半導体装置 |
| KR101138196B1 (ko) * | 2008-01-23 | 2012-05-14 | 가부시키가이샤 어드밴티스트 | 시험 장치 |
| US7834639B2 (en) * | 2008-01-30 | 2010-11-16 | Advantest Corporation | Jitter injection circuit, pattern generator, test apparatus, and electronic device |
| JP5301299B2 (ja) * | 2008-01-31 | 2013-09-25 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| US7923733B2 (en) * | 2008-02-07 | 2011-04-12 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| JP4557018B2 (ja) * | 2008-02-28 | 2010-10-06 | ソニー株式会社 | 位相検出装置、位相比較装置およびクロック同期装置 |
| KR100951567B1 (ko) * | 2008-02-29 | 2010-04-09 | 주식회사 하이닉스반도체 | 데이터 전달의 신뢰성을 보장하기 위한 반도체 메모리 장치 |
| KR100929835B1 (ko) * | 2008-02-29 | 2009-12-07 | 주식회사 하이닉스반도체 | 안정적인 초기 동작을 수행하는 반도체 메모리 장치 |
| US8384406B2 (en) * | 2008-04-14 | 2013-02-26 | Advantest Corporation | Semiconductor test apparatus and test method |
| JP5292925B2 (ja) * | 2008-05-30 | 2013-09-18 | 富士通株式会社 | 半導体集積回路及びその制御方法、並びに情報処理装置 |
| JP2010092306A (ja) * | 2008-10-08 | 2010-04-22 | Nec Electronics Corp | データ処理装置 |
| KR101547302B1 (ko) * | 2009-02-09 | 2015-08-26 | 삼성전자주식회사 | 펄스 기반 플립플롭의 클럭 스큐 흡수특성을 고려한 셋업 시간 측정 방법 |
| US8438518B2 (en) * | 2009-03-03 | 2013-05-07 | Nec Corporation | Apparatus for designing semiconductor integrated circuit, method of designing semiconductor integrated circuit, and program for designing semiconductor integrated circuit |
| JP2010256130A (ja) * | 2009-04-23 | 2010-11-11 | Renesas Electronics Corp | 半導体集積回路、および半導体集積回路のテスト方法 |
| US8402328B2 (en) * | 2009-07-24 | 2013-03-19 | StarDFX Technologies, Inc. | Apparatus and method for protecting soft errors |
| US8489947B2 (en) * | 2010-02-15 | 2013-07-16 | Mentor Graphics Corporation | Circuit and method for simultaneously measuring multiple changes in delay |
| US8555124B2 (en) * | 2010-06-07 | 2013-10-08 | Arm Limited | Apparatus and method for detecting an approaching error condition |
| US8222943B2 (en) * | 2010-09-22 | 2012-07-17 | Freescale Semiconductor, Inc. | Master-slave flip-flop with timing error correction |
-
2012
- 2012-11-30 JP JP2012262826A patent/JP2014109453A/ja active Pending
-
2013
- 2013-10-30 EP EP13190845.1A patent/EP2738941A1/en not_active Withdrawn
- 2013-11-12 US US14/077,277 patent/US9229046B2/en active Active
- 2013-11-29 CN CN201310628016.2A patent/CN103852713B/zh not_active Expired - Fee Related
-
2015
- 2015-11-30 US US14/955,015 patent/US9350333B2/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0875825A (ja) * | 1994-09-09 | 1996-03-22 | Fujitsu Ltd | 試験回路及びその試験方法並びに試験回路を用いた試験方法 |
| JP2001526809A (ja) * | 1997-05-07 | 2001-12-18 | ゼネラル・ダイナミックス・インフォメーション・システムズ・インコーポレーテッド | コンピュータ・システム用非割り込み電力制御 |
| US20020077782A1 (en) * | 1999-05-10 | 2002-06-20 | Fruehling Terry L. | Secured microcontroller architecture |
| JP2002107425A (ja) * | 2000-09-29 | 2002-04-10 | Hitachi Ltd | 半導体集積回路 |
| JP2002181893A (ja) * | 2000-12-11 | 2002-06-26 | Mitsubishi Electric Corp | 半導体装置の検査方法および検査装置 |
| JP2003036697A (ja) * | 2001-07-25 | 2003-02-07 | Mitsubishi Electric Corp | 半導体メモリのテスト回路および半導体メモリデバイス |
| JP2006269477A (ja) * | 2005-03-22 | 2006-10-05 | Seiko Epson Corp | 半導体集積回路 |
| JP2009200739A (ja) * | 2008-02-20 | 2009-09-03 | Panasonic Corp | 半導体集積回路 |
Also Published As
| Publication number | Publication date |
|---|---|
| US9350333B2 (en) | 2016-05-24 |
| US9229046B2 (en) | 2016-01-05 |
| CN103852713A (zh) | 2014-06-11 |
| US20160087612A1 (en) | 2016-03-24 |
| CN103852713B (zh) | 2017-11-17 |
| EP2738941A1 (en) | 2014-06-04 |
| US20140152334A1 (en) | 2014-06-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US11100224B2 (en) | Interference detection device and detection sensitivity adjusting method thereof | |
| JP2014109453A (ja) | 半導体装置 | |
| US7802138B2 (en) | Control method for information processing apparatus, information processing apparatus, control program for information processing system and redundant comprisal control apparatus | |
| US8125246B2 (en) | Method and apparatus for late timing transition detection | |
| US9311206B2 (en) | Method and apparatus for monitoring general purpose input output, GPIO, signals | |
| US9383409B2 (en) | Method of diagnosable scan chain | |
| US10401419B2 (en) | Failure detection circuit, failure detection system and failure detection method | |
| US11054853B2 (en) | Integrated circuit device | |
| KR101560493B1 (ko) | 출력 장치 및 그 진단 방법 | |
| JP4477388B2 (ja) | 集積回路装置及びその評価方法 | |
| KR100851147B1 (ko) | 스마트 정션박스를 이용한 이중 전원시스템 및 그의 라인쇼트 감지방법 | |
| CN105093979B (zh) | 故障安全运算处理装置 | |
| JP2006303480A (ja) | 半導体装置及びその保護方法 | |
| JP6710142B2 (ja) | 制御システム | |
| JP2010238000A (ja) | モジュールのバス接続/切り離し装置 | |
| CA2930522C (en) | Remote shutdown via fiber | |
| US8729920B2 (en) | Circuit and method for RAS-enabled and self-regulated frequency and delay sensor | |
| JP2017220841A (ja) | 二重化対応電流出力システム | |
| JP5622643B2 (ja) | 半導体集積回路及びそのレイアウト方法 | |
| JP2017045344A (ja) | フォールトトレラントシステム | |
| JP2012177646A (ja) | 半導体集積回路及び半導体集積回路のテスト方法 | |
| US20130069698A1 (en) | Reset signal generating circuit and semiconductor integrated circuit including the same | |
| Vierhaus | Error Resilience in Digital Integrated Circuits | |
| JPH1028037A (ja) | クロック切替回路 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20150825 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20150825 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20160630 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20160712 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20170124 |