JP2012023356A - 半導体装置の作製方法 - Google Patents

半導体装置の作製方法 Download PDF

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Publication number
JP2012023356A
JP2012023356A JP2011134102A JP2011134102A JP2012023356A JP 2012023356 A JP2012023356 A JP 2012023356A JP 2011134102 A JP2011134102 A JP 2011134102A JP 2011134102 A JP2011134102 A JP 2011134102A JP 2012023356 A JP2012023356 A JP 2012023356A
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Japan
Prior art keywords
insulating film
film
oxide semiconductor
oxide
semiconductor film
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Withdrawn
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JP2011134102A
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English (en)
Japanese (ja)
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JP2012023356A5 (enExample
Inventor
Akihiro Ishizuka
章広 石塚
Yutaka Yonemitsu
豊 米満
Shinya Sasagawa
慎也 笹川
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP2011134102A priority Critical patent/JP2012023356A/ja
Publication of JP2012023356A publication Critical patent/JP2012023356A/ja
Publication of JP2012023356A5 publication Critical patent/JP2012023356A5/ja
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/535—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Inorganic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Thin Film Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Liquid Crystal (AREA)
  • Electroluminescent Light Sources (AREA)
JP2011134102A 2010-06-18 2011-06-16 半導体装置の作製方法 Withdrawn JP2012023356A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2011134102A JP2012023356A (ja) 2010-06-18 2011-06-16 半導体装置の作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2010139715 2010-06-18
JP2010139715 2010-06-18
JP2011134102A JP2012023356A (ja) 2010-06-18 2011-06-16 半導体装置の作製方法

Related Child Applications (1)

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JP2015216373A Division JP6125595B2 (ja) 2010-06-18 2015-11-04 半導体装置の作製方法

Publications (2)

Publication Number Publication Date
JP2012023356A true JP2012023356A (ja) 2012-02-02
JP2012023356A5 JP2012023356A5 (enExample) 2014-07-10

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JP2015216373A Active JP6125595B2 (ja) 2010-06-18 2015-11-04 半導体装置の作製方法

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Country Status (4)

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US (2) US8906737B2 (enExample)
JP (2) JP2012023356A (enExample)
TW (1) TWI579927B (enExample)
WO (1) WO2011158704A1 (enExample)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013171951A (ja) * 2012-02-20 2013-09-02 Fujitsu Semiconductor Ltd 半導体装置及びその製造方法
JP2013201428A (ja) * 2012-02-23 2013-10-03 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
JP2014103390A (ja) * 2012-10-24 2014-06-05 Semiconductor Energy Lab Co Ltd 半導体装置及びその作製方法
JP2014199907A (ja) * 2012-10-24 2014-10-23 株式会社半導体エネルギー研究所 半導体装置及びその作製方法
JP2021119635A (ja) * 2013-07-10 2021-08-12 株式会社半導体エネルギー研究所 半導体装置
KR20210129564A (ko) * 2020-04-17 2021-10-28 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 이미지 센서 디바이스 및 그 형성 방법

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CN102959713B (zh) 2010-07-02 2017-05-10 株式会社半导体能源研究所 半导体装置
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KR102108572B1 (ko) 2011-09-26 2020-05-07 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 반도체 장치의 제작 방법
US8716708B2 (en) 2011-09-29 2014-05-06 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
KR102034911B1 (ko) * 2012-01-25 2019-10-21 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 반도체 장치의 제작 방법
TW201349297A (zh) * 2012-05-17 2013-12-01 Rexchip Electronics Corp 半導體側壁的離子植入方法
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US9806198B2 (en) 2013-06-05 2017-10-31 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
JP6488124B2 (ja) 2013-12-27 2019-03-20 株式会社半導体エネルギー研究所 半導体装置
KR102799986B1 (ko) 2014-11-28 2025-04-23 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치, 모듈, 및 전자 기기
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KR102485799B1 (ko) * 2015-12-15 2023-01-06 삼성전자주식회사 필름형 반도체 패키지 및 이를 포함하는 디스플레이 장치
JP2017191183A (ja) * 2016-04-12 2017-10-19 株式会社ジャパンディスプレイ 表示装置及びその製造方法
CN109423690B (zh) * 2017-08-21 2022-09-16 株式会社Flosfia 用于制造结晶膜的方法
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JP2021128978A (ja) * 2020-02-12 2021-09-02 株式会社ジャパンディスプレイ 半導体装置及びその製造方法

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