JP5326202B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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- JP5326202B2 JP5326202B2 JP2006317446A JP2006317446A JP5326202B2 JP 5326202 B2 JP5326202 B2 JP 5326202B2 JP 2006317446 A JP2006317446 A JP 2006317446A JP 2006317446 A JP2006317446 A JP 2006317446A JP 5326202 B2 JP5326202 B2 JP 5326202B2
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- insulating film
- wiring
- area
- film
- porous
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Classifications
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76832—Multiple layers
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- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
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- H—ELECTRICITY
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- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen
- H01L21/02216—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
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- H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
- H01L21/02304—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment formation of intermediate layers, e.g. buffer layers, layers to improve adhesion, lattice match or diffusion barriers
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- H—ELECTRICITY
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- H01L21/02351—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light treatment by exposure to corpuscular radiation, e.g. exposure to electrons, alpha-particles, protons or ions
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Description
図3(a)に示すように、半導体基板10に素子分離膜12及びトランジスタ24を形成する。具体的には、例えば以下のような方法で形成を行う。
図3(b)に示すように、層間絶縁膜26、ストッパ膜28及びコンタクトホール30を形成する。具体的には、例えば以下のような方法で形成を行う。
図4(a)に示すように、密着層32及び導体プラグ34を形成する。具体的には、例えば以下のような方法で形成を行う。
図4(b)に示すように、水素化酸化SiC膜(SiC:O:H膜)より成る絶縁膜36を形成する。SiC膜は半導体であるが、内部に酸素原子(O)と水素原子(H)を含んだ水素化酸化SiC膜は絶縁体である。このように、水素化酸化SiC膜からなる絶縁膜36は、緻密性が高い絶縁膜である。絶縁膜36の密度は、後述する多孔質の絶縁膜38の密度より高い。絶縁膜36は、水分等の拡散を防止するバリア膜としても機能する。具体的には、例えば以下のような方法で形成を行う。
図5に示すように、多孔質の層間絶縁膜(第1の絶縁膜)38を形成する。多孔質の層間絶縁膜38を構成する材料としては、例えば
・多孔質のシリコン酸化膜―――(A)
・カーボンを含む多孔質のシリコン酸化膜―――(B)
・有機化合物―――(C)
・クラスタ状の珪素を含む絶縁材料―――(D)
等が挙げられる。以下、これらの形成方法について順に説明する。
多孔質の層間絶縁膜38の膜厚は、例えば膜厚160nmとする。具体的には、例えば以下のような方法で形成を行う。
具体的には、例えば以下のような方法で形成を行う。
具体的には、例えば以下のような方法で形成を行う。
具体的には、例えば以下のような方法で形成を行う。
図6に示すように、多孔質の絶縁膜38に、エネルギー線を選択的に照射する。エネルギー線としては、例えば、電子線或いは紫外線等が使用可能である。電子線の照射(A)及び紫外線の照射(B)は、それぞれ以下のように行う。
1)最初に、電子線照射装置のチャンバ(図示せず)内に、工程5で形成された半導体装置10を載置する(工程6A−1)。
1)最初に、紫外線ランプが設けられたチャンバ内(図示せず)に、半導体基板10を載置する(工程6B−1)。紫外線ランプとしては、例えば高圧水銀ランプを用いる。
図7に示すように、多孔質の層間絶縁膜38が形成された半導体基板10上の全面に、緻密性の高い絶縁膜(第2の絶縁膜)40を形成する。絶縁膜40を形成する方法としては、例えば
・プラズマCVDにより形成する方法―――(A)
・気相成長法により形成する方法―――(B)
・スピンコート法により形成する方法―――(C)
等が挙げられる。以下、これらの形成方法について順に説明する。
以下に、プラズマCVDにより、シリコン酸化膜によって形成される絶縁膜40を形成する方法を説明する。
以下に、気相成長法により、水素化SiC膜(SiC:H膜)からなる絶縁膜40を形成する方法を説明する。
以下に、スピンコート法により、有機SOG膜からなる絶縁膜40を形成する方法を説明する。
図8に示すように、フォトリソグラフィ技術を用い、絶縁膜40、層間絶縁膜38及び絶縁膜36に、配線を埋め込むための溝(トレンチ)46を形成する。具体的には、例えば以下のような方法で形成を行う。
図9に示すように、溝46内に配線50を形成した後、バリア膜としての絶縁膜52を形成する。具体的には、例えば以下のような方法で形成を行う。
図10に示すように、多孔質の層間絶縁膜54を形成した後、層間絶縁膜54に、エネルギー線を選択的に照射する。具体的には、例えば以下のような方法で形成を行う。
図11に示すように、層間絶縁膜54上に絶縁膜56及びストッパ膜57を形成する。最初に、絶縁膜56を形成する(工程11−1)。
図12に示すように、多孔質の層間絶縁膜58を形成した後、層間絶縁膜84に、エネルギー線を選択的に照射する。具体的には、例えば以下のような方法で形成を行う。
図13に示すように、層間絶縁膜58上に絶縁膜60を形成する。絶縁膜60は、緻密性の高い膜である。当該絶縁膜60を層間絶縁膜58上の全面に形成する。絶縁膜60の形成方法は、例えば上述した絶縁膜40の形成方法と同様とする。なお、絶縁膜60の材料としては、例えば水素化酸化SiC膜を用いる。絶縁膜60の膜厚は、例えば30nmとする。
図14に示すように、フォトリソグラフィ技術を用い、絶縁膜52、56、60及び層間絶縁膜52、58に、配線を埋め込むための溝(トレンチ)64を形成する。具体的には、例えば以下のような方法で形成を行う。
図15に示すように、フォトリソグラフィ技術を用い、絶縁膜60、層間絶縁膜58及び絶縁膜56に、配線を埋め込むための溝(トレンチ)72を形成する。具体的には、例えば以下のような方法で形成を行う。
図16に示すように、溝72内に配線76a及び導体プラグ76bを形成した後、バリア膜として機能する絶縁膜78を形成する。具体的には、例えば以下のような方法で形成を行う。
最初に、以下のようにして、絶縁膜材料を作製した(工程V1)。具体的には、先ず、テトラエトキシシラン20.8g(0.1mol)、メチルトリエトキシシラン17.8g(0.1mol)、グリシドキシプロピルトリメトキシシラン23.6g(0.1mol)、及び、メチルイソブチルケトン39.6gを、200mlの反応容器(図示せず)内に入れ、1%のテトラブチルアンモニウムハイドロキサイド水溶液16.2gを10分間で滴下した(工程V1−1)。滴下終了後、熟成反応を2時間行った(工程V1−2)。次に、硫酸マグネシウム5gを添加し、過剰の水分を除去した(工程V1−3)。次に、ロータリーエバポレータを用い、熟成反応の際に生成されたエタノールを、反応溶液が50mlになるまで除去した(工程V1−4)。こうして得られた反応溶液に、メチルイソブチルケトンを20ml添加し、絶縁膜材料(多孔質シリカ前駆体)を作製した(工程V1−5)。
検証例1〜3と略同様の工程で、多孔質の層間絶縁膜を形成した。なお、比較例では、表1に示すように、検証例1〜3で行った工程のうち、工程V4(電子線キュア工程)を行わない。工程V4以外は、全て、検証例1〜3と同じ工程で、多孔質の層間絶縁膜の形成を行った。
検証例4〜6では、実施例1〜3における電子線キュア工程に変えて、紫外線キュア工程を行った。それ(紫外線キュア工程)以外は、全て、検証例1〜3と同じ工程で、多孔質の層間絶縁膜の形成を行った。
(付記1)
配線の配置密度が異なる第1のエリア及び第2のエリアを有する半導体装置の製造方法であって、
前記配線間を絶縁する多孔質の絶縁膜を形成する工程と、
前記絶縁膜の表出する面のうち、前記第1のエリアよりも前記配置密度が小さい前記第2のエリアにエネルギー線を照射し、前記絶縁膜のヤング率が前記第1のエリアに比べて大きな値になるように、前記絶縁膜の構造を変える工程と
を有することを特徴とする半導体装置の製造方法。
(付記2)
前記配線は金属より成り、前記絶縁膜はシリコン酸化膜より成る
ことを特徴とする付記1に記載の半導体装置の製造方法。
(付記3)
前記絶縁膜は、Si,O及びHを含む原料から生成される
ことを特徴とする付記1または2に記載の半導体装置の製造方法。
(付記4)
前記配線と前記絶縁膜とを有する配線層が複数積層され、
前記第1のエリアは、
1の前記配線層における前記配線のうち、最小の配線間ピッチで配置されている部分と、前記部分における配線間のエリアとを併せた最小ピッチ配線エリアを含む
ことを特徴とする付記1〜3のいずれかに記載の半導体装置の製造方法。
(付記5)
前記第1のエリアは、
前記最小ピッチ配線エリアの周囲を、予め定められた距離だけ広げた範囲である
ことを特徴とする付記4に記載の半導体装置の製造方法。
(付記6)
前記配線と前記絶縁膜とを有する配線層が複数積層され、
前記第1のエリアは、
1の前記配線層における全配線について、前記配線の中心から前記配線の幅方向に、予め定められた距離だけ広げた範囲である
ことを特徴とする付記1〜3のいずれかに記載の半導体装置の製造方法。
(付記7)
前記予め定められた距離は、
前記最小の配線間ピッチの2分の1の距離である。
ことを特徴とする付記5または6に記載の半導体装置の製造方法。
(付記8)
前記エネルギー線は電子線である
ことを特徴とする付記1〜7のいずれかに記載の半導体装置の製造方法。
(付記9)
前記エネルギー線は紫外線である
ことを特徴とする付記1〜7のいずれかに記載の半導体装置の製造方法。
(付記10)
前記エネルギー線を照射しながら、熱処理を行う
ことを特徴とする付記1〜9のいずれかに記載の半導体装置の製造方法。
(付記11)
前記絶縁膜を形成する工程は、
スピンコート法より、熱分解性化合物を含む絶縁膜材料を塗布する工程と、
熱処理を行うことにより、前記熱分解性化合物を分解し、前記絶縁膜材料中に空孔を形成することにより、前記絶縁膜を形成する工程と
を有することを特徴とする付記1〜10のいずれかに記載の半導体装置の製造方法。
(付記12)
前記絶縁膜を形成する工程は、
クラスタ状の化合物を含む絶縁材料を塗布する工程と、
熱処理を行い、前記絶縁膜中の溶媒を蒸発させることにより、前記絶縁膜を形成する工程と
を有することを特徴とする付記1〜10のいずれかに記載の半導体装置の製造方法。
(付記13)
配線の配置密度が異なる第1のエリア及び第2のエリアを有する半導体装置であって、
前記配線と前記配線間を絶縁する多孔質の絶縁膜とを有する配線層を有し、
前記配線層のうち、前記第1のエリアよりも前記配置密度が低い前記第2のエリアの前記絶縁膜が、前記第1のエリアの前記絶縁膜のヤング率よりも大きなヤング率になるように、改質されている
ことを特徴とする半導体装置。
(付記14)
前記配線は金属より成り、前記絶縁膜はシリコン酸化膜より成る
ことを特徴とする付記13に記載の半導体装置。
(付記15)
前記第1のエリアは、
1の層における前記配線のうち、最小の配線間ピッチで配置されている部分と、前記部分における配線間のエリアとを併せた最小ピッチ配線エリアを含む
ことを特徴とする付記13または14に記載の半導体装置。
(付記16)
配線の配置密度が異なる複数のエリアを有する半導体装置であって、
前記配線と前記配線間を絶縁する多孔質の絶縁膜とを有する配線層を有し、
前記配線層内で、前記配置密度に応じて異なるヤング率なるように、前記エリア毎に前記絶縁膜が改質されている
ことを特徴とする半導体装置。
12…素子分離膜
14…素子領域
16…ゲート絶縁膜
18…ゲート電極
20…サイドウォール絶縁膜
22…ソース/ドレイン拡散層
24…トランジスタ
26…層間絶縁膜
28、57…ストッパ膜
30、66…コンタクトホール
32…密着層
34…タングステン膜
36、40、52、56、60、78…絶縁膜
37…配線層
37a…断面
38、54、58…層間絶縁膜(多孔質の絶縁膜)
38’…改質部
39a…最小ピッチエリア
39b…照射禁止エリア
44、70…開口部
46、72…溝
48、74…積層膜
50、76a…配線
76b…導体プラグ
76…Cu膜
80…半導体基板
82、83、84、85、86…層間絶縁膜
90…シリコン基板
92a、92b、92c、92d…配線(第1金属配線層)
94a、94b、94c、94d…配線(第2金属配線層)
96a、96b、96c、96d…配線(第3金属配線層)
100…エネルギー線
110、120、130…フォトマスク
112、122、132…ガラス
114、124、134…クロムパターン
150…高電圧発生回路
160…レンズ励磁回路
170…電子線走査回路
Claims (10)
- 配線の配置密度および配線間隔が異なる第1のエリア及び第2のエリアと、前記配線間を絶縁する絶縁膜とを有する半導体装置の製造方法であって、
前記第1および第2のエリアを含むエリアに、面内均等な比誘電率分布を有する多孔質の前記絶縁膜を形成する工程と、
前記絶縁膜の表出する面のうち、前記第1のエリアよりも前記配置密度が小さくかつ前記第1のエリアよりも前記配線間隔が広い前記第2のエリアにエネルギー線を照射し、前記第2のエリアに形成された前記絶縁膜のヤング率が前記第1のエリアに形成された前記絶縁膜のヤング率より大きな値になるように、前記第2のエリアに形成された前記絶縁膜の構造を変える工程と
を有することを特徴とする半導体装置の製造方法。 - 前記配線は金属より成り、前記絶縁膜はシリコン酸化膜より成る
ことを特徴とする請求項1に記載の半導体装置の製造方法。 - 前記配線と前記絶縁膜とを有する配線層が複数積層され、
前記第1のエリアは、
1の前記配線層における前記配線のうち、最小の配線間ピッチで配置されている部分と、前記部分における配線間のエリアとを併せた最小ピッチ配線エリアを含む
ことを特徴とする請求項1または2に記載の半導体装置の製造方法。 - 前記第1のエリアは、
前記最小ピッチ配線エリアの周囲を、予め定められた距離だけ広げたエリアである、
ことを特徴とする請求項3に記載の半導体装置の製造方法。 - 前記配線と前記絶縁膜とを有する配線層が複数積層され、
前記第1のエリアは、
1の前記配線層における全配線について、前記配線の中心から前記配線の幅方向に、予め定められた距離だけ広げたエリアである、
ことを特徴とする請求項1または2に記載の半導体装置の製造方法。 - 前記エネルギー線を照射しながら、熱処理を行う
ことを特徴とする請求項1〜5のいずれかに記載の半導体装置の製造方法。 - 前記絶縁膜を形成する工程は、
スピンコート法により、熱分解性化合物を含む絶縁膜材料を塗布する工程と、
熱処理を行うことにより、前記熱分解性化合物を分解し、前記絶縁膜材料中に空孔を形成することにより、前記絶縁膜を形成する工程と
を有することを特徴とする請求項1〜6のいずれかに記載の半導体装置の製造方法。 - 配線の配置密度および配線間隔が異なる第1のエリア及び第2のエリアを有する半導体装置であって、
前記配線と前記配線間を絶縁する多孔質の絶縁膜とを有する配線層を有し、
前記配線層内の前記絶縁膜は、
前記第1のエリアおよび第2のエリアに形成された面内均等な比誘電率分布および第1のヤング率を有する第1の多孔質絶縁膜のうち、前記第1のエリアに形成された前記第1の多孔質絶縁膜からなる第1の絶縁膜と、
前記第1のエリアよりも前記配置密度が低くかつ前記配線間隔が広い前記第2のエリアに形成された前記第1の多孔質絶縁膜へのエネルギー線の照射により改質して形成された、前記第1のヤング率より大きな第2のヤング率を有する第2の多孔質絶縁膜からなる第2の絶縁膜と、を有する
ことを特徴とする半導体装置。 - 前記配線は金属より成り、前記絶縁膜はシリコン酸化膜より成る
ことを特徴とする請求項8に記載の半導体装置。 - 配線の配置密度および配線間隔が異なる複数のエリアを有する半導体装置であって、
前記配線と前記配線間を絶縁する多孔質の絶縁膜とを有する配線層を有し、
前記配線層内の前記絶縁膜は、
複数の前記エリアに形成された面内均等な比誘電率分布および第1のヤング率を有する第1の多孔質絶縁膜のうち、前記エリアの中で最高の前記配置密度および最狭の前記配線間隔を有する第1のエリアに形成され前記第1の多孔質絶縁膜からなる第1の絶縁膜と、
前記第1のエリアを除く他の前記エリアに形成された前記第1の多孔質絶縁膜へのエネルギー線の照射により改質して形成された、前記第1のヤング率より大きなかつ前記配置密度および前記配線間隔に応じて異なる第2のヤング率を有する第2の多孔質絶縁膜からなる第2の絶縁膜と、を有する
ことを特徴とする半導体装置。
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US11/944,053 US7732927B2 (en) | 2006-11-24 | 2007-11-21 | Semiconductor device having a interlayer insulation film with low dielectric constant and high mechanical strength |
US12/768,823 US20100210106A1 (en) | 2006-11-24 | 2010-04-28 | Semiconductor device having a interlayer insulation film with low dielectric constant and high mechanical strength |
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WO2017034644A2 (en) | 2015-06-09 | 2017-03-02 | ARIZONA BOARD OF REGENTS a body corporate for THE STATE OF ARIZONA for and on behalf of ARIZONA STATE UNIVERSITY | Method of providing an electronic device and electronic device thereof |
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JP2017518638A (ja) | 2014-05-13 | 2017-07-06 | アリゾナ・ボード・オブ・リージェンツ・フォー・アンド・オン・ビハーフ・オブ・アリゾナ・ステイト・ユニバーシティArizona Board Of Regents For And On Behalf Of Arizona State University | 電子デバイスを提供する方法およびその電子デバイス |
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