JP2009518867A5 - - Google Patents

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Publication number
JP2009518867A5
JP2009518867A5 JP2008544483A JP2008544483A JP2009518867A5 JP 2009518867 A5 JP2009518867 A5 JP 2009518867A5 JP 2008544483 A JP2008544483 A JP 2008544483A JP 2008544483 A JP2008544483 A JP 2008544483A JP 2009518867 A5 JP2009518867 A5 JP 2009518867A5
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JP
Japan
Prior art keywords
dielectric material
trench
substrate
layer
field oxide
Prior art date
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Granted
Application number
JP2008544483A
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English (en)
Japanese (ja)
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JP2009518867A (ja
JP5438973B2 (ja
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Publication date
Priority claimed from US11/298,075 external-priority patent/US20070132056A1/en
Application filed filed Critical
Publication of JP2009518867A publication Critical patent/JP2009518867A/ja
Publication of JP2009518867A5 publication Critical patent/JP2009518867A5/ja
Application granted granted Critical
Publication of JP5438973B2 publication Critical patent/JP5438973B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2008544483A 2005-12-09 2006-12-07 半導体集積回路基板の絶縁構造およびその製作方法 Expired - Fee Related JP5438973B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/298,075 US20070132056A1 (en) 2005-12-09 2005-12-09 Isolation structures for semiconductor integrated circuit substrates and methods of forming the same
US11/298,075 2005-12-09
PCT/US2006/046579 WO2007070311A1 (en) 2005-12-09 2006-12-07 Isolation structures for semiconductor integrated circuit substrates and methods of forming the same

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2013076644A Division JP2013168662A (ja) 2005-12-09 2013-04-02 半導体集積回路基板の絶縁構造およびその製作方法

Publications (3)

Publication Number Publication Date
JP2009518867A JP2009518867A (ja) 2009-05-07
JP2009518867A5 true JP2009518867A5 (enExample) 2010-01-28
JP5438973B2 JP5438973B2 (ja) 2014-03-12

Family

ID=38138450

Family Applications (4)

Application Number Title Priority Date Filing Date
JP2008544483A Expired - Fee Related JP5438973B2 (ja) 2005-12-09 2006-12-07 半導体集積回路基板の絶縁構造およびその製作方法
JP2013076644A Pending JP2013168662A (ja) 2005-12-09 2013-04-02 半導体集積回路基板の絶縁構造およびその製作方法
JP2014224436A Expired - Fee Related JP6026486B2 (ja) 2005-12-09 2014-11-04 半導体集積回路基板の絶縁構造の製作方法
JP2016075672A Expired - Fee Related JP6263569B2 (ja) 2005-12-09 2016-04-05 絶縁構造およびその製造方法

Family Applications After (3)

Application Number Title Priority Date Filing Date
JP2013076644A Pending JP2013168662A (ja) 2005-12-09 2013-04-02 半導体集積回路基板の絶縁構造およびその製作方法
JP2014224436A Expired - Fee Related JP6026486B2 (ja) 2005-12-09 2014-11-04 半導体集積回路基板の絶縁構造の製作方法
JP2016075672A Expired - Fee Related JP6263569B2 (ja) 2005-12-09 2016-04-05 絶縁構造およびその製造方法

Country Status (7)

Country Link
US (5) US20070132056A1 (enExample)
EP (1) EP1958249A1 (enExample)
JP (4) JP5438973B2 (enExample)
KR (4) KR101323497B1 (enExample)
CN (1) CN101366112B (enExample)
TW (2) TWI460818B (enExample)
WO (1) WO2007070311A1 (enExample)

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US9768055B2 (en) * 2012-08-21 2017-09-19 Stmicroelectronics, Inc. Isolation regions for SOI devices
US9012300B2 (en) * 2012-10-01 2015-04-21 United Microelectronics Corp. Manufacturing method for a shallow trench isolation
US9455188B2 (en) * 2013-01-18 2016-09-27 Globalfoundries Inc. Through silicon via device having low stress, thin film gaps and methods for forming the same
US20140213034A1 (en) * 2013-01-29 2014-07-31 United Microelectronics Corp. Method for forming isolation structure
US20150069608A1 (en) * 2013-09-11 2015-03-12 International Business Machines Corporation Through-silicon via structure and method for improving beol dielectric performance
US9076868B1 (en) * 2014-07-18 2015-07-07 Globalfoundries Inc. Shallow trench isolation structure with sigma cavity
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