JP2007527123A - サブマウントを置かないフリップチップ発光ダイオード素子 - Google Patents
サブマウントを置かないフリップチップ発光ダイオード素子 Download PDFInfo
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- JP2007527123A JP2007527123A JP2007501814A JP2007501814A JP2007527123A JP 2007527123 A JP2007527123 A JP 2007527123A JP 2007501814 A JP2007501814 A JP 2007501814A JP 2007501814 A JP2007501814 A JP 2007501814A JP 2007527123 A JP2007527123 A JP 2007527123A
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Abstract
【解決手段】発光ダイオード(10)は、最小電極分離(d電極)を形成する少なくとも1つのn型電極(14)と少なくとも1つのp型電極(12)とが配置された背面及び正面を有する。結合パッド層(50)は、最小電極分離(d電極)よりも大きい最小結合パッド分離(dパッド)を形成する少なくとも1つのn型結合パッド(64)と少なくとも1つのp型結合パッド(62)とを含む。発光ダイオード(10)の正面と結合パッド層(50)の間に置かれた少なくとも1つの扇形拡大層(30)は、少なくとも1つのn型電極(14)と少なくとも1つのn型結合パッド(64)の間、及び少なくとも1つのp型電極(12)と少なくとも1つのp型結合パッド(62)の間の電気連通をもたらすために誘電体層(32、52)のバイア(34、54)を通過する複数の導電路を含む。
【選択図】図1
Description
本発明は、上述の制限及びその他を克服する改良型装置及び方法を考えるものである。
本発明は、様々な構成要素及び構成要素の配置、及び様々な工程作業及び工程作業の配置の形態を取ることができる。図面は、単に好ましい実施形態を例示する目的に過ぎず、本発明を限定するように解釈されないものとする。発光ダイオード素子の図面は、縮尺通りではない。
結合パッド層50の形成は、p型接続パッド42とn型接続パッド44へのアクセスを提供するバイア54が形成される第2の誘電体層52の堆積と、次に、バイア54に導電材料56(これは、導電材料36と同じとすることができ、又は導電材料36と異なってもよい)を埋めて結合パッド、特にp型結合パッド62及びn型結合パッド64を形成する金属化工程とを含む。
図4から図11を参照して説明した結合パッドを作製する好ましい工程では、2つの層、すなわち、扇形拡大層30及び結合パッド層50を使用する。
本発明を好ましい実施形態を参照して説明した。明らかに、先の詳細説明を読んで理解すると、他者は、修正及び変更を想起するであろう。本発明は、全てのこのような修正及び変更が特許請求の範囲又はその均等物の範囲に該当する限り、それらを含むように解釈されるものとする。
12 p型電極
14 n型電極
Claims (38)
- 最小電極分離を形成する少なくとも1つのn型電極と少なくとも1つのp型電極とが配置された背面及び正面を有する発光ダイオードと、
前記最小電極分離よりも大きい最小結合パッド分離を形成する少なくとも1つのn型結合パッドと少なくとも1つのp型結合パッドとを含む結合パッド層と、
前記少なくとも1つのn型電極と前記少なくとも1つのn型結合パッドの間、及び前記少なくとも1つのp型電極と前記少なくとも1つのp型結合パッドの間の電気連通をもたらす誘電体層のバイアを通過する複数の導電路を含む、前記発光ダイオードの前記正面と前記結合パッド層の間に置かれた少なくとも1つの扇形拡大層と、
を含むことを特徴とする発光素子。 - 電気回路と、電気回路と前記少なくとも1つのn型結合パッドを結合接続する少なくとも1つのn型結合バンプと、電気回路と前記少なくとも1つのp型結合パッドを接続する少なくとも1つのp型結合バンプとを含み、該結合バンプと該結合パッドの間にサブマウントが配置されていないプリント基板、
を更に含むことを特徴とする請求項1に記載の発光素子。 - 前記少なくとも1つの扇形拡大層は、
前記発光ダイオードの前記正面に近接し、かつ前記結合パッド層から遠位にある第1の扇形拡大層と、
前記発光ダイオードの前記正面から遠位にあり、かつ前記結合パッド層に近接する第2の扇形拡大層と、
を含む、
ことを特徴とする請求項1に記載の発光素子。 - 前記少なくとも1つの扇形拡大層は、
前記少なくとも1つのn型電極と前記少なくとも1つのn型結合パッドの間に配置され、かつ該少なくとも1つのn型電極と該少なくとも1つのn型結合パッドに電気連通している少なくとも1つのn型接続パッドと、
前記少なくとも1つのp型電極と前記少なくとも1つのp型結合パッドの間に配置され、かつ該少なくとも1つのp型電極と該少なくとも1つのp型結合パッドに電気連通している少なくとも1つのp型接続パッドと、
を含む、
ことを特徴とする請求項1に記載の発光素子。 - 前記少なくとも1つのp型接続パッド及び前記少なくとも1つのn型接続パッドは、その間に前記最小結合パッド分離よりも小さい最小接続パッド分離を形成することを特徴とする請求項4に記載の発光素子。
- 前記少なくとも1つの扇形拡大層は、n型及びp型電極を密封することを特徴とする請求項1に記載の発光素子。
- 前記少なくとも1つの扇形拡大層は、複数の扇形拡大層を含み、各扇形拡大層は、
前記n型及びp型電極にそれぞれ電気連通し、最小中間接続パッド分離を形成し、かつ前記発光ダイオードの前記正面から遠位の前記扇形拡大層の側の上に配置されたn型及びp型中間接続パッド、
を更に含み、
前記結合パッドは、前記結合パッド層に隣接して前記扇形拡大層の前記中間接続パッド上に形成される、
ことを特徴とする請求項1に記載の発光素子。 - 前記少なくとも1つの扇形拡大層は、複数の扇形拡大層を含み、各扇形拡大層は、
前記n型及びp型電極にそれぞれ電気連通し、最小中間接続パッド分離を形成し、かつ前記発光ダイオードの前記正面から遠位の前記扇形拡大層の側の上に配置されたn型及びp型中間接続パッド、
を更に含み、
前記結合パッド層に隣接する前記扇形拡大層の前記中間接続パッドは、前記結合パッドを形成している、
ことを特徴とする請求項1に記載の発光素子。 - 前記n型電極及び前記p型接続パッドの少なくとも一方は、複数の電極を含み、前記n型結合パッド及び前記p型結合パッドの前記対応する少なくとも一方は、該複数の電極を電気的に接続することを特徴とする請求項1に記載の発光素子。
- 正面n型及びp型電極を有してその間に最小電極分離を形成した発光ダイオードを支持体にフリップチップ結合する方法であって、
発光ダイオードの少なくとも正面の上に該正面を少なくとも部分的に密封する誘電体層を堆積させる段階と、
前記誘電体層を通してn型及びp型電極にアクセスするバイアを形成する段階と、
前記p型電極及び前記n型電極から成る群から選択された第1の型の電極にアクセスするバイアの上に、該第1の型の電極にアクセスする該バイア間で前記誘電体層の上に延びて第1の型の接触パッドを形成する第1の型の電気接点を配置する段階と、
前記p型電極及び前記n型電極の他方から成る群から選択された第2の型の電極にアクセスする1つ又はそれよりも多くのバイアの上に、前記誘電体層の上に延びて前記第1の型の接触パッドと共に前記最小電極分離よりも大きい最小接触パッド分離を間に形成する第2の型の接触パッドを形成する第2の型の電気接点を配置する段階と、
基板に前記第1の型の接触パッド及び前記第2の型の接触パッドを該接触パッドの少なくとも一方及び該基板上に配置された結合バンプを通じてフリップチップ結合する段階と、
を含むことを特徴とする方法。 - 前記フリップチップ結合する段階は、前記最小電極分離よりも大きくかつ前記最小接触パッド分離よりも小さい横方向許容誤差を有する結合工程を用いることを特徴とする請求項10に記載の方法。
- 前記第1の型の電気接点を配置する段階及び前記第2の型の電気接点を配置する段階の各々は、リフロースタックを堆積させる段階を含み、前記フリップチップ結合する段階は、
前記接触パッドと前記結合バンプの間にリフロー結合を達成するために加熱する段階、
を含む、
ことを特徴とする請求項10に記載の方法。 - 前記加熱する段階は、前記リフロースタックの少なくとも1つの構成要素の融点よりも高い温度で行われることを特徴とする請求項12に記載の方法。
- 前記リフロースタックは、錫層を含み、前記加熱する段階は、約232℃よりも高い温度で行われることを特徴とする請求項13に記載の方法。
- 前記フリップチップ結合する段階は、
前記加熱する段階の前に、前記接触パッドと前記基板の前記結合バンプとの間に酸化物還元融解剤を配置する段階、
を更に含む、
ことを特徴とする請求項12に記載の方法。 - 前記第1の型の電極にアクセスするバイアの上に第1の型の電気接点を配置する前記段階は、
前記第1の型の電極にアクセスする前記バイアにシード層を堆積させる段階と、
前記第1の型の電極にアクセスする第1のバイアを埋めるために電気メッキする段階と、
を含む、
ことを特徴とする請求項10に記載の方法。 - 前記第1の型の電極にアクセスするバイアの上に第1の型の電気接点を配置する前記段階は、
前記第1の型の電極にアクセスする前記バイアが埋められた後に、前記電気メッキされた材料が該バイアの外側にマッシュルームして前記第1の型の接触パッドを形成するように前記電気メッキする段階を継続する段階、
を更に含む、
ことを特徴とする請求項16に記載の方法。 - 前記第1の型の電極にアクセスするバイアの上に第1の型の電気接点を配置する前記段階は、
前記第1の型の電極にアクセスする前記バイアの上、及び該第1の型の電極にアクセスする該バイア間の前記誘電体層の上に導電材料を堆積させる段階、
を含む、
ことを特徴とする請求項10に記載の方法。 - 前記フリップチップ結合する段階は、導電接着結合段階及び半田付け段階の一方であることを特徴とする請求項10に記載の方法。
- 前記発光ダイオードの正面の上に誘電体層を堆積させる前記段階は、
少なくとも2ミクロンの厚みを有するポリアミド誘電体層を堆積させる段階、
を含む、
ことを特徴とする請求項10に記載の方法。 - 正面n型及びp型電極を有する前記発光ダイオードは、他の発光ダイオードがそこに形成された基板ウェーハを含み、
前記誘電体層を堆積させる段階、前記第1の型の電気接点を配置する段階、及び前記第2の型の電気接点を配置する段階に続いて、少なくとも正面n型及びp型電極を有する少なくとも前記発光ダイオードを前記他の発光ダイオードから隔離するために前記基板ウェーハをダイスカットする段階、
を更に含むことを特徴とする請求項10に記載の方法。 - 前記誘電体層を堆積させる段階、前記第1の型の電気接点を配置する段階、及び前記第2の型の電気接点を配置する段階に続いて、かつ前記ダイスカットする段階の前に、少なくとも1つのウェーハレベルの工程を実行する段階、
を更に含むことを特徴とする請求項21に記載の方法。 - 少なくとも1つのウェーハレベルの工程を実行する前記段階は、
前記正面の反対側である前記基板ウェーハの背面を封入する段階、及び
前記正面の反対側である前記基板ウェーハの背面に蛍光体を付加する段階、
の少なくとも一方を含む、
ことを特徴とする請求項22に記載の方法。 - 基板に第1の型の接触パッド及び第2の型の接触パッドを該接触パッドの少なくとも一方及び該基板上に配置された結合バンプを通じてフリップチップ結合する前記段階は、
結合バンプを形成する1つ又はそれよりも多くの金属スタック、
1つ又はそれよりも多くの半田付け可能合金結合バンプ、及び
前記接触パッド上に配置された1つ又はそれよりも多くの結合バンプ、
のうちの1つを通じてフリップチップ結合する段階を含み、各結合バンプは、障壁金属を含むことを特徴とする請求項10に記載の方法。 - 正面n型及びp型電極を有してその間に最小電極分離を形成する発光ダイオードをフリップチップ結合して該発光ダイオードをプリント基板に機械的に固定し、かつ該正面n型及びp型電極を該プリント基板のプリント回路に電気的に接続する方法であって、
n型及びp型電極にアクセスするための貫通するバイアを有する誘電体層を少なくとも該n型及びp型電極の上に配置する段階と、
前記バイア及び前記誘電体層の上に電気接触パッドを配置する段階と、
を含み、
前記電気接触パッドは、選択されたバイアを通じて前記p型電極に接続するp型接触パッドと、選択された他のバイアを通じて前記n型電極に接続するn型接触パッドとを含み、該接触パッドは、その間に最小電極分離よりも大きい最小接触パッド分離を有して前記誘電体層の上に配置されており、
前記接触パッドを前記プリント基板のプリント回路に該プリント基板及びチップの一方に配置された結合バンプを通じてフリップチップ結合する段階、
を更に含み、
前記フリップチップ結合する段階は、前記最小電極分離よりも大きく前記最小接触パッド分離よりも小さい機械的許容誤差を有し、前記接触パッドと前記プリント基板の間にサブマウントは配置されない、
ことを特徴とする方法。 - 電気接触パッドを配置する前記段階は、
シード層を前記バイアの内側に堆積させる段階と、
前記バイアを埋め、かつ電気メッキ材料を前記誘電体層の上に延ばして前記p型接触パッド及び前記n型接触パッドを形成するために電気メッキする段階と、
を含む、
ことを特徴とする請求項25に記載の方法。 - 電気接触パッドを配置する前記段階は、リフロー層を堆積させる段階を含み、
前記接触パッドを結合バンプにフリップチップ結合する前記段階は、該結合バンプに接触して該接触パッドを配置し、リフロー結合を達成するために前記リフロー層に熱を加える段階を含む、
ことを特徴とする請求項25に記載の方法。 - 前記リフロー層は、錫及び金を含むことを特徴とする請求項27に記載の方法。
- 前記バイア及び前記誘電体層の上に電気接触パッドを配置する前記段階は、
前記バイアを第1の導電材料で埋める段階と、
前記第1の導電材料にアクセスするための貫通するバイアを有する第2の誘電体層を該第1の導電材料の上に配置する段階と、
前記第1の導電材料と前記第2の誘電体層を通る前記バイアとを通じて前記n型及びp型電極に電気的に接触する前記電気接触パッドを該第2の誘電体層の上に配置する段階と、
を含む、
ことを特徴とする請求項25に記載の方法。 - 前記バイア及び前記誘電体層の上に電気接触パッドを配置する前記段階は、
前記電気接触パッドを配置する段階の前に、前記第2の誘電体層を通る前記バイアを第2の導電材料で埋め、該第2の導電材料の上に第3の誘電体層を配置する段階、
を更に含み、
前記第3の誘電体層は、前記第2の導電材料にアクセスするために貫通するバイアを有し、
前記電気接触パッドは、前記第3の誘電体層の上に配置され、前記第1の導電材料と、前記第2の導電材料と、該第3の誘電体層を通る前記バイアとを通じて前記n型及びp型電極に電気的に接触する、
ことを特徴とする請求項29に記載の方法。 - 前記発光ダイオードは、基板ウェーハの一部分を更に含み、これは、該基板ウェーハ上に作製された他の発光ダイオードと共有されており、誘電体層を配置する前記段階及び電気接触パッドを配置する前記段階は、p型及びn型電気接触パッドを該他の発光ダイオード上に付加的な配置するウェーハレベル工程として行われるものであり、
前記電気接触パッドを配置する段階の後で、かつ前記フリップチップ結合する段階の前に、前記発光ダイオードを前記他の発光ダイオードから分離するために前記基板ウェーハをダイスカットする段階、
を更に含むことを特徴とする請求項25に記載の方法。 - 前記電気接触パッドを配置する段階の後で、かつ前記基板ウェーハをダイスカットする段階の前に、前記発光ダイオード上に少なくとも1つの光学要素を形成するために少なくとも付加的なウェーハレベル工程を実行する段階、
を更に含むことを特徴とする請求項31に記載の方法。 - 前記少なくとも1つの光学要素は、封入材料、蛍光体層、及び反射コーティングから成る群から選択されることを特徴とする請求項32に記載の方法。
- 前記誘電体層を配置する段階は、
前記p型及びn型電気接触パッドを密封する段階を含んで前記発光ダイオードの正面を密封するために、前記基板ウェーハの上に前記誘電体層を配置する段階、
を含む、
ことを特徴とする請求項32に記載の方法。 - 各々が正面n型及びp型電極を有してその間に最小電極分離を形成する複数の発光ダイオードが作製されたウェーハを処理する方法であって、
n型及びp型電極にアクセスするための貫通するバイアを有する誘電体層を少なくとも該n型及びp型電極の上に配置する段階と、
前記バイア及び前記誘電体層の上に電気接触パッドを配置する段階と、
を含み、
各発光ダイオードに対する前記電気接触パッドは、前記p型電極に接続するp型接触パッドと前記n型電極に接続するn型接触パッドとを含み、該接続は、前記バイアを通じたものであり、各発光ダイオードに対する前記接触パッドは、その間に前記最小電極分離よりも大きい最小接触パッド分離を有して前記誘電体層の上に配置されており、
前記電気接触パッドを配置する段階の後に、前記発光ダイオードを分離するために前記ウェーハをダイスカットする段階、
を更に含むことを特徴とする方法。 - 電気接触パッドを配置する段階に続いて、かつ前記ウェーハをダイスカットする段階の前に、前記発光ダイオードが配置された該ウェーハの側の反対側である該ウェーハの背面に少なくとも1つの光学コーティングを付加する段階、
を更に含むことを特徴とする請求項35に記載の方法。 - 前記ウェーハをダイスカットする段階は、前記発光ダイオードが該ウェーハによって互いに固定されたままになるように該ウェーハを通して部分的分離切り込みを作る段階と、該発光ダイオードを分離するために該部分的分離切り込みに沿って破断する段階とを含み、
前記部分的分離切り込みを作る段階の後で、かつ該部分的分離切り込みに沿って破断する段階の前に、該部分的分離切り込みによって形成された表面に金属コーティングを付加する段階、
を更に含むことを特徴とする請求項35に記載の方法。 - 電気接触パッドを配置する前記段階に続いて、かつ前記ダイスカットする段階の前に、前記ウェーハの正面を該電気接触パッドが該ウェーハの該正面上に配置された状態でテープに固定する段階と、
前記ダイスカットする段階に続いて、前記分離された発光ダイオードの選択された間隔を形成するために前記テープを延伸する段階と、
前記延伸する段階に続いて、前記発光ダイオードに成形材料を付加する段階と、
を更に含むことを特徴とする請求項35に記載の方法。
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US7179670B2 (en) | 2007-02-20 |
US20050194605A1 (en) | 2005-09-08 |
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WO2005091848A3 (en) | 2006-01-19 |
EP1726033A2 (en) | 2006-11-29 |
KR20060129526A (ko) | 2006-12-15 |
US20070114557A1 (en) | 2007-05-24 |
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