JP2007305981A5 - - Google Patents

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JP2007305981A5
JP2007305981A5 JP2007108385A JP2007108385A JP2007305981A5 JP 2007305981 A5 JP2007305981 A5 JP 2007305981A5 JP 2007108385 A JP2007108385 A JP 2007108385A JP 2007108385 A JP2007108385 A JP 2007108385A JP 2007305981 A5 JP2007305981 A5 JP 2007305981A5
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layer
etching
deposition
depositing
substrate
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JP2007108385A
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JP5405004B2 (ja
JP2007305981A (ja
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JP2007108385A 2006-04-17 2007-04-17 総合プロセスモジュレーション（ｉｐｍ）ｈｄｐ−ｃｖｄによるギャップ充填のための新規な解決法 Expired - Fee Related JP5405004B2 (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US79274306P 2006-04-17 2006-04-17
US60/792743 2006-04-17
US11/553,772 US7524750B2 (en) 2006-04-17 2006-10-27 Integrated process modulation (IPM) a novel solution for gapfill with HDP-CVD
US11/553772 2006-10-27

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JP2007305981A JP2007305981A (ja) 2007-11-22
JP2007305981A5 true JP2007305981A5 (https=) 2010-05-20
JP5405004B2 JP5405004B2 (ja) 2014-02-05

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JP2007108385A Expired - Fee Related JP5405004B2 (ja) 2006-04-17 2007-04-17 総合プロセスモジュレーション（ｉｐｍ）ｈｄｐ−ｃｖｄによるギャップ充填のための新規な解決法

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US (1) US7524750B2 (https=)
JP (1) JP5405004B2 (https=)
KR (1) KR100880967B1 (https=)
CN (1) CN100539039C (https=)
SG (1) SG136873A1 (https=)
TW (1) TW200802605A (https=)

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