JP2006522488A5 - - Google Patents

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Publication number
JP2006522488A5
JP2006522488A5 JP2006509472A JP2006509472A JP2006522488A5 JP 2006522488 A5 JP2006522488 A5 JP 2006522488A5 JP 2006509472 A JP2006509472 A JP 2006509472A JP 2006509472 A JP2006509472 A JP 2006509472A JP 2006522488 A5 JP2006522488 A5 JP 2006522488A5
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Japan
Prior art keywords
fin structure
semiconductor device
fin
gate
crystal silicon
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JP2006509472A
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JP2006522488A (ja
JP5009611B2 (ja
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Priority claimed from US10/405,343 external-priority patent/US6762448B1/en
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Claims (12)

  1. 絶縁材料を含んでおり、第1側面および第2側面を含む第1フィン構と、
    単結晶シリコン材料を含んでおり、前記第1フィン構の第1側面に隣接して形成される第2フィン構と、
    単結晶シリコン材料を含んでおり、前記第1フィン構の第2側面に隣接して形成される第3フィン構と、
    前記第1フィン構、第2フィン構および第3フィン構の一端に形成されるソース領と、
    前記第1フィン構、第2フィン構および第3フィン構の他端に形成されるドレイン領と、
    少なくとも1つのゲーと、
    を含む、半導体デバイス。
  2. 前記第1フィン構の幅は、約200Åから約1000Åの間である、請求項1記載の半導体デバイス。
  3. 前記絶縁材料は、酸化物または窒化物のいずれか一方を含む、請求項1記載の半導体デバイス。
  4. 前記第2フィン構および前記第3フィン構のそれぞれの幅は、約100Åから約1000Åの間である、請求項1記載の半導体デバイス。
  5. 前記第1フィン構造、前記第2フィン構造、および前記第3フィン構造は、半導体の基板の上面に形成される、請求項1ないし4のいずれかの項記載の半導体デバイス。
  6. 第1フィン構を形成すべく絶縁をエッチングするステップと、
    アモルファスシリコンをたい積するステップと、
    前記第1フィン構の第1側面に隣接する第2フィン構と、前記第1フィン構の逆側の第2側面に隣接する第3フィン構を形成すべく、前記アモルファスシリコンをエッチングするステップと、
    前記第2フィン構および前記第3フィン構の少なくとも上面にメタルをたい積するステップと、
    前記第2フィン構と前記第3フィン構中のアモルファスシリコンを単結晶シリコン材料に変換すべく、金属誘起結晶化処理を実行するステップと、
    ソース領およびドレイン領を形成するステップと、
    前記第1フィン構、第2フィン構ないし第3フィン構上にゲート材料をたい積するステップと、
    少なくとも1つのゲート電を形成すべく、ゲート材料をパターン化しエッチングするステップと、
    を有する、基と、この基上に形成される絶縁とを含んだ半導体デバイスを製造する方法。
  7. 前記絶縁は、酸化物および窒化物の少なくとも一方を含む、請求項記載の方法。
  8. 単結晶シリコン材料を含む第1フィン構と、
    前記単結晶シリコン材料を含む第2フィン構と、
    前記第1フィン構と前記第2フィン構の間に位置し、絶縁材料を含む第3フィン構と、含み、
    前記第3フィン構は、前記第1フィン構および前記第2フィン構の前記単結晶シリコン材料に応力を誘起する、
    半導体デバイス。
  9. 前記第1フィン構および前記第2フィン構のそれぞれの幅は、約100Åから約1000Åの間である、請求項記載の半導体デバイス。
  10. 前記第3フィン構の幅は、約100Åから約1000Åの間である、請求項記載の半導体デバイス。
  11. 前記絶縁材料は、酸化物および窒化物の少なくとも一方を含む、請求項10記載の半導体デバイス。
  12. 前記第1フィン構造、第2フィン構造および第3フィン構造の一端に位置するソース領域と、
    前記第1フィン構造、第2フィン構造および第3フィン構造の他端に位置するドレイン領域と、
    少なくとも1つのゲートと、
    をさらに含む、請求項8記載の半導体デバイス。
JP2006509472A 2003-04-03 2004-03-29 Finfetデバイス中の構造を形成する方法 Expired - Lifetime JP5009611B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/405,343 2003-04-03
US10/405,343 US6762448B1 (en) 2003-04-03 2003-04-03 FinFET device with multiple fin structures
PCT/US2004/009696 WO2004093197A2 (en) 2003-04-03 2004-03-29 Method for forming structures in finfet devices

Publications (3)

Publication Number Publication Date
JP2006522488A JP2006522488A (ja) 2006-09-28
JP2006522488A5 true JP2006522488A5 (ja) 2007-06-28
JP5009611B2 JP5009611B2 (ja) 2012-08-22

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JP2006509472A Expired - Lifetime JP5009611B2 (ja) 2003-04-03 2004-03-29 Finfetデバイス中の構造を形成する方法

Country Status (8)

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US (2) US6762448B1 (ja)
JP (1) JP5009611B2 (ja)
KR (1) KR101070845B1 (ja)
CN (1) CN100413038C (ja)
DE (1) DE112004000586B4 (ja)
GB (1) GB2417829B (ja)
TW (1) TWI384614B (ja)
WO (1) WO2004093197A2 (ja)

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