JP2005235860A - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法 Download PDF

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Publication number
JP2005235860A
JP2005235860A JP2004040409A JP2004040409A JP2005235860A JP 2005235860 A JP2005235860 A JP 2005235860A JP 2004040409 A JP2004040409 A JP 2004040409A JP 2004040409 A JP2004040409 A JP 2004040409A JP 2005235860 A JP2005235860 A JP 2005235860A
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JP
Japan
Prior art keywords
layer
semiconductor device
via hole
barrier layer
rewiring
Prior art date
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Pending
Application number
JP2004040409A
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English (en)
Japanese (ja)
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JP2005235860A5 (enExample
Inventor
Kojiro Kameyama
工次郎 亀山
Akira Suzuki
彰 鈴木
Yoshihisa Okayama
芳央 岡山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
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Sanyo Electric Co Ltd
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Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP2004040409A priority Critical patent/JP2005235860A/ja
Priority to TW094102436A priority patent/TWI261343B/zh
Priority to US11/054,603 priority patent/US7256497B2/en
Priority to KR1020050012334A priority patent/KR100646722B1/ko
Priority to EP05003396.8A priority patent/EP1564806B1/en
Priority to CN2005100093505A priority patent/CN1658385A/zh
Publication of JP2005235860A publication Critical patent/JP2005235860A/ja
Publication of JP2005235860A5 publication Critical patent/JP2005235860A5/ja
Priority to US11/822,262 priority patent/US7759247B2/en
Pending legal-status Critical Current

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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2004040409A 2004-02-17 2004-02-17 半導体装置及びその製造方法 Pending JP2005235860A (ja)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP2004040409A JP2005235860A (ja) 2004-02-17 2004-02-17 半導体装置及びその製造方法
TW094102436A TWI261343B (en) 2004-02-17 2005-01-27 Semiconductor device and method of manufacturing the same
US11/054,603 US7256497B2 (en) 2004-02-17 2005-02-10 Semiconductor device with a barrier layer and a metal layer
KR1020050012334A KR100646722B1 (ko) 2004-02-17 2005-02-15 반도체 장치 및 그 제조 방법
EP05003396.8A EP1564806B1 (en) 2004-02-17 2005-02-17 Semiconductor device and manufacturing method of the same
CN2005100093505A CN1658385A (zh) 2004-02-17 2005-02-17 半导体装置及其制造方法
US11/822,262 US7759247B2 (en) 2004-02-17 2007-07-03 Manufacturing method of semiconductor device with a barrier layer and a metal layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004040409A JP2005235860A (ja) 2004-02-17 2004-02-17 半導体装置及びその製造方法

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JP2005235860A true JP2005235860A (ja) 2005-09-02
JP2005235860A5 JP2005235860A5 (enExample) 2007-03-15

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JP2004040409A Pending JP2005235860A (ja) 2004-02-17 2004-02-17 半導体装置及びその製造方法

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US (2) US7256497B2 (enExample)
EP (1) EP1564806B1 (enExample)
JP (1) JP2005235860A (enExample)
KR (1) KR100646722B1 (enExample)
CN (1) CN1658385A (enExample)
TW (1) TWI261343B (enExample)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009194399A (ja) * 2009-05-27 2009-08-27 Sony Corp 固体撮像装置
WO2011058712A1 (ja) 2009-11-12 2011-05-19 パナソニック株式会社 半導体装置及び半導体装置の製造方法
WO2012057200A1 (ja) * 2010-10-29 2012-05-03 株式会社フジクラ 貫通配線基板の製造方法及び貫通配線基板
JP2013247254A (ja) * 2012-05-25 2013-12-09 Lapis Semiconductor Co Ltd 半導体装置およびその製造方法
US9349673B2 (en) 2012-07-04 2016-05-24 Seiko Epson Corporation Substrate, method of manufacturing substrate, semiconductor device, and electronic apparatus
JP2016115837A (ja) * 2014-12-16 2016-06-23 シチズンホールディングス株式会社 半導体装置及びその製造方法

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4850392B2 (ja) 2004-02-17 2012-01-11 三洋電機株式会社 半導体装置の製造方法
TWI250596B (en) * 2004-07-23 2006-03-01 Ind Tech Res Inst Wafer-level chip scale packaging method
JP4443379B2 (ja) 2004-10-26 2010-03-31 三洋電機株式会社 半導体装置の製造方法
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