KR100646722B1 - 반도체 장치 및 그 제조 방법 - Google Patents

반도체 장치 및 그 제조 방법 Download PDF

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Publication number
KR100646722B1
KR100646722B1 KR1020050012334A KR20050012334A KR100646722B1 KR 100646722 B1 KR100646722 B1 KR 100646722B1 KR 1020050012334 A KR1020050012334 A KR 1020050012334A KR 20050012334 A KR20050012334 A KR 20050012334A KR 100646722 B1 KR100646722 B1 KR 100646722B1
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layer
via hole
barrier layer
semiconductor substrate
semiconductor device
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KR20060041950A (ko
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고우지로 가메야마
아끼라 스즈끼
요시오 오까야마
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산요덴키가부시키가이샤
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1020050012334A 2004-02-17 2005-02-15 반도체 장치 및 그 제조 방법 Expired - Lifetime KR100646722B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2004040409A JP2005235860A (ja) 2004-02-17 2004-02-17 半導体装置及びその製造方法
JPJP-P-2004-00040409 2004-02-17

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KR20060041950A KR20060041950A (ko) 2006-05-12
KR100646722B1 true KR100646722B1 (ko) 2006-11-23

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US (2) US7256497B2 (enExample)
EP (1) EP1564806B1 (enExample)
JP (1) JP2005235860A (enExample)
KR (1) KR100646722B1 (enExample)
CN (1) CN1658385A (enExample)
TW (1) TWI261343B (enExample)

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JP4850392B2 (ja) 2004-02-17 2012-01-11 三洋電機株式会社 半導体装置の製造方法
TWI250596B (en) * 2004-07-23 2006-03-01 Ind Tech Res Inst Wafer-level chip scale packaging method
JP4443379B2 (ja) 2004-10-26 2010-03-31 三洋電機株式会社 半導体装置の製造方法
JP4873517B2 (ja) * 2004-10-28 2012-02-08 オンセミコンダクター・トレーディング・リミテッド 半導体装置及びその製造方法
JP4641820B2 (ja) * 2005-02-17 2011-03-02 三洋電機株式会社 半導体装置の製造方法
US7485967B2 (en) 2005-03-10 2009-02-03 Sanyo Electric Co., Ltd. Semiconductor device with via hole for electric connection
US9601474B2 (en) * 2005-07-22 2017-03-21 Invensas Corporation Electrically stackable semiconductor wafer and chip packages
JP2007184553A (ja) * 2005-12-06 2007-07-19 Sanyo Electric Co Ltd 半導体装置及びその製造方法
JP2007311771A (ja) * 2006-04-21 2007-11-29 Sanyo Electric Co Ltd 半導体装置及びその製造方法
JP4812512B2 (ja) * 2006-05-19 2011-11-09 オンセミコンダクター・トレーディング・リミテッド 半導体装置の製造方法
JP5143382B2 (ja) * 2006-07-27 2013-02-13 オンセミコンダクター・トレーディング・リミテッド 半導体装置及びその製造方法
WO2008072165A1 (en) * 2006-12-12 2008-06-19 Nxp B.V. Method of manufacturing openings in a substrate, a via in a substrate, and a semiconductor device comprising such a via
US20090089515A1 (en) * 2007-10-02 2009-04-02 Qualcomm Incorporated Memory Controller for Performing Memory Block Initialization and Copy
JP5136515B2 (ja) * 2009-05-27 2013-02-06 ソニー株式会社 固体撮像装置
JP5150566B2 (ja) * 2009-06-22 2013-02-20 株式会社東芝 半導体装置およびカメラモジュール
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