JP2003110095A - 集積回路およびその形成方法 - Google Patents

集積回路およびその形成方法

Info

Publication number
JP2003110095A
JP2003110095A JP2002232063A JP2002232063A JP2003110095A JP 2003110095 A JP2003110095 A JP 2003110095A JP 2002232063 A JP2002232063 A JP 2002232063A JP 2002232063 A JP2002232063 A JP 2002232063A JP 2003110095 A JP2003110095 A JP 2003110095A
Authority
JP
Japan
Prior art keywords
level
ferroelectric
insulating layer
transistor
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002232063A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003110095A5 (enExample
Inventor
Ted Moise
テッド・モイス
Scott Summerfelt
スコット・サマーフェルト
Eden Zielinski
エデン・ツィーリンスキ
Scott Johnson
スコット・ジョンソン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Agilent Technologies Inc
Original Assignee
Agilent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agilent Technologies Inc filed Critical Agilent Technologies Inc
Publication of JP2003110095A publication Critical patent/JP2003110095A/ja
Publication of JP2003110095A5 publication Critical patent/JP2003110095A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/682—Capacitors having no potential barriers having dielectrics comprising perovskite structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/682—Capacitors having no potential barriers having dielectrics comprising perovskite structures
    • H10D1/688—Capacitors having no potential barriers having dielectrics comprising perovskite structures comprising barrier layers to prevent diffusion of hydrogen or oxygen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2002232063A 2001-08-08 2002-08-08 集積回路およびその形成方法 Pending JP2003110095A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/925214 2001-08-08
US09/925,214 US6734477B2 (en) 2001-08-08 2001-08-08 Fabricating an embedded ferroelectric memory cell

Publications (2)

Publication Number Publication Date
JP2003110095A true JP2003110095A (ja) 2003-04-11
JP2003110095A5 JP2003110095A5 (enExample) 2005-11-04

Family

ID=25451394

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002232063A Pending JP2003110095A (ja) 2001-08-08 2002-08-08 集積回路およびその形成方法

Country Status (4)

Country Link
US (1) US6734477B2 (enExample)
JP (1) JP2003110095A (enExample)
KR (1) KR100901950B1 (enExample)
DE (1) DE10228765A1 (enExample)

Cited By (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004349474A (ja) * 2003-05-22 2004-12-09 Toshiba Corp 半導体装置とその製造方法
WO2005101508A1 (ja) * 2004-04-02 2005-10-27 Fujitsu Limited 半導体装置及びその製造方法
JP2006245457A (ja) * 2005-03-07 2006-09-14 Oki Electric Ind Co Ltd 半導体装置及びその製造方法
JP2007096178A (ja) * 2005-09-30 2007-04-12 Toshiba Corp 半導体装置およびその製造方法
US7244979B2 (en) 2004-12-28 2007-07-17 Seiko Epson Corporation Semiconductor memory device and method for manufacturing the same
JPWO2005067051A1 (ja) * 2003-12-26 2007-07-26 富士通株式会社 半導体装置、半導体装置の製造方法
JP2007524980A (ja) * 2003-12-16 2007-08-30 インターナショナル・ビジネス・マシーンズ・コーポレーション 減少されたコンタクト高さでのバイポーラ及びｃｍｏｓの集積回路構造体
JP2007227752A (ja) * 2006-02-24 2007-09-06 Seiko Epson Corp キャパシタおよびその製造方法
JP2007242928A (ja) * 2006-03-09 2007-09-20 Seiko Epson Corp 強誘電体メモリ装置の製造方法及び強誘電体メモリ装置
JP2007242929A (ja) * 2006-03-09 2007-09-20 Seiko Epson Corp 強誘電体メモリ装置の製造方法
WO2008114413A1 (ja) * 2007-03-20 2008-09-25 Fujitsu Microelectronics Limited 半導体装置の製造方法
JP2008277514A (ja) * 2007-04-27 2008-11-13 Toshiba Corp 半導体装置
JP2008300376A (ja) * 2007-05-29 2008-12-11 Toshiba Corp 半導体装置
JP2009010380A (ja) * 2007-06-26 2009-01-15 Dongbu Hitek Co Ltd 金属絶縁体金属キャパシタの製造方法
JP2011044660A (ja) * 2009-08-24 2011-03-03 Renesas Electronics Corp 半導体装置及び半導体装置の製造方法
US8247323B2 (en) 2005-10-07 2012-08-21 Fujitsu Semiconductor Limited Semiconductor device
JP2012216859A (ja) * 2012-06-18 2012-11-08 Fujitsu Semiconductor Ltd 半導体装置及びその製造方法
US8362533B2 (en) 2007-04-27 2013-01-29 Kabushiki Kaisha Toshiba Semiconductor device including a transistor and a ferroelectric capacitor
JP5667875B2 (ja) * 2008-09-16 2015-02-12 ローム株式会社 半導体記憶装置および半導体記憶装置の製造方法
US9305996B2 (en) 2007-02-21 2016-04-05 Fujitsu Semiconductor Limited Semiconductor device
JP2021087007A (ja) * 2019-11-26 2021-06-03 インテル・コーポレーション 集積回路のメタライゼーションスタックの配線工程における選択的な相互接続

Families Citing this family (55)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7256089B2 (en) * 2001-09-24 2007-08-14 Intel Corporation Top electrode barrier for on-chip die de-coupling capacitor and method of making same
EP1453093A4 (en) * 2001-11-05 2007-10-10 Zycube Co Ltd SEMICONDUCTOR COMPONENT WITH A LOW-DINE-CIRCULAR MATERIAL FILM AND METHOD FOR THE PRODUCTION THEREOF
KR100561839B1 (ko) * 2001-11-10 2006-03-16 삼성전자주식회사 강유전체 커패시터 및 그 제조방법
US6767750B2 (en) * 2001-12-31 2004-07-27 Texas Instruments Incorporated Detection of AIOx ears for process control in FeRAM processing
US7535066B2 (en) * 2002-01-23 2009-05-19 Texas Instruments Incorporated Gate structure and method
US6656748B2 (en) * 2002-01-31 2003-12-02 Texas Instruments Incorporated FeRAM capacitor post stack etch clean/repair
US6830984B2 (en) * 2002-02-15 2004-12-14 Lsi Logic Corporation Thick traces from multiple damascene layers
JP2003243630A (ja) * 2002-02-18 2003-08-29 Sony Corp 磁気メモリ装置およびその製造方法
JP4340040B2 (ja) * 2002-03-28 2009-10-07 富士通マイクロエレクトロニクス株式会社 半導体装置の製造方法
US6746914B2 (en) * 2002-05-07 2004-06-08 Chartered Semiconductor Manufacturing Ltd. Metal sandwich structure for MIM capacitor onto dual damascene
JP4037711B2 (ja) * 2002-07-26 2008-01-23 株式会社東芝 層間絶縁膜内に形成されたキャパシタを有する半導体装置
US20040163233A1 (en) * 2003-02-26 2004-08-26 Stefan Gernhardt Methods of forming electrical connections within ferroelectric devices
KR100532427B1 (ko) * 2003-03-27 2005-11-30 삼성전자주식회사 강유전체 메모리 소자의 제조 방법
CN100355074C (zh) * 2003-04-03 2007-12-12 富士通株式会社 半导体装置的制造方法
JP3961994B2 (ja) * 2003-07-28 2007-08-22 株式会社東芝 半導体記憶装置
KR101001741B1 (ko) * 2003-08-18 2010-12-15 삼성전자주식회사 반도체 장치의 커패시터 및 그 제조 방법과 커패시터를구비하는 메모리 장치
DE10344018B4 (de) * 2003-09-15 2016-12-22 Mahle International Gmbh Kühlsystem eingerichtet für einen Verbrennungsmotor mit einem Heißwasserspeicher
JP4308691B2 (ja) * 2004-03-19 2009-08-05 富士通マイクロエレクトロニクス株式会社 半導体基板および半導体基板の製造方法
JP4713286B2 (ja) * 2004-12-03 2011-06-29 富士通セミコンダクター株式会社 半導体装置及びその製造方法
US7220600B2 (en) * 2004-12-17 2007-05-22 Texas Instruments Incorporated Ferroelectric capacitor stack etch cleaning methods
JP2006261443A (ja) * 2005-03-17 2006-09-28 Fujitsu Ltd 半導体装置及びその製造方法
JP4422644B2 (ja) 2005-03-30 2010-02-24 富士通マイクロエレクトロニクス株式会社 半導体装置の製造方法
JP4756915B2 (ja) * 2005-05-31 2011-08-24 Ｏｋｉセミコンダクタ株式会社 強誘電体メモリ装置及びその製造方法
US8405216B2 (en) * 2005-06-29 2013-03-26 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structure for integrated circuits
JP5251129B2 (ja) * 2005-12-28 2013-07-31 富士通セミコンダクター株式会社 半導体装置及びその製造方法
KR100814602B1 (ko) * 2006-05-03 2008-03-17 후지쯔 가부시끼가이샤 반도체 장치, 반도체 장치의 제조 방법
KR100822806B1 (ko) * 2006-10-20 2008-04-18 삼성전자주식회사 비휘발성 메모리 장치 및 그 형성 방법
US20080185687A1 (en) * 2007-02-07 2008-08-07 Industry-University Cooperation Foundation Hanyang University Memory device and method for fabricating the same
JP2008270277A (ja) * 2007-04-16 2008-11-06 Nec Electronics Corp 位置ずれ検出パターン、位置ずれ検出方法および半導体装置
US7847374B1 (en) * 2007-07-06 2010-12-07 Chih-Hsin Wang Non-volatile memory cell array and logic
US20090065842A1 (en) * 2007-09-06 2009-03-12 Matthew Buynoski Ta-lined tungsten plugs for transistor-local hydrogen gathering
US7829923B2 (en) * 2008-10-23 2010-11-09 Qualcomm Incorporated Magnetic tunnel junction and method of fabrication
JP5487625B2 (ja) * 2009-01-22 2014-05-07 ソニー株式会社 半導体装置
US8191217B2 (en) * 2009-08-05 2012-06-05 International Business Machines Corporation Complimentary metal-insulator-metal (MIM) capacitors and method of manufacture
US8450168B2 (en) 2010-06-25 2013-05-28 International Business Machines Corporation Ferro-electric capacitor modules, methods of manufacture and design structures
FR2993705B1 (fr) * 2012-07-20 2015-05-29 Thales Sa Dispositif comportant une pluralite de couches minces
JP2014220376A (ja) * 2013-05-08 2014-11-20 ソニー株式会社 半導体装置およびその製造方法
DE112016007550T5 (de) * 2016-12-27 2019-09-26 Intel Corporation Amorphe oxid-halbleiter-speicherbauelemente
CN111052379B (zh) * 2017-09-29 2025-07-18 英特尔公司 带有后端晶体管的铁电电容器
US10748931B2 (en) * 2018-05-08 2020-08-18 Micron Technology, Inc. Integrated assemblies having ferroelectric transistors with body regions coupled to carrier reservoirs
US11476261B2 (en) 2019-02-27 2022-10-18 Kepler Computing Inc. High-density low voltage non-volatile memory with unidirectional plate-line and bit-line and pillar capacitor
US10847201B2 (en) 2019-02-27 2020-11-24 Kepler Computing Inc. High-density low voltage non-volatile differential memory bit-cell with shared plate line
TWI722546B (zh) 2019-08-22 2021-03-21 華邦電子股份有限公司 半導體元件及其製造方法
CN112490357A (zh) * 2019-09-11 2021-03-12 华邦电子股份有限公司 半导体组件及其制造方法
US11527277B1 (en) 2021-06-04 2022-12-13 Kepler Computing Inc. High-density low voltage ferroelectric memory bit-cell
US11832451B1 (en) 2021-08-06 2023-11-28 Kepler Computing Inc. High density ferroelectric random access memory (FeRAM) devices and methods of fabrication
US11942133B2 (en) 2021-09-02 2024-03-26 Kepler Computing Inc. Pedestal-based pocket integration process for embedded memory
US12069866B2 (en) 2021-09-02 2024-08-20 Kepler Computing Inc. Pocket integration process for embedded memory
US12463142B1 (en) 2021-10-01 2025-11-04 Kepler Computing Inc. Integrating embedded memory with logic interconnects
US11961877B1 (en) 2021-12-14 2024-04-16 Kepler Computing Inc. Dual hydrogen barrier layer for trench capacitors integrated with low density film for logic structures
US11869928B2 (en) 2021-12-14 2024-01-09 Kepler Computing Inc. Dual hydrogen barrier layer for memory devices
US12108609B1 (en) 2022-03-07 2024-10-01 Kepler Computing Inc. Memory bit-cell with stacked and folded planar capacitors
US20230395134A1 (en) 2022-06-03 2023-12-07 Kepler Computing Inc. Write disturb mitigation for non-linear polar material based multi-capacitor bit-cell
US12347476B1 (en) 2022-12-27 2025-07-01 Kepler Computing Inc. Apparatus and method to improve sensing noise margin in a non-linear polar material based bit-cell
US12334127B2 (en) 2023-01-30 2025-06-17 Kepler Computing Inc. Non-linear polar material based multi-capacitor high density bit-cell

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997019468A1 (en) * 1995-11-20 1997-05-29 Hitachi, Ltd. Semiconductor storage device and process for manufacturing the same
JPH11274406A (ja) * 1997-12-30 1999-10-08 Hyundai Electronics Ind Co Ltd 強誘電体キャパシタの形成方法
JP2000049301A (ja) * 1998-07-29 2000-02-18 Hitachi Ltd 半導体記憶装置
JP2000100938A (ja) * 1998-09-16 2000-04-07 Samsung Electronics Co Ltd 半導体装置の多層配線構造
JP2001210798A (ja) * 1999-12-22 2001-08-03 Texas Instr Inc <Ti> コンデンサ構造の保護のための絶縁性と導電性の障壁の使用
JP2003510839A (ja) * 1999-09-28 2003-03-18 シメトリックス・コーポレーション バリア層を有する集積回路およびその製造方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5046043A (en) 1987-10-08 1991-09-03 National Semiconductor Corporation Ferroelectric capacitor and memory cell including barrier and isolation layers
JP3322031B2 (ja) * 1994-10-11 2002-09-09 三菱電機株式会社 半導体装置
US5990507A (en) * 1996-07-09 1999-11-23 Kabushiki Kaisha Toshiba Semiconductor device having ferroelectric capacitor structures
JP3343055B2 (ja) * 1996-07-09 2002-11-11 株式会社東芝 半導体装置の製造方法および半導体装置
US6051858A (en) 1996-07-26 2000-04-18 Symetrix Corporation Ferroelectric/high dielectric constant integrated circuit and method of fabricating same
US5807774A (en) 1996-12-06 1998-09-15 Sharp Kabushiki Kaisha Simple method of fabricating ferroelectric capacitors
US5773314A (en) 1997-04-25 1998-06-30 Motorola, Inc. Plug protection process for use in the manufacture of embedded dynamic random access memory (DRAM) cells
US5902131A (en) 1997-05-09 1999-05-11 Ramtron International Corporation Dual-level metalization method for integrated circuit ferroelectric devices
US6586790B2 (en) * 1998-07-24 2003-07-01 Kabushiki Kaisha Toshiba Semiconductor device and method for manufacturing the same
JP3931445B2 (ja) * 1998-09-10 2007-06-13 株式会社日立製作所 半導体装置の製造方法
US6174735B1 (en) 1998-10-23 2001-01-16 Ramtron International Corporation Method of manufacturing ferroelectric memory device useful for preventing hydrogen line degradation
KR20000053391A (ko) * 1999-01-12 2000-08-25 루센트 테크놀러지스 인크 다이나믹 램 셀을 포함하는 집적 회로 및 집적 회로 형성방법
US6140672A (en) 1999-03-05 2000-10-31 Symetrix Corporation Ferroelectric field effect transistor having a gate electrode being electrically connected to the bottom electrode of a ferroelectric capacitor

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997019468A1 (en) * 1995-11-20 1997-05-29 Hitachi, Ltd. Semiconductor storage device and process for manufacturing the same
JPH11274406A (ja) * 1997-12-30 1999-10-08 Hyundai Electronics Ind Co Ltd 強誘電体キャパシタの形成方法
JP2000049301A (ja) * 1998-07-29 2000-02-18 Hitachi Ltd 半導体記憶装置
JP2000100938A (ja) * 1998-09-16 2000-04-07 Samsung Electronics Co Ltd 半導体装置の多層配線構造
JP2003510839A (ja) * 1999-09-28 2003-03-18 シメトリックス・コーポレーション バリア層を有する集積回路およびその製造方法
JP2001210798A (ja) * 1999-12-22 2001-08-03 Texas Instr Inc <Ti> コンデンサ構造の保護のための絶縁性と導電性の障壁の使用

Cited By (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004349474A (ja) * 2003-05-22 2004-12-09 Toshiba Corp 半導体装置とその製造方法
JP2007524980A (ja) * 2003-12-16 2007-08-30 インターナショナル・ビジネス・マシーンズ・コーポレーション 減少されたコンタクト高さでのバイポーラ及びｃｍｏｓの集積回路構造体
JPWO2005067051A1 (ja) * 2003-12-26 2007-07-26 富士通株式会社 半導体装置、半導体装置の製造方法
WO2005101508A1 (ja) * 2004-04-02 2005-10-27 Fujitsu Limited 半導体装置及びその製造方法
US7244979B2 (en) 2004-12-28 2007-07-17 Seiko Epson Corporation Semiconductor memory device and method for manufacturing the same
JP2006245457A (ja) * 2005-03-07 2006-09-14 Oki Electric Ind Co Ltd 半導体装置及びその製造方法
JP2007096178A (ja) * 2005-09-30 2007-04-12 Toshiba Corp 半導体装置およびその製造方法
US8247323B2 (en) 2005-10-07 2012-08-21 Fujitsu Semiconductor Limited Semiconductor device
JP2007227752A (ja) * 2006-02-24 2007-09-06 Seiko Epson Corp キャパシタおよびその製造方法
JP2007242928A (ja) * 2006-03-09 2007-09-20 Seiko Epson Corp 強誘電体メモリ装置の製造方法及び強誘電体メモリ装置
JP2007242929A (ja) * 2006-03-09 2007-09-20 Seiko Epson Corp 強誘電体メモリ装置の製造方法
US9305996B2 (en) 2007-02-21 2016-04-05 Fujitsu Semiconductor Limited Semiconductor device
WO2008114413A1 (ja) * 2007-03-20 2008-09-25 Fujitsu Microelectronics Limited 半導体装置の製造方法
KR101110802B1 (ko) 2007-03-20 2012-02-24 후지쯔 세미컨덕터 가부시키가이샤 반도체장치의 제조방법
JP5040993B2 (ja) * 2007-03-20 2012-10-03 富士通セミコンダクター株式会社 半導体装置の製造方法
US8628981B2 (en) 2007-03-20 2014-01-14 Fujitsu Semiconductor Limited Method of manufacturing a ferroelectric-capacitor memory device including recovery annealing
JP2008277514A (ja) * 2007-04-27 2008-11-13 Toshiba Corp 半導体装置
US8362533B2 (en) 2007-04-27 2013-01-29 Kabushiki Kaisha Toshiba Semiconductor device including a transistor and a ferroelectric capacitor
JP2008300376A (ja) * 2007-05-29 2008-12-11 Toshiba Corp 半導体装置
JP2009010380A (ja) * 2007-06-26 2009-01-15 Dongbu Hitek Co Ltd 金属絶縁体金属キャパシタの製造方法
JP5667875B2 (ja) * 2008-09-16 2015-02-12 ローム株式会社 半導体記憶装置および半導体記憶装置の製造方法
US8981440B2 (en) 2008-09-16 2015-03-17 Rohm Co., Ltd. Semiconductor storage device and method for manufacturing the semiconductor storage device
US9362295B2 (en) 2008-09-16 2016-06-07 Rohm Co., Ltd. Semiconductor storage device and method for manufacturing the semiconductor storage device
US9607998B2 (en) 2008-09-16 2017-03-28 Rohm Co., Ltd. Semiconductor storage device and method for manufacturing the semiconductor storage device
US9847338B2 (en) 2008-09-16 2017-12-19 Rohm Co., Ltd. Semiconductor storage device and method for manufacturing the semiconductor storage device
JP2011044660A (ja) * 2009-08-24 2011-03-03 Renesas Electronics Corp 半導体装置及び半導体装置の製造方法
JP2012216859A (ja) * 2012-06-18 2012-11-08 Fujitsu Semiconductor Ltd 半導体装置及びその製造方法
JP2021087007A (ja) * 2019-11-26 2021-06-03 インテル・コーポレーション 集積回路のメタライゼーションスタックの配線工程における選択的な相互接続
JP7707504B2 (ja) 2019-11-26 2025-07-15 インテル・コーポレーション 集積回路のメタライゼーションスタックの配線工程における選択的な相互接続
US12424543B2 (en) 2019-11-26 2025-09-23 Intel Corporation Selective interconnects in back-end-of-line metallization stacks of integrated circuitry

Also Published As

Publication number Publication date
DE10228765A1 (de) 2003-03-06
KR20030014607A (ko) 2003-02-19
KR100901950B1 (ko) 2009-06-10
US6734477B2 (en) 2004-05-11
US20030030084A1 (en) 2003-02-13

Similar Documents

Publication Publication Date Title
US6734477B2 (en) Fabricating an embedded ferroelectric memory cell
US6548343B1 (en) Method of fabricating a ferroelectric memory cell
US6635528B2 (en) Method of planarizing a conductive plug situated under a ferroelectric capacitor
US6534809B2 (en) Hardmask designs for dry etching FeRAM capacitor stacks
US6492222B1 (en) Method of dry etching PZT capacitor stack to form high-density ferroelectric memory devices
US6576546B2 (en) Method of enhancing adhesion of a conductive barrier layer to an underlying conductive plug and contact for ferroelectric applications
US6485988B2 (en) Hydrogen-free contact etch for ferroelectric capacitor formation
US6635498B2 (en) Method of patterning a FeRAM capacitor with a sidewall during bottom electrode etch
JP4838811B2 (ja) 強誘電性キャパシタ積層エッチ・クリーニング
US7884406B2 (en) Semiconductor device including ferroelectric capacitor
US6635497B2 (en) Methods of preventing reduction of IrOx during PZT formation by metalorganic chemical vapor deposition or other processing
JP2003318371A (ja) 強誘電体メモリセルに関連するキャパシタスタックのエッチング方法
US11856788B2 (en) Semiconductor device and method of fabricating the same
JP2001210798A (ja) コンデンサ構造の保護のための絶縁性と導電性の障壁の使用
US20030119273A1 (en) Methods of preventing reduction of irox during pzt formation by metalorganic chemical vapor deposition or other processing
US6686236B2 (en) Methods of preventing reduction of IrOx during PZT formation by metalorganic chemical vapor deposition or other processing
US6528328B1 (en) Methods of preventing reduction of irox during PZT formation by metalorganic chemical vapor deposition or other processing
CN101253620A (zh) 半导体器件及其制造方法
US7153706B2 (en) Ferroelectric capacitor having a substantially planar dielectric layer and a method of manufacture therefor
JP5245383B2 (ja) 半導体装置の製造方法
JP5018772B2 (ja) 半導体装置の製造方法
WO2005081317A1 (ja) 半導体装置の製造方法
KR100727494B1 (ko) 캐패시터 오버 플러그 구조
JP4869808B2 (ja) 半導体装置の製造方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20050808

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20050808

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20080104

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20090421

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20090721

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20090724

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20090820

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20090825

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20090918

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20090928

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20091021

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20100604