JP2001144170A - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法Info
- Publication number
- JP2001144170A JP2001144170A JP32132999A JP32132999A JP2001144170A JP 2001144170 A JP2001144170 A JP 2001144170A JP 32132999 A JP32132999 A JP 32132999A JP 32132999 A JP32132999 A JP 32132999A JP 2001144170 A JP2001144170 A JP 2001144170A
- Authority
- JP
- Japan
- Prior art keywords
- film
- trench
- forming
- semiconductor
- semiconductor film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
- H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
- H10W10/0145—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations of trenches having shapes other than rectangular or V-shape
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations
Landscapes
- Element Separation (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP32132999A JP2001144170A (ja) | 1999-11-11 | 1999-11-11 | 半導体装置およびその製造方法 |
| US09/549,378 US6333232B1 (en) | 1999-11-11 | 2000-04-13 | Semiconductor device and method of manufacturing the same |
| TW089121565A TW497203B (en) | 1999-11-11 | 2000-10-16 | Semiconductor device and method of manufacturing the same |
| DE10051600A DE10051600C2 (de) | 1999-11-11 | 2000-10-18 | Verfahren zur Herstellung einer Halbleitervorrichtung mit Grabenisolationsbereichen und Halbleitervorrichtung mit einer Elementisolationsstruktur |
| KR10-2000-0061878A KR100376237B1 (ko) | 1999-11-11 | 2000-10-20 | 반도체 장치 및 그 제조 방법 |
| US09/978,659 US6495424B2 (en) | 1999-11-11 | 2001-10-18 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP32132999A JP2001144170A (ja) | 1999-11-11 | 1999-11-11 | 半導体装置およびその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001144170A true JP2001144170A (ja) | 2001-05-25 |
| JP2001144170A5 JP2001144170A5 (https=) | 2006-12-21 |
Family
ID=18131386
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP32132999A Pending JP2001144170A (ja) | 1999-11-11 | 1999-11-11 | 半導体装置およびその製造方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US6333232B1 (https=) |
| JP (1) | JP2001144170A (https=) |
| KR (1) | KR100376237B1 (https=) |
| DE (1) | DE10051600C2 (https=) |
| TW (1) | TW497203B (https=) |
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20020096137A (ko) * | 2001-06-18 | 2002-12-31 | 주식회사 하이닉스반도체 | 반도체 소자의 격리막 제조방법 |
| KR20030043601A (ko) * | 2001-11-28 | 2003-06-02 | 미쓰비시덴키 가부시키가이샤 | 반도체 장치의 제조 방법 |
| KR100408862B1 (ko) * | 2001-06-29 | 2003-12-06 | 주식회사 하이닉스반도체 | 반도체 소자의 소자 분리막 형성 방법 |
| KR100421046B1 (ko) * | 2001-07-13 | 2004-03-04 | 삼성전자주식회사 | 반도체 장치 및 그 제조방법 |
| US6894363B2 (en) * | 2001-10-09 | 2005-05-17 | Elpida Memory, Inc. | Semiconductor device using shallow trench isolation and method of fabricating the same |
| JP2005303044A (ja) * | 2004-04-13 | 2005-10-27 | Elpida Memory Inc | 半導体装置の製造方法 |
| US7279769B2 (en) | 2004-05-25 | 2007-10-09 | Renesas Technology Corp. | Semiconductor device and manufacturing method thereof |
| JP2007288137A (ja) * | 2006-03-24 | 2007-11-01 | Elpida Memory Inc | 半導体装置及びその製造方法 |
| JP2008124211A (ja) * | 2006-11-10 | 2008-05-29 | Fujitsu Ltd | 半導体装置の製造方法 |
| KR100865853B1 (ko) * | 2006-06-29 | 2008-10-29 | 주식회사 하이닉스반도체 | 소자 분리막을 포함하는 반도체 소자 및 그것의 형성 방법 |
| US7732277B2 (en) | 2006-09-26 | 2010-06-08 | Kabushiki Kaisha Toshiba | Semiconductor device and method of fabricating the same |
| JP2011086840A (ja) * | 2009-10-16 | 2011-04-28 | Canon Inc | 半導体素子及び半導体素子の形成方法 |
| JP2018133585A (ja) * | 2018-04-26 | 2018-08-23 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
| US10651094B2 (en) | 2014-11-13 | 2020-05-12 | Renesas Electronics Corporation | Semiconductor device and method of manufacturing same |
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| US6555449B1 (en) | 1996-05-28 | 2003-04-29 | Trustees Of Columbia University In The City Of New York | Methods for producing uniform large-grained and grain boundary location manipulated polycrystalline thin film semiconductors using sequential lateral solidfication |
| US20020064928A1 (en) * | 1999-12-22 | 2002-05-30 | Houston Theodore W. | Method for manufacturing a high-frequency integrated circuit for reducing cross-talk and facilitating energy storage |
| US6830993B1 (en) * | 2000-03-21 | 2004-12-14 | The Trustees Of Columbia University In The City Of New York | Surface planarization of thin silicon films during and after processing by the sequential lateral solidification method |
| JP3629187B2 (ja) * | 2000-06-28 | 2005-03-16 | 株式会社東芝 | 電気フューズ、この電気フューズを備えた半導体装置及びその製造方法 |
| KR100390143B1 (ko) * | 2000-08-17 | 2003-07-04 | 삼성전자주식회사 | 소이층 밴딩 방지 방법 및 그 방법에 의해 형성되는반도체 장치 |
| KR100854834B1 (ko) | 2000-10-10 | 2008-08-27 | 더 트러스티스 오브 컬럼비아 유니버시티 인 더 시티 오브 뉴욕 | 얇은 금속층을 가공하는 방법 및 장치 |
| CN1200320C (zh) * | 2000-11-27 | 2005-05-04 | 纽约市哥伦比亚大学托管会 | 用激光结晶化法加工衬底上半导体薄膜区域的方法和掩模投影系统 |
| US6582827B1 (en) * | 2000-11-27 | 2003-06-24 | The Trustees Of Columbia University In The City Of New York | Specialized substrates for use in sequential lateral solidification processing |
| KR20020042251A (ko) * | 2000-11-30 | 2002-06-05 | 박종섭 | 반도체 소자의 분리구조 제조방법 |
| US6882571B1 (en) | 2000-12-19 | 2005-04-19 | Xilinx, Inc. | Low voltage non-volatile memory cell |
| US6496416B1 (en) * | 2000-12-19 | 2002-12-17 | Xilinx, Inc. | Low voltage non-volatile memory cell |
| JP2002203894A (ja) * | 2001-01-04 | 2002-07-19 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
| US7060573B2 (en) * | 2001-01-16 | 2006-06-13 | Chartered Semiconductor Manufacturing Ltd. | Extended poly buffer STI scheme |
| US6583488B1 (en) * | 2001-03-26 | 2003-06-24 | Advanced Micro Devices, Inc. | Low density, tensile stress reducing material for STI trench fill |
| US6498383B2 (en) * | 2001-05-23 | 2002-12-24 | International Business Machines Corporation | Oxynitride shallow trench isolation and method of formation |
| JP2003017595A (ja) * | 2001-06-29 | 2003-01-17 | Toshiba Corp | 半導体装置 |
| US6599813B2 (en) * | 2001-06-29 | 2003-07-29 | International Business Machines Corporation | Method of forming shallow trench isolation for thin silicon-on-insulator substrates |
| KR100387531B1 (ko) * | 2001-07-30 | 2003-06-18 | 삼성전자주식회사 | 반도체소자 제조방법 |
| US6667224B1 (en) | 2001-08-13 | 2003-12-23 | Cypress Semiconductor Corp. | Method to eliminate inverse narrow width effect in small geometry MOS transistors |
| US7160763B2 (en) * | 2001-08-27 | 2007-01-09 | The Trustees Of Columbia University In The City Of New York | Polycrystalline TFT uniformity through microstructure mis-alignment |
| KR100428768B1 (ko) * | 2001-08-29 | 2004-04-30 | 삼성전자주식회사 | 트렌치 소자 분리형 반도체 장치 및 그 형성 방법 |
| KR100421911B1 (ko) * | 2001-09-20 | 2004-03-11 | 주식회사 하이닉스반도체 | 반도체 소자의 격리 영역 형성 방법 |
| JP2003100869A (ja) * | 2001-09-27 | 2003-04-04 | Toshiba Corp | 半導体装置とその製造方法 |
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| WO2003084688A2 (en) * | 2002-04-01 | 2003-10-16 | The Trustees Of Columbia University In The City Of New York | Method and system for providing a thin film |
| JP2003309192A (ja) * | 2002-04-17 | 2003-10-31 | Fujitsu Ltd | 不揮発性半導体メモリおよびその製造方法 |
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| AU2003265498A1 (en) * | 2002-08-19 | 2004-03-03 | The Trustees Of Columbia University In The City Of New York | Process and system for laser crystallization processing of film regions on a substrate to provide substantial uniformity within areas in such regions and edge areas thereof, and a structure of such film regions |
| AU2003272222A1 (en) | 2002-08-19 | 2004-03-03 | The Trustees Of Columbia University In The City Of New York | Process and system for laser crystallization processing of film regions on a substrate to minimize edge areas, and structure of such film regions |
| WO2004017379A2 (en) * | 2002-08-19 | 2004-02-26 | The Trustees Of Columbia University In The City Of New York | Process and system for processing a thin film sample and thin film structure |
| TWI331803B (en) | 2002-08-19 | 2010-10-11 | Univ Columbia | A single-shot semiconductor processing system and method having various irradiation patterns |
| US6884638B1 (en) * | 2002-08-20 | 2005-04-26 | Advanced Micro Devices, Inc. | Method of fabricating a flash memory semiconductor device by determining the active region width between shallow trench isolation structures using an overdrive current measurement technique and a device thereby fabricated |
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| US10651094B2 (en) | 2014-11-13 | 2020-05-12 | Renesas Electronics Corporation | Semiconductor device and method of manufacturing same |
| JP2018133585A (ja) * | 2018-04-26 | 2018-08-23 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| DE10051600A1 (de) | 2001-05-23 |
| US20020022326A1 (en) | 2002-02-21 |
| KR100376237B1 (ko) | 2003-03-15 |
| US6333232B1 (en) | 2001-12-25 |
| KR20010051166A (ko) | 2001-06-25 |
| TW497203B (en) | 2002-08-01 |
| DE10051600C2 (de) | 2003-05-08 |
| US6495424B2 (en) | 2002-12-17 |
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