FR2844394B1 - Substrat en silicium monocristallin, substrat de type soi, dispositif a semi-conducteur, dispositif d'affichage, et procede de fabrication d'un dispositif a semi-conducteur - Google Patents

Substrat en silicium monocristallin, substrat de type soi, dispositif a semi-conducteur, dispositif d'affichage, et procede de fabrication d'un dispositif a semi-conducteur

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Publication number
FR2844394B1
FR2844394B1 FR0311250A FR0311250A FR2844394B1 FR 2844394 B1 FR2844394 B1 FR 2844394B1 FR 0311250 A FR0311250 A FR 0311250A FR 0311250 A FR0311250 A FR 0311250A FR 2844394 B1 FR2844394 B1 FR 2844394B1
Authority
FR
France
Prior art keywords
semiconductor device
soi
monocrystalline silicon
silicon substrate
display device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0311250A
Other languages
English (en)
Other versions
FR2844394A1 (fr
Inventor
Yutaka Takafuji
Takashi Itoga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2002299577A external-priority patent/JP2004134675A/ja
Priority claimed from JP2003067109A external-priority patent/JP4837240B2/ja
Application filed by Sharp Corp filed Critical Sharp Corp
Publication of FR2844394A1 publication Critical patent/FR2844394A1/fr
Application granted granted Critical
Publication of FR2844394B1 publication Critical patent/FR2844394B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • HELECTRICITY
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    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
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    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651Silicon transistors
    • H01L29/78654Monocrystalline silicon transistors
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    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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    • H01L21/26506Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
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    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
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    • H01L27/1259Multistep manufacturing methods
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    • H01L27/1266Multistep manufacturing methods with a particular formation, treatment or coating of the substrate the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
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    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
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  • Thin Film Transistor (AREA)
FR0311250A 2002-09-25 2003-09-25 Substrat en silicium monocristallin, substrat de type soi, dispositif a semi-conducteur, dispositif d'affichage, et procede de fabrication d'un dispositif a semi-conducteur Expired - Fee Related FR2844394B1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2002280078 2002-09-25
JP2002299577A JP2004134675A (ja) 2002-10-11 2002-10-11 Soi基板、表示装置およびsoi基板の製造方法
JP2003067109A JP4837240B2 (ja) 2002-09-25 2003-03-12 半導体装置

Publications (2)

Publication Number Publication Date
FR2844394A1 FR2844394A1 (fr) 2004-03-12
FR2844394B1 true FR2844394B1 (fr) 2007-06-08

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FR0311250A Expired - Fee Related FR2844394B1 (fr) 2002-09-25 2003-09-25 Substrat en silicium monocristallin, substrat de type soi, dispositif a semi-conducteur, dispositif d'affichage, et procede de fabrication d'un dispositif a semi-conducteur

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US (3) US7508034B2 (fr)
KR (2) KR100693881B1 (fr)
CN (2) CN101694847A (fr)
FR (1) FR2844394B1 (fr)
TW (1) TWI260746B (fr)

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