EP1264344A1 - Composant electronique dote d'une connexion electro-conductrice en nanotubes de carbone et procede de fabrication dudit composant - Google Patents

Composant electronique dote d'une connexion electro-conductrice en nanotubes de carbone et procede de fabrication dudit composant

Info

Publication number
EP1264344A1
EP1264344A1 EP01909557A EP01909557A EP1264344A1 EP 1264344 A1 EP1264344 A1 EP 1264344A1 EP 01909557 A EP01909557 A EP 01909557A EP 01909557 A EP01909557 A EP 01909557A EP 1264344 A1 EP1264344 A1 EP 1264344A1
Authority
EP
European Patent Office
Prior art keywords
conductive layer
electronic component
hole
layer
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP01909557A
Other languages
German (de)
English (en)
Inventor
Manfred Engelhardt
Wolfgang HÖNLEIN
Franz Kreupl
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of EP1264344A1 publication Critical patent/EP1264344A1/fr
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H01L21/76876—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for deposition from the gas phase, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226—Via connections in a multilevel interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53276—Conductive materials containing carbon, e.g. fullerenes
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00—Manufacture or treatment of nanostructures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/10—Applying interconnections to be used for carrying current between separate components within a device
    • H01L2221/1068—Formation and after-treatment of conductors
    • H01L2221/1094—Conducting structures comprising nanotubes or nanowires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4076—Through-connections; Vertical interconnect access [VIA] connections by thin-film techniques

Definitions

  • the invention relates to an electronic component, a method for producing a conductive connection in an electronic component and a method for producing an electronic component.
  • a disadvantage of this procedure is that especially with decreasing lateral dimensions, i.e. with a decreasing diameter of a contact hole due to the non-conductive layer and with increasing vertical expansion or at least with an increasing aspect ratio, the complete filling of the contact hole with metal is problematic and prone to errors.
  • the deposited metal frequently clogs the upper region of the contact hole, thereby preventing the entire contact hole from being filled with metal. It is therefore often not possible to produce an electrically conductive connection between the two conductive layers.
  • an incompletely filled contact hole leads to reliability problems.
  • Another disadvantage of the known procedure is that in the case of a contact hole with a very low aspect ratio, the conductivity of the metallic through-contact Clocking decreases sharply, that is, the metallic through-contact represents a considerably limiting element for the scaling of a metallization system and thus an integrated circuit, which requires that several conductive layers are interconnected in the vertical direction of an electronic component by means of non-conductive layers to be electrically connected therethrough.
  • a method is known from [2] for growing carbon nanotubes in a self-aligned manner in a perforated dialuminium trioxide matrix (Al2O 3 matrix).
  • the invention is therefore based on the problem of creating a conductive connection in an electronic component and an electronic component with a conductive connection between two conductive layers which are insulated from one another by a non-conductive layer, in which the creation of a conductive connection itself Holes with a very large aspect ratio becomes possible.
  • An electronic component has a first conductive layer, a non-conductive layer on the first conductive layer and a second conductive layer on the non-conductive layer. At least one hole is provided in the non-conductive layer which completely passes through the non-conductive layer. There is at least in the hole contain a nanotube through which the first conductive layer is conductively connected to the second conductive layer.
  • a non-conductive layer is deposited over a first conductive layer.
  • a hole is made through the non-conductive layer and at least one nanotube is grown in the hole.
  • a second conductive layer is then deposited such that the first conductive layer is conductively connected to the second conductive layer through the nanotubes.
  • a first conductive layer is provided in a first step.
  • a non-conductive layer is deposited over the first conductive layer and a hole is made, for example etched, through the non-conductive layer.
  • a nano-tubes is grown up and at least there is deposited a second conducting layer such that the first conductive layer is conductively connected through 'the nanotubes with the second conductive layer.
  • the invention makes it possible to create a reliable electrically conductive connection between two conductive layers, even with contact holes with a very small diameter and large aspect ratio, which are electrically decoupled by a non-conductive layer.
  • the conductive layers can be, for example, any metallically conductive material, such as copper, aluminum, silver, etc., the conductive layers usually being an adhesive, diffusion and anti-reflection layer, for example comprising Ti, TiN, Ta, TaN, and / or a combination of these materials.
  • the electrically non-conductive layer can be an intermetallic dielectric such as silicon oxide or silicon nitride or another insulating layer made of organic material such as wise polyimide or any combination thereof.
  • the electrically conductive connection by means of at least one nanotube is only limited by the diameter of such a nanotube, which in a so-called carbon nanotube is approximately 1.5 nm in diameter.
  • the manufacturing process is characterized by its simplicity and robustness, i.e. low susceptibility to errors and the fact that an electrically conductive connection is reliably established.
  • the nanotube is a carbon nanotube.
  • Such a carbon nanotube can be produced very easily and reliably, even in a contact hole with a small diameter, in a self-adjusted manner.
  • the carbon nanotube has a very high conductivity, which significantly exceeds the conductivity of even the best metallic conductors, such as copper or silver, with the same dimensions.
  • Such a contact hole can contain a plurality of nanotubes, in principle any number of nanotubes, in order to connect the two conductive layers to one another in an electrically conductive manner.
  • Mung layer which preferably has catalytically active metal particles for a growing nanotube, for example with metal particles made of nickel and / or iron, and / or yttrium, and / or cobalt and / or platinum.
  • the hole can be etched through the non-conductive layer.
  • the invention is in no way limited to a semiconductor element, but can be used in any electronic component in which it is important to conduct two conductive layers that are electrically decoupled by a non-conductive layer interconnect, regardless of whether a layer is a semiconductor layer or not.
  • the invention is particularly suitable for use in the context of an integrated circuit.
  • Figure 1 shows a cross section through a semiconductor element according to a first embodiment
  • FIGS. 2a to 2d cross sections through a semiconductor element, on the basis of which the individual method steps for producing the semiconductor element shown in FIG. 1 are explained;
  • FIG. 3 shows a cross section through a semiconductor element according to a second exemplary embodiment of the invention
  • FIG. 4a to 4c cross sections through a semiconductor element, using which the individual process steps for Production of the semiconductor element shown in FIG. 3 is explained;
  • FIG. 5 shows a cross section through a semiconductor element according to a third exemplary embodiment of the invention.
  • FIGS. 6a to 6e cross sections through a semiconductor element, on the basis of which individual method steps for producing the semiconductor element shown in FIG. 5 are explained.
  • Fig.l shows a first semiconductor element 100 according to a first embodiment.
  • the first semiconductor element 100 has a first conductive layer 101 made of copper or aluminum with an adhesive, diffusion and anti-reflection layer, for example comprising Ti, TiN, Ta, TaN, and / or a combination of these materials.
  • a contact hole 103 is etched into the non-conductive layer 102 and at the bottom of the contact hole, i.e. A nucleation layer 104 is deposited on the first conductive layer 101.
  • the nucleation layer 104 is a layer of catalytically active metal particles, for example of nickel, iron, yttrium, cobalt and / or platinum.
  • the germination layer 104 has a catalytic effect for the growth of a carbon nanotube.
  • Ü he b of the non-conductive layer 102 is a second conductive layer 106 of a sequence of Ti, TiN, Ta, TaN, and / or copper and / or aluminum is deposited such that the
  • Carbon nanotubes 105 are electrically conductively connected to the second conductive layer 106.
  • the non-conductive layer 102 is e.g. by means of a separation process from the gas phase (Chemical Vapor
  • the hole (contact hole) 103 is etched through the non-conductive layer 102 up to the surface of the first conductive layer 101 by means of suitable masking of the non-conductive layer 102 and wet etching or dry etching of the non-conductive layer 102 (cf. FIG. 2b).
  • the germination layer 104 is deposited in the hole 103 by means of a suitable method (see FIG. 2c), for example in accordance with a CVD method.
  • the germination layer 104 has a thickness of 0.1 nm to 50 nm.
  • the germination layer 104 according to the first
  • the exemplary embodiment is formed from nickel metal particles.
  • carbon nanotubes 105 are grown on the nucleation layer 104 in the hole 103 in accordance with the method described in [2] (cf. FIG. 2D).
  • the length of the carbon nanotubes 105 depends on the length of time in which the carbon nanotubes are grown on the nucleation layer 104.
  • the carbon nanotubes 105 are grown until they protrude beyond the upper end of the non-conductive layer 102.
  • the second conductive layer 106 is deposited on the non-conductive layer 102 by means of a CVD process or sputtering process or vapor deposition process.
  • CMP method Mechanical polishing (CMP method) or ion beam etching removes the second conductive layer 106 to a desired thickness.
  • the carbon nanotubes 105 create an electrically conductive connection between the first conductive layer 101 and the second conductive layer 106 via the germination layer 104, which itself also contains conductive metal particles.
  • FIG 3 shows a cross section of a second semiconductor element 300 according to a second exemplary embodiment.
  • the same elements in the figures are identified in the second embodiment with the same reference numerals as the elements in the first embodiment.
  • the second semiconductor element 300 has the fundamentally the same structure as the first semiconductor element 100, with the difference that the nucleation layer 301 according to the second exemplary embodiment not only extends over the bottom of the hole 103, but that the nucleation layer 301 over the entire first conductive layer 101 is provided .
  • the individual layers according to the second embodiment are made of the same materials as the corresponding layers according to the first embodiment.
  • a nucleation layer 301 made of metal particles (nickel, iron, yttrium, and / or cobalt) is deposited on the first conductive layer 101.
  • the nucleation layer 301 is deposited over the entire surface of the first conductive layer 101 by means of a suitable CVD process, sputtering process or vapor deposition process.
  • the germination layer 301 has a thickness of 0.1 nm to 50 nm.
  • the non-conductive layer 102 is e.g. deposited by means of a CVD process (see Fig.4a).
  • the carbon nanotubes 105 are on the
  • Germination layer 301 grew according to the method described in [2].
  • the growth is carried out until the length of the carbon nanotubes 105 is sufficient for them to extend over the O Surface Terminal b of the non-conductive layer 102 extend (see 4c).
  • the second conductive layer 106 is deposited on the non-conductive layer 102 by means of a CVD method.
  • the result is a semiconductor element with an electrically conductive connection using carbon nanotubes between two conductive layers through a contact hole.
  • FIG 5 shows a third semiconductor element 500 according to a third exemplary embodiment.
  • the third semiconductor element 500 differs from the second semiconductor element 300 essentially only in that a trench 501 is etched into the non-conductive layer 102 and the carbon nanotubes 105 thus do not protrude beyond the surface of the non-conductive layer 102, but rather only across the bottom of the trench 501 into the non-conductive layer 102.
  • the individual layers of the third semiconductor element 500 are made of the same materials as the first
  • the method for producing the third semiconductor element 500 is explained in detail with reference to FIGS. 6a to 6e.
  • the first is conductive S chicht 101, the nucleation layer 301 with a thickness of 0, 1 nm to 50 nm deposited by a suitable CVD method, sputtering method or vapor deposition method.
  • the non-conductive layer 102 is deposited on the seeding layer 301 by means of a CVD method.
  • the hole 103 is etched into the non-conductive layer 102 up to the surface of the nucleation layer 301 (cf. FIG. 6b).
  • a trench 501 is etched into the non-conductive layer 102 by means of dry etching or wet etching (cf. FIG. 6c).
  • the carbon nanotubes 102 are grown on the nucleation layer 301 to a length such that the carbon nanotubes 102 protrude beyond the lower surface of the trench 501, but not beyond the entire non-conductive layer 102 (see FIG. .DELTA.D).
  • the second conductive layer 106 is deposited in the trench 501 and on the non-conductive layer 102 by means of a CVD method.
  • the second conductive layer 106 is reduced to a desired thickness by means of a suitable etching method, a chemical mechanical polishing method or by means of ion beam etching, so that the surface of the second conductive layer 106 is flat with the surface of the non-conductive layer 102.
  • a CVD process using carbon monoxide CO, methane CH4, or also acetylene C2H2 or a so-called plasma enhanced can be used as the CVD process CVD process.
  • the carbon nanotubes 105 can be brought to the required length by chemical mechanical polishing or ion beam etching at an oblique angle (so that the ions cannot penetrate significantly into the contact hole during ion beam etching), i.e. to a length such that the carbon nanotubes 105 contact at least the second conductive layer 106.
  • the carbon nanotubes can also be produced using an anisotropic plasma etching process, e.g. used for structuring organic materials, brought to the required length.
  • the invention is not limited to a three-layer structure.
  • the semiconductor element can be used in any semiconductor structure, i.e. it can represent a partial semiconductor element of a very multilayer semiconductor element for contacting two conductive layers in the semiconductor element.
  • the invention can be clearly seen in the fact that two electrically conductive layers, which are electrically decoupled from one another in a semiconductor element by a non-conductive layer, are electrically conductively connected to one another by means of a contact hole by means of carbon nanotubes.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Manufacturing & Machinery (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Composite Materials (AREA)
  • Materials Engineering (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Carbon And Carbon Compounds (AREA)

Abstract

Composant électronique qui comporte une première couche conductrice, une couche non conductrice et une seconde couche conductrice. Un trou traversant la couche non conductrice est obtenu par gravure. Un nanotube, qui est placé dans le trou, relie la première couche conductrice à la seconde couche conductrice.
EP01909557A 2000-02-16 2001-02-02 Composant electronique dote d'une connexion electro-conductrice en nanotubes de carbone et procede de fabrication dudit composant Ceased EP1264344A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10006964 2000-02-16
DE10006964A DE10006964C2 (de) 2000-02-16 2000-02-16 Elektronisches Bauelement mit einer leitenden Verbindung zwischen zwei leitenden Schichten und Verfahren zum Herstellen eines elektronischen Bauelements
PCT/DE2001/000419 WO2001061753A1 (fr) 2000-02-16 2001-02-02 Composant electronique dote d'une connexion electro-conductrice en nanotubes de carbone et procede de fabrication dudit composant

Publications (1)

Publication Number Publication Date
EP1264344A1 true EP1264344A1 (fr) 2002-12-11

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EP01909557A Ceased EP1264344A1 (fr) 2000-02-16 2001-02-02 Composant electronique dote d'une connexion electro-conductrice en nanotubes de carbone et procede de fabrication dudit composant

Country Status (7)

Country Link
US (1) US7321097B2 (fr)
EP (1) EP1264344A1 (fr)
JP (1) JP4549002B2 (fr)
KR (1) KR100494248B1 (fr)
DE (1) DE10006964C2 (fr)
TW (1) TW503482B (fr)
WO (1) WO2001061753A1 (fr)

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US20030179559A1 (en) 2003-09-25
KR100494248B1 (ko) 2005-06-13
US7321097B2 (en) 2008-01-22
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