DE69028665D1 - Nichtflüchtige Halbleiterspeicheranordnung und Verfahren zur Herstellung - Google Patents

Nichtflüchtige Halbleiterspeicheranordnung und Verfahren zur Herstellung

Info

Publication number
DE69028665D1
DE69028665D1 DE69028665T DE69028665T DE69028665D1 DE 69028665 D1 DE69028665 D1 DE 69028665D1 DE 69028665 T DE69028665 T DE 69028665T DE 69028665 T DE69028665 T DE 69028665T DE 69028665 D1 DE69028665 D1 DE 69028665D1
Authority
DE
Germany
Prior art keywords
manufacture
memory device
semiconductor memory
volatile semiconductor
volatile
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69028665T
Other languages
English (en)
Other versions
DE69028665T2 (de
Inventor
Masanori C O Sony Corpora Noda
Akihiro C O Sony Corp Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP1186385A external-priority patent/JPH0350772A/ja
Priority claimed from JP1186299A external-priority patent/JPH0350874A/ja
Priority claimed from JP1197829A external-priority patent/JPH0362575A/ja
Application filed by Sony Corp filed Critical Sony Corp
Publication of DE69028665D1 publication Critical patent/DE69028665D1/de
Application granted granted Critical
Publication of DE69028665T2 publication Critical patent/DE69028665T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
DE69028665T 1989-07-18 1990-07-13 Nichtflüchtige Halbleiterspeicheranordnung und Verfahren zur Herstellung Expired - Fee Related DE69028665T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP1186385A JPH0350772A (ja) 1989-07-18 1989-07-18 不揮発性メモリ装置の製造方法
JP1186299A JPH0350874A (ja) 1989-07-19 1989-07-19 不揮発性メモリ装置
JP1197829A JPH0362575A (ja) 1989-07-29 1989-07-29 不揮発性メモリ

Publications (2)

Publication Number Publication Date
DE69028665D1 true DE69028665D1 (de) 1996-10-31
DE69028665T2 DE69028665T2 (de) 1997-04-17

Family

ID=27325719

Family Applications (3)

Application Number Title Priority Date Filing Date
DE69028665T Expired - Fee Related DE69028665T2 (de) 1989-07-18 1990-07-13 Nichtflüchtige Halbleiterspeicheranordnung und Verfahren zur Herstellung
DE69034027T Expired - Fee Related DE69034027T2 (de) 1989-07-18 1990-07-13 Verfahren zur Herstellung einer nicht flüchtigen Halbleiterspeichervorrichtung
DE69032678T Expired - Fee Related DE69032678T2 (de) 1989-07-18 1990-07-13 Nichtflüchtige Halbleiterspeicheranordnung

Family Applications After (2)

Application Number Title Priority Date Filing Date
DE69034027T Expired - Fee Related DE69034027T2 (de) 1989-07-18 1990-07-13 Verfahren zur Herstellung einer nicht flüchtigen Halbleiterspeichervorrichtung
DE69032678T Expired - Fee Related DE69032678T2 (de) 1989-07-18 1990-07-13 Nichtflüchtige Halbleiterspeicheranordnung

Country Status (3)

Country Link
US (1) US5068697A (de)
EP (4) EP0409107B1 (de)
DE (3) DE69028665T2 (de)

Families Citing this family (50)

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JPH04257270A (ja) * 1991-02-08 1992-09-11 Fujitsu Ltd 半導体記憶装置
JP3116478B2 (ja) * 1991-10-29 2000-12-11 ソニー株式会社 半導体メモリ装置
JPH05243581A (ja) * 1992-02-28 1993-09-21 Mitsubishi Electric Corp 不揮発性メモリ装置
DE69311184T2 (de) * 1992-03-27 1997-09-18 Matsushita Electric Ind Co Ltd Halbleitervorrichtung samt Herstellungsverfahren
JP3259349B2 (ja) * 1992-06-09 2002-02-25 ソニー株式会社 不揮発性半導体装置及びその製造方法
EP0585601B1 (de) 1992-07-31 1999-04-28 Hughes Electronics Corporation Sicherheitssystem für integrierte Schaltung und Verfahren mit implantierten Leitungen
US5561319A (en) * 1993-05-14 1996-10-01 Lsi Logic Corporation Integrated circuit structure including CMOS devices protected by patterned nitride passivation and method for the fabrication thereof
FR2708146A1 (fr) * 1993-07-19 1995-01-27 Sgs Thomson Microelectronics Cellule à grille flottante à durée de stockage accrue.
US5376573A (en) * 1993-12-10 1994-12-27 Advanced Micro Devices, Inc. Method of making a flash EPROM device utilizing a single masking step for etching and implanting source regions within the EPROM core and redundancy areas
KR960005761A (ko) * 1994-07-27 1996-02-23 이데이 노부유끼 반도체장치
US5684739A (en) * 1994-11-30 1997-11-04 Nkk Corporation Apparatus and method for determining current or voltage of a semiconductor device
JPH08213572A (ja) * 1994-11-30 1996-08-20 Nkk Corp 不揮発性半導体装置およびその製造方法
US6005805A (en) * 1994-12-27 1999-12-21 Nkk Corporation Nonvolatile semiconductor device with a verify function
US5801076A (en) * 1995-02-21 1998-09-01 Advanced Micro Devices, Inc. Method of making non-volatile memory device having a floating gate with enhanced charge retention
US5604157A (en) * 1995-05-25 1997-02-18 Industrial Technology Research Institute Reduced notching of polycide gates using silicon anti reflection layer
US5783846A (en) * 1995-09-22 1998-07-21 Hughes Electronics Corporation Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering
US5707898A (en) * 1996-04-01 1998-01-13 Micron Technology, Inc. Method of forming a programmable non-volatile memory cell by providing a shielding layer over the gate sidewalls
US5828599A (en) * 1996-08-06 1998-10-27 Simtek Corporation Memory with electrically erasable and programmable redundancy
JP2977023B2 (ja) * 1996-09-30 1999-11-10 日本電気株式会社 不揮発性半導体記憶装置及びその製造方法
US5973375A (en) * 1997-06-06 1999-10-26 Hughes Electronics Corporation Camouflaged circuit structure with step implants
DE69734278D1 (de) 1997-07-03 2006-02-09 St Microelectronics Srl Herstellungsverfahren eines nichtflüchtigen Halbleiterspeicherbauelementes mit abgeschirmtem Einpolysiliziumgate-Speicherabschnitt
JP4060938B2 (ja) * 1998-05-25 2008-03-12 シャープ株式会社 不揮発性半導体記憶装置
JP3389112B2 (ja) * 1998-09-09 2003-03-24 株式会社東芝 不揮発性半導体記憶装置及びその製造方法
KR20010004985A (ko) * 1999-06-30 2001-01-15 김영환 플래쉬 메모리 소자의 게이트 형성 방법
US7060584B1 (en) 1999-07-12 2006-06-13 Zilog, Inc. Process to improve high performance capacitor properties in integrated MOS technology
US6396368B1 (en) 1999-11-10 2002-05-28 Hrl Laboratories, Llc CMOS-compatible MEM switches and method of making
US6341848B1 (en) 1999-12-13 2002-01-29 Hewlett-Packard Company Fluid-jet printer having printhead with integrated heat-sink
US6969654B1 (en) * 2000-06-19 2005-11-29 Advanced Micro Devices, Inc. Flash NVROM devices with UV charge immunity
US7217977B2 (en) 2004-04-19 2007-05-15 Hrl Laboratories, Llc Covert transformation of transistor properties as a circuit protection method
US6815816B1 (en) 2000-10-25 2004-11-09 Hrl Laboratories, Llc Implanted hidden interconnections in a semiconductor device for preventing reverse engineering
US6791191B2 (en) 2001-01-24 2004-09-14 Hrl Laboratories, Llc Integrated circuits protected against reverse engineering and method for fabricating the same using vias without metal terminations
US7294935B2 (en) * 2001-01-24 2007-11-13 Hrl Laboratories, Llc Integrated circuits protected against reverse engineering and method for fabricating the same using an apparent metal contact line terminating on field oxide
US6774413B2 (en) 2001-06-15 2004-08-10 Hrl Laboratories, Llc Integrated circuit structure with programmable connector/isolator
US6740942B2 (en) * 2001-06-15 2004-05-25 Hrl Laboratories, Llc. Permanently on transistor implemented using a double polysilicon layer CMOS process with buried contact
US20030011018A1 (en) * 2001-07-13 2003-01-16 Hurley Kelly T. Flash floating gate using epitaxial overgrowth
US6897535B2 (en) 2002-05-14 2005-05-24 Hrl Laboratories, Llc Integrated circuit with reverse engineering protection
DE10229542B4 (de) * 2002-07-01 2004-05-19 Infineon Technologies Ag Elektronisches Bauteil mit mehrschichtiger Umverdrahtungsplatte und Verfahren zur Herstellung desselben
US7049667B2 (en) * 2002-09-27 2006-05-23 Hrl Laboratories, Llc Conductive channel pseudo block process and circuit to inhibit reverse engineering
US6979606B2 (en) 2002-11-22 2005-12-27 Hrl Laboratories, Llc Use of silicon block process step to camouflage a false transistor
DE10257870B4 (de) * 2002-12-11 2007-10-04 Infineon Technologies Ag Halbleiterstruktur mit einer integrierten Abschirmung
WO2004055868A2 (en) 2002-12-13 2004-07-01 Hrl Laboratories, Llc Integrated circuit modification using well implants
US7311385B2 (en) * 2003-11-12 2007-12-25 Lexmark International, Inc. Micro-fluid ejecting device having embedded memory device
CN100341139C (zh) * 2003-12-30 2007-10-03 旺宏电子股份有限公司 非挥发性内存元件的制造方法及金属内连线制程
US7242063B1 (en) 2004-06-29 2007-07-10 Hrl Laboratories, Llc Symmetric non-intrusive and covert technique to render a transistor permanently non-operable
DE112004003004T5 (de) * 2004-10-25 2007-10-25 Spansion Llc, Sunnyvale Halbleiterbauelement und Verfahren zu dessen Herstellung
WO2006064394A1 (en) * 2004-12-13 2006-06-22 Koninklijke Philips Electronics N.V. Borderless (etching stop) layer stack for non-volatile memory applications
US8072834B2 (en) 2005-08-25 2011-12-06 Cypress Semiconductor Corporation Line driver circuit and method with standby mode of operation
US8168487B2 (en) 2006-09-28 2012-05-01 Hrl Laboratories, Llc Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer
US7868370B2 (en) * 2008-04-14 2011-01-11 Macronix International Co., Ltd. Single gate nonvolatile memory cell with transistor and capacitor
US10374100B2 (en) * 2017-06-29 2019-08-06 Texas Instruments Incorporated Programmable non-volatile memory with low off current

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3967310A (en) * 1968-10-09 1976-06-29 Hitachi, Ltd. Semiconductor device having controlled surface charges by passivation films formed thereon
US4613956A (en) * 1983-02-23 1986-09-23 Texas Instruments Incorporated Floating gate memory with improved dielectric
US4868629A (en) * 1984-05-15 1989-09-19 Waferscale Integration, Inc. Self-aligned split gate EPROM
US4686000A (en) * 1985-04-02 1987-08-11 Heath Barbara A Self-aligned contact process
US4805138A (en) * 1985-08-23 1989-02-14 Texas Instruments Incorporated An unerasable eprom cell
JPH0738443B2 (ja) * 1985-11-14 1995-04-26 富士通株式会社 半導体装置
JPS62143476A (ja) * 1985-12-18 1987-06-26 Fujitsu Ltd 半導体記憶装置
JPS62219625A (ja) * 1986-03-20 1987-09-26 Seiko Instr & Electronics Ltd 半導体装置の製造方法
US4758869A (en) * 1986-08-29 1988-07-19 Waferscale Integration, Inc. Nonvolatile floating gate transistor structure
EP0280276B1 (de) * 1987-02-27 1993-05-19 Kabushiki Kaisha Toshiba Nichtflüchtige, durch ultraviolette Strahlung löschbare Halbleiterspeicheranordnung und Verfahren zu ihrer Herstellung
EP0281140B1 (de) * 1987-03-04 1993-05-12 Kabushiki Kaisha Toshiba Halbleiterspeicheranordnung und Verfahren zu ihrer Herstellung
KR890003030A (ko) * 1987-07-08 1989-04-12 미다 가쓰시게 플로팅 게이트를 갖는 반도체장치
JPH01119070A (ja) * 1987-10-31 1989-05-11 Toshiba Corp 半導体装置およびその製造方法
JP2906415B2 (ja) * 1988-09-14 1999-06-21 ソニー株式会社 不揮発性メモリ装置及びその製造方法

Also Published As

Publication number Publication date
EP0827197A2 (de) 1998-03-04
EP0642168A1 (de) 1995-03-08
DE69032678D1 (de) 1998-10-29
EP0409107A3 (en) 1992-08-05
EP0409107B1 (de) 1996-09-25
EP0409107A2 (de) 1991-01-23
DE69034027D1 (de) 2003-01-23
EP0712162A2 (de) 1996-05-15
EP0642168B1 (de) 1998-09-23
US5068697A (en) 1991-11-26
EP0827197A3 (de) 1998-03-11
EP0827197B1 (de) 2002-12-11
DE69034027T2 (de) 2003-09-25
DE69032678T2 (de) 1999-05-06
DE69028665T2 (de) 1997-04-17

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee