DE69221379D1 - Halbleiter-Speicherbauteil und Verfahren zur Herstellung desselben - Google Patents
Halbleiter-Speicherbauteil und Verfahren zur Herstellung desselbenInfo
- Publication number
- DE69221379D1 DE69221379D1 DE69221379T DE69221379T DE69221379D1 DE 69221379 D1 DE69221379 D1 DE 69221379D1 DE 69221379 T DE69221379 T DE 69221379T DE 69221379 T DE69221379 T DE 69221379T DE 69221379 D1 DE69221379 D1 DE 69221379D1
- Authority
- DE
- Germany
- Prior art keywords
- manufacturing
- same
- memory device
- semiconductor memory
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
- G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/14—Word line organisation; Word line lay-out
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Memories (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11968191A JP3186084B2 (ja) | 1991-05-24 | 1991-05-24 | 半導体メモリー装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69221379D1 true DE69221379D1 (de) | 1997-09-11 |
DE69221379T2 DE69221379T2 (de) | 1998-01-15 |
Family
ID=14767417
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69221379T Expired - Lifetime DE69221379T2 (de) | 1991-05-24 | 1992-05-21 | Halbleiter-Speicherbauteil und Verfahren zur Herstellung desselben |
Country Status (5)
Country | Link |
---|---|
US (1) | US5381030A (de) |
EP (1) | EP0514905B1 (de) |
JP (1) | JP3186084B2 (de) |
KR (1) | KR960000958B1 (de) |
DE (1) | DE69221379T2 (de) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5418175A (en) * | 1994-05-06 | 1995-05-23 | United Microelectronics Corporation | Process for flat-cell mask ROM integrated circuit |
JPH08273362A (ja) * | 1995-03-30 | 1996-10-18 | Nec Ic Microcomput Syst Ltd | 半導体記憶装置 |
JP3207347B2 (ja) * | 1996-01-26 | 2001-09-10 | シャープ株式会社 | 半導体装置 |
FR2749434B1 (fr) * | 1996-05-31 | 1998-09-04 | Dolphin Integration Sa | Matrice de memoire rom compacte |
KR100614660B1 (ko) * | 2005-06-01 | 2006-08-22 | 삼성전자주식회사 | 반도체 기억 장치의 데이터 라인 및 그 형성방법 |
JP4934325B2 (ja) * | 2006-02-17 | 2012-05-16 | 株式会社フジクラ | プリント配線板の接続構造及びプリント配線板の接続方法 |
JP4364226B2 (ja) | 2006-09-21 | 2009-11-11 | 株式会社東芝 | 半導体集積回路 |
JP4791999B2 (ja) * | 2007-04-20 | 2011-10-12 | 株式会社東芝 | 半導体装置 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4212026A (en) * | 1977-06-24 | 1980-07-08 | International Business Machines Corporation | Merged array PLA device, circuit, fabrication method and testing technique |
USRE32236E (en) * | 1979-12-26 | 1986-08-26 | International Business Machines Corporation | One device field effect transistor (FET) AC stable random access memory (RAM) array |
JPS57205893A (en) * | 1981-06-10 | 1982-12-17 | Toshiba Corp | Signal propagating device |
JPS5866343A (ja) * | 1981-10-16 | 1983-04-20 | Hitachi Ltd | 半導体集積回路装置 |
US4541076A (en) * | 1982-05-13 | 1985-09-10 | Storage Technology Corporation | Dual port CMOS random access memory |
JPH0682801B2 (ja) * | 1983-12-23 | 1994-10-19 | 株式会社日立製作所 | 半導体記憶装置とそのレイアウト方法 |
JPS6211262A (ja) * | 1985-07-08 | 1987-01-20 | Nec Ic Microcomput Syst Ltd | 半導体記憶装置 |
JPS62249478A (ja) * | 1986-04-23 | 1987-10-30 | Hitachi Vlsi Eng Corp | 半導体記憶装置 |
JP2511415B2 (ja) * | 1986-06-27 | 1996-06-26 | 沖電気工業株式会社 | 半導体装置 |
JPS63278248A (ja) * | 1987-03-13 | 1988-11-15 | Fujitsu Ltd | ゲ−トアレイの基本セル |
JPS63293966A (ja) * | 1987-05-27 | 1988-11-30 | Hitachi Ltd | 半導体集積回路装置 |
JP2566958B2 (ja) * | 1987-05-30 | 1996-12-25 | 株式会社東芝 | スタンダ−ドセル方式の半導体集積回路 |
JP2547615B2 (ja) * | 1988-06-16 | 1996-10-23 | 三菱電機株式会社 | 読出専用半導体記憶装置および半導体記憶装置 |
JPH02281497A (ja) * | 1989-04-21 | 1990-11-19 | Nec Corp | ダイナミック型半導体記憶素子 |
JPH0382077A (ja) * | 1989-08-24 | 1991-04-08 | Nec Corp | 半導体メモリ装置 |
-
1991
- 1991-05-24 JP JP11968191A patent/JP3186084B2/ja not_active Expired - Fee Related
-
1992
- 1992-05-21 EP EP92108621A patent/EP0514905B1/de not_active Expired - Lifetime
- 1992-05-21 DE DE69221379T patent/DE69221379T2/de not_active Expired - Lifetime
- 1992-05-22 KR KR1019920008674A patent/KR960000958B1/ko not_active IP Right Cessation
-
1994
- 1994-04-26 US US08/233,560 patent/US5381030A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE69221379T2 (de) | 1998-01-15 |
US5381030A (en) | 1995-01-10 |
KR920022512A (ko) | 1992-12-19 |
JPH04346470A (ja) | 1992-12-02 |
JP3186084B2 (ja) | 2001-07-11 |
KR960000958B1 (ko) | 1996-01-15 |
EP0514905B1 (de) | 1997-08-06 |
EP0514905A1 (de) | 1992-11-25 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |