DE69128963D1 - Halbleitervorrichtung und Verfahren zu seiner Herstellung - Google Patents

Halbleitervorrichtung und Verfahren zu seiner Herstellung

Info

Publication number
DE69128963D1
DE69128963D1 DE69128963T DE69128963T DE69128963D1 DE 69128963 D1 DE69128963 D1 DE 69128963D1 DE 69128963 T DE69128963 T DE 69128963T DE 69128963 T DE69128963 T DE 69128963T DE 69128963 D1 DE69128963 D1 DE 69128963D1
Authority
DE
Germany
Prior art keywords
manufacture
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69128963T
Other languages
English (en)
Other versions
DE69128963T2 (de
Inventor
Akihiro Kanda
Mitsuo Tanaka
Takehiro Hirai
Masahiro Nakatani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of DE69128963D1 publication Critical patent/DE69128963D1/de
Application granted granted Critical
Publication of DE69128963T2 publication Critical patent/DE69128963T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222—Bipolar technology
    • H01L21/8228—Complementary devices, e.g. complementary transistors
    • H01L21/82285—Complementary vertical transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • H01L21/743—Making of internal connections, substrate contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222—Bipolar technology
    • H01L21/8226—Bipolar technology comprising merged transistor logic or integrated injection logic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/082—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
    • H01L27/0823—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only including vertical bipolar transistors only
    • H01L27/0826—Combination of vertical complementary transistors
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/087—I2L integrated injection logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Bipolar Integrated Circuits (AREA)
DE69128963T 1991-07-01 1991-12-18 Halbleitervorrichtung und Verfahren zu seiner Herstellung Expired - Fee Related DE69128963T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15926891 1991-07-01

Publications (2)

Publication Number Publication Date
DE69128963D1 true DE69128963D1 (de) 1998-04-02
DE69128963T2 DE69128963T2 (de) 1998-07-30

Family

ID=15690065

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69128963T Expired - Fee Related DE69128963T2 (de) 1991-07-01 1991-12-18 Halbleitervorrichtung und Verfahren zu seiner Herstellung

Country Status (4)

Country Link
US (2) US5162252A (de)
EP (1) EP0521219B1 (de)
KR (1) KR950011017B1 (de)
DE (1) DE69128963T2 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0534632B1 (de) * 1991-09-24 2002-01-16 Matsushita Electronics Corporation, Ltd. Integrierte Halbleiterschaltungsanordnung und Verfahren zu ihrer Herstellung
US5268312A (en) * 1992-10-22 1993-12-07 Motorola, Inc. Method of forming isolated wells in the fabrication of BiCMOS devices
US5369042A (en) * 1993-03-05 1994-11-29 Texas Instruments Incorporated Enhanced performance bipolar transistor process
JPH07235602A (ja) * 1994-02-21 1995-09-05 Mitsubishi Electric Corp Ｉｉｌ回路を有する半導体装置およびその製造方法
JP3547811B2 (ja) * 1994-10-13 2004-07-28 株式会社ルネサステクノロジ バイポーラトランジスタを有する半導体装置およびその製造方法
JP3159237B2 (ja) * 1996-06-03 2001-04-23 日本電気株式会社 半導体装置およびその製造方法
KR100258436B1 (ko) * 1996-10-11 2000-06-01 김덕중 상보형 쌍극성 트랜지스터 및 그 제조 방법
US6140690A (en) * 1996-11-18 2000-10-31 Matsushita Electric Industrial Co., Ltd. Semiconductor device
US6165868A (en) * 1999-06-04 2000-12-26 Industrial Technology Research Institute Monolithic device isolation by buried conducting walls
US6894366B2 (en) * 2000-10-10 2005-05-17 Texas Instruments Incorporated Bipolar junction transistor with a counterdoped collector region
EP1646084A1 (de) * 2004-10-06 2006-04-12 Infineon Technologies AG Verfahren zur Herstellung einer integrierten Injektions-Logikschaltung
US20070298576A1 (en) * 2006-06-21 2007-12-27 Kuhn Kelin J Methods of forming bipolar transistors by silicide through contact and structures formed thereby
KR102082190B1 (ko) * 2013-08-22 2020-02-27 (주) 코미코 에어로졸 코팅 방법 및 이에 의해 형성된 내플라즈마 부재
US20180076038A1 (en) * 2016-09-09 2018-03-15 Texas Instruments Incorporated Method For Producing Two N-Type Buried Layers In An Integrated Circuit

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4258379A (en) * 1978-09-25 1981-03-24 Hitachi, Ltd. IIL With in and outdiffused emitter pocket
DE3020609C2 (de) * 1979-05-31 1985-11-07 Tokyo Shibaura Denki K.K., Kawasaki, Kanagawa Verfahren zum Herstellen einer integrierten Schaltung mit wenigstens einem I↑2↑L-Element
JPS56142661A (en) * 1980-04-04 1981-11-07 Matsushita Electric Ind Co Ltd Semiconductor integrated circuit and manufacture thereof
JPS57116430A (en) * 1981-01-13 1982-07-20 Toshiba Corp Inverted logical circuit
JPS57164558A (en) * 1981-04-02 1982-10-09 Toshiba Corp Semiconductor integrated circuit device
JPS57164560A (en) * 1981-04-02 1982-10-09 Toshiba Corp Manufacture of semiconductor integrated circuit device
JPS59141261A (ja) * 1983-01-31 1984-08-13 Matsushita Electric Ind Co Ltd 半導体集積回路装置の製造方法
EP0093304B1 (de) * 1982-04-19 1986-01-15 Matsushita Electric Industrial Co., Ltd. Integrierte Halbleiterschaltung und Verfahren zur Herstellung derselben
JPS5967255A (ja) * 1982-10-07 1984-04-16 Sumitomo Chem Co Ltd Ｎ−フエニルテトラヒドロフタラミン酸誘導体、その製造法およびそれを有効成分とする除草剤
JPS6052038A (ja) * 1983-08-31 1985-03-23 Nec Corp 半導体装置の製造方法
WO1985003597A1 (en) * 1984-02-03 1985-08-15 Advanced Micro Devices, Inc. A bipolar transistor with active elements formed in slots
US4984048A (en) * 1987-07-10 1991-01-08 Hitachi, Ltd. Semiconductor device with buried side contact
ZA891937B (en) * 1988-04-04 1990-11-28 Ppg Industries Inc Pigment grinding vehicles containing quaternary ammonium and ternary sulfonium groups
JPH0258865A (ja) * 1988-08-24 1990-02-28 Nec Corp 半導体装置

Also Published As

Publication number Publication date
EP0521219A3 (de) 1994-08-31
US5162252A (en) 1992-11-10
DE69128963T2 (de) 1998-07-30
EP0521219A2 (de) 1993-01-07
US5331198A (en) 1994-07-19
KR930003417A (ko) 1993-02-24
KR950011017B1 (ko) 1995-09-27
EP0521219B1 (de) 1998-02-25

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee