DE19651550B8 - Halbleitervorrichtung und Verfahren zu deren Herstellung - Google Patents

Halbleitervorrichtung und Verfahren zu deren Herstellung Download PDF

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Publication number
DE19651550B8
DE19651550B8 DE19651550A DE19651550A DE19651550B8 DE 19651550 B8 DE19651550 B8 DE 19651550B8 DE 19651550 A DE19651550 A DE 19651550A DE 19651550 A DE19651550 A DE 19651550A DE 19651550 B8 DE19651550 B8 DE 19651550B8
Authority
DE
Germany
Prior art keywords
production
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE19651550A
Other languages
English (en)
Other versions
DE19651550B4 (de
DE19651550A1 (de
Inventor
Yuji Kariya Ichikawa
Yasushi Kariya Tanaka
Yasuo Kariya Souki
Ryouichi Kariya Kubokoya
Akira Kariya Kuroyanagi
Hirohito Kariya Shioya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Corp filed Critical Denso Corp
Publication of DE19651550A1 publication Critical patent/DE19651550A1/de
Application granted granted Critical
Publication of DE19651550B4 publication Critical patent/DE19651550B4/de
Publication of DE19651550B8 publication Critical patent/DE19651550B8/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/114—Nitrides of silicon

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
DE19651550A 1995-12-14 1996-12-11 Halbleitervorrichtung und Verfahren zu deren Herstellung Expired - Fee Related DE19651550B8 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP7-325727 1995-12-14
JP32572795 1995-12-14

Publications (3)

Publication Number Publication Date
DE19651550A1 DE19651550A1 (de) 1997-06-19
DE19651550B4 DE19651550B4 (de) 2009-10-29
DE19651550B8 true DE19651550B8 (de) 2010-02-25

Family

ID=18180010

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19651550A Expired - Fee Related DE19651550B8 (de) 1995-12-14 1996-12-11 Halbleitervorrichtung und Verfahren zu deren Herstellung

Country Status (3)

Country Link
US (2) US5714408A (de)
KR (1) KR100271222B1 (de)
DE (1) DE19651550B8 (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6207586B1 (en) * 1998-10-28 2001-03-27 Lucent Technologies Inc. Oxide/nitride stacked gate dielectric and associated methods
JP2001057426A (ja) * 1999-06-10 2001-02-27 Fuji Electric Co Ltd 高耐圧半導体装置およびその製造方法
WO2001004946A1 (en) * 1999-07-08 2001-01-18 Hitachi, Ltd. Semiconductor device and method for producing the same
US6242367B1 (en) * 1999-07-13 2001-06-05 Advanced Micro Devices, Inc. Method of forming silicon nitride films
JP2001035943A (ja) * 1999-07-23 2001-02-09 Mitsubishi Electric Corp 半導体装置および製造方法
US6465373B1 (en) * 2000-08-31 2002-10-15 Micron Technology, Inc. Ultra thin TCS (SiCl4) cell nitride for DRAM capacitor with DCS (SiH2Cl2) interface seeding layer
JP2002198526A (ja) * 2000-12-27 2002-07-12 Fujitsu Ltd 半導体装置の製造方法
KR100814257B1 (ko) * 2001-12-27 2008-03-17 동부일렉트로닉스 주식회사 반도체 소자 제조 방법
US6656778B1 (en) * 2002-04-26 2003-12-02 Macronix International Co., Ltd. Passivation structure for flash memory and method for fabricating same
JP3637332B2 (ja) * 2002-05-29 2005-04-13 株式会社東芝 半導体装置及びその製造方法
JP4235066B2 (ja) * 2003-09-03 2009-03-04 日本エー・エス・エム株式会社 薄膜形成方法
US7125758B2 (en) 2004-04-20 2006-10-24 Applied Materials, Inc. Controlling the properties and uniformity of a silicon nitride film by controlling the film forming precursors
US8083853B2 (en) * 2004-05-12 2011-12-27 Applied Materials, Inc. Plasma uniformity control by gas diffuser hole design
US8074599B2 (en) * 2004-05-12 2011-12-13 Applied Materials, Inc. Plasma uniformity control by gas diffuser curvature
US8328939B2 (en) * 2004-05-12 2012-12-11 Applied Materials, Inc. Diffuser plate with slit valve compensation
US7429410B2 (en) 2004-09-20 2008-09-30 Applied Materials, Inc. Diffuser gravity support
US20060118892A1 (en) * 2004-12-02 2006-06-08 Taiwan Semiconductor Manufacturing Company, Ltd. Methods and Structures to Produce a Strain-Inducing Layer in a Semiconductor Device
KR100731745B1 (ko) * 2005-06-22 2007-06-22 삼성에스디아이 주식회사 유기전계발광표시장치 및 그 제조방법
US20070202710A1 (en) * 2006-02-27 2007-08-30 Hynix Semiconductor Inc. Method for fabricating semiconductor device using hard mask
US20080317973A1 (en) * 2007-06-22 2008-12-25 White John M Diffuser support

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4365264A (en) * 1978-07-31 1982-12-21 Hitachi, Ltd. Semiconductor device with high density low temperature deposited Siw Nx Hy Oz passivating layer
US5160998A (en) * 1987-08-18 1992-11-03 Fujitsu Limited Semiconductor device and method of manufacturing the same

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61154171A (ja) * 1984-12-27 1986-07-12 Toshiba Corp 絶縁ゲ−ト型電界効果半導体装置
JPS62114232A (ja) * 1985-11-13 1987-05-26 Sony Corp 半導体装置
JPS62174927A (ja) * 1986-01-28 1987-07-31 Nec Corp 半導体装置
JPH01304735A (ja) * 1988-06-01 1989-12-08 Nec Corp 半導体装置の保護膜形成方法
JPH0215630A (ja) * 1988-07-01 1990-01-19 Nec Corp 半導体装置の保護膜形成方法
JPH02103936A (ja) * 1988-10-13 1990-04-17 Mitsubishi Electric Corp 半導体装置
US4962065A (en) * 1989-02-13 1990-10-09 The University Of Arkansas Annealing process to stabilize PECVD silicon nitride for application as the gate dielectric in MOS devices
JPH06232113A (ja) * 1993-02-02 1994-08-19 Fuji Electric Co Ltd 半導体装置用絶縁膜の堆積方法
US5640345A (en) * 1993-10-01 1997-06-17 Matsushita Electric Industrial Co., Ltd. Semiconductor memory device and fabrication process
DE69529493T2 (de) * 1994-06-20 2003-10-30 Canon Kk Anzeigevorrichtung und Verfahren zu ihrer Herstellung
JP3184771B2 (ja) * 1995-09-14 2001-07-09 キヤノン株式会社 アクティブマトリックス液晶表示装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4365264A (en) * 1978-07-31 1982-12-21 Hitachi, Ltd. Semiconductor device with high density low temperature deposited Siw Nx Hy Oz passivating layer
US5160998A (en) * 1987-08-18 1992-11-03 Fujitsu Limited Semiconductor device and method of manufacturing the same

Also Published As

Publication number Publication date
US6137156A (en) 2000-10-24
DE19651550B4 (de) 2009-10-29
DE19651550A1 (de) 1997-06-19
KR100271222B1 (ko) 2000-12-01
KR970053361A (ko) 1997-07-31
US5714408A (en) 1998-02-03

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
8396 Reprint of erroneous front page
8364 No opposition during term of opposition
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee