DE69524529T2 - Halbleiterspeicheranordnung und Verfahren zur Herstellung - Google Patents

Halbleiterspeicheranordnung und Verfahren zur Herstellung

Info

Publication number
DE69524529T2
DE69524529T2 DE69524529T DE69524529T DE69524529T2 DE 69524529 T2 DE69524529 T2 DE 69524529T2 DE 69524529 T DE69524529 T DE 69524529T DE 69524529 T DE69524529 T DE 69524529T DE 69524529 T2 DE69524529 T2 DE 69524529T2
Authority
DE
Germany
Prior art keywords
manufacturing
memory device
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69524529T
Other languages
English (en)
Other versions
DE69524529D1 (de
Inventor
Yoshio Mochizuki
Hideo Kato
Nobutake Sugiura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE69524529D1 publication Critical patent/DE69524529D1/de
Application granted granted Critical
Publication of DE69524529T2 publication Critical patent/DE69524529T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1408—Protection against unauthorised use of memory or access to memory by using cryptography
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/22—Safety or protection circuits preventing unauthorised or accidental access to memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/20—Address safety or protection circuits, i.e. arrangements for preventing unauthorized or accidental access

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
  • Storage Device Security (AREA)
DE69524529T 1994-10-15 1995-10-11 Halbleiterspeicheranordnung und Verfahren zur Herstellung Expired - Lifetime DE69524529T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27597194A JPH08115265A (ja) 1994-10-15 1994-10-15 半導体記憶装置及びその製造方法

Publications (2)

Publication Number Publication Date
DE69524529D1 DE69524529D1 (de) 2002-01-24
DE69524529T2 true DE69524529T2 (de) 2002-07-11

Family

ID=17562975

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69524529T Expired - Lifetime DE69524529T2 (de) 1994-10-15 1995-10-11 Halbleiterspeicheranordnung und Verfahren zur Herstellung

Country Status (7)

Country Link
US (1) US5579279A (de)
EP (1) EP0707317B1 (de)
JP (1) JPH08115265A (de)
KR (1) KR100192632B1 (de)
CN (1) CN1054457C (de)
DE (1) DE69524529T2 (de)
TW (1) TW288118B (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100611955B1 (ko) * 1999-07-20 2006-08-11 삼성전자주식회사 스크램블러
JP3872626B2 (ja) 2000-02-14 2007-01-24 シャープ株式会社 メモリ装置
JP4052895B2 (ja) * 2002-08-07 2008-02-27 シャープ株式会社 メモリセル情報の読み出し回路および半導体記憶装置
JP2004220721A (ja) * 2003-01-16 2004-08-05 Matsushita Electric Ind Co Ltd 半導体記憶装置
JP2007272943A (ja) * 2006-03-30 2007-10-18 Matsushita Electric Ind Co Ltd 不揮発性半導体記憶装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4346459A (en) * 1980-06-30 1982-08-24 Inmos Corporation Redundancy scheme for an MOS memory
GB2129586B (en) * 1982-11-01 1986-04-30 Robert Andrew Mclaren Improvements in or relating to memory systems
US4583196A (en) * 1983-10-28 1986-04-15 Honeywell Inc. Secure read only memory
US4843026A (en) * 1987-09-24 1989-06-27 Intel Corporation Architecture modification for improved ROM security
US5287321A (en) * 1992-01-24 1994-02-15 Vlsi Technology, Inc. Illegal address detector for semiconductor memories
JP3310011B2 (ja) * 1992-03-30 2002-07-29 株式会社東芝 半導体メモリおよびこれを使用した半導体メモリボード
KR970000870B1 (ko) * 1992-12-02 1997-01-20 마쯔시다덴기산교 가부시기가이샤 반도체메모리장치
JPH0765139A (ja) * 1993-08-23 1995-03-10 Mitsubishi Electric Corp Ｉｃメモリカード

Also Published As

Publication number Publication date
CN1131324A (zh) 1996-09-18
JPH08115265A (ja) 1996-05-07
EP0707317B1 (de) 2001-12-12
US5579279A (en) 1996-11-26
CN1054457C (zh) 2000-07-12
EP0707317A3 (de) 1997-08-06
DE69524529D1 (de) 2002-01-24
EP0707317A2 (de) 1996-04-17
KR960015910A (ko) 1996-05-22
KR100192632B1 (ko) 1999-06-15
TW288118B (de) 1996-10-11

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition