DE69835780D1 - Halbleiter-Speicherbauelement und Verfahren zu seiner Herstellung - Google Patents

Halbleiter-Speicherbauelement und Verfahren zu seiner Herstellung

Info

Publication number
DE69835780D1
DE69835780D1 DE69835780T DE69835780T DE69835780D1 DE 69835780 D1 DE69835780 D1 DE 69835780D1 DE 69835780 T DE69835780 T DE 69835780T DE 69835780 T DE69835780 T DE 69835780T DE 69835780 D1 DE69835780 D1 DE 69835780D1
Authority
DE
Germany
Prior art keywords
manufacture
memory device
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69835780T
Other languages
English (en)
Other versions
DE69835780T2 (de
Inventor
Takanori Saeki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Electronics Corp filed Critical NEC Electronics Corp
Publication of DE69835780D1 publication Critical patent/DE69835780D1/de
Application granted granted Critical
Publication of DE69835780T2 publication Critical patent/DE69835780T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto
    • H10B12/038Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE69835780T 1997-02-07 1998-02-05 Halbleiter-Speicherbauelement und Verfahren zu seiner Herstellung Expired - Fee Related DE69835780T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP4010197 1997-02-07
JP04010197A JP3161354B2 (ja) 1997-02-07 1997-02-07 半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
DE69835780D1 true DE69835780D1 (de) 2006-10-19
DE69835780T2 DE69835780T2 (de) 2006-12-28

Family

ID=12571483

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69835780T Expired - Fee Related DE69835780T2 (de) 1997-02-07 1998-02-05 Halbleiter-Speicherbauelement und Verfahren zu seiner Herstellung

Country Status (7)

Country Link
US (2) US6225657B1 (de)
EP (1) EP0858109B1 (de)
JP (1) JP3161354B2 (de)
KR (1) KR100306409B1 (de)
CN (1) CN1152433C (de)
DE (1) DE69835780T2 (de)
TW (1) TW442922B (de)

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JP4044525B2 (ja) 2004-01-07 2008-02-06 株式会社東芝 半導体記憶装置およびその製造方法
DE102004003084B3 (de) * 2004-01-21 2005-10-06 Infineon Technologies Ag Halbleiterspeicherzelle sowie zugehöriges Herstellungsverfahren
US7606066B2 (en) 2005-09-07 2009-10-20 Innovative Silicon Isi Sa Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same
US7683430B2 (en) 2005-12-19 2010-03-23 Innovative Silicon Isi Sa Electrically floating body memory cell and array, and method of operating or controlling same
US7492632B2 (en) 2006-04-07 2009-02-17 Innovative Silicon Isi Sa Memory array having a programmable word length, and method of operating same
US7638878B2 (en) * 2006-04-13 2009-12-29 Micron Technology, Inc. Devices and systems including the bit lines and bit line contacts
WO2007128738A1 (en) 2006-05-02 2007-11-15 Innovative Silicon Sa Semiconductor memory cell and array using punch-through to program and read same
US8069377B2 (en) 2006-06-26 2011-11-29 Micron Technology, Inc. Integrated circuit having memory array including ECC and column redundancy and method of operating the same
US7542340B2 (en) 2006-07-11 2009-06-02 Innovative Silicon Isi Sa Integrated circuit including memory array having a segmented bit line architecture and method of controlling and/or operating same
KR100891329B1 (ko) * 2007-01-26 2009-03-31 삼성전자주식회사 반도체 소자 및 그 제조 방법
US8264041B2 (en) 2007-01-26 2012-09-11 Micron Technology, Inc. Semiconductor device with electrically floating body
US8518774B2 (en) 2007-03-29 2013-08-27 Micron Technology, Inc. Manufacturing process for zero-capacitor random access memory circuits
US8064274B2 (en) 2007-05-30 2011-11-22 Micron Technology, Inc. Integrated circuit having voltage generation circuitry for memory cell array, and method of operating and/or controlling same
US8085594B2 (en) 2007-06-01 2011-12-27 Micron Technology, Inc. Reading technique for memory cell with electrically floating body transistor
US7816762B2 (en) * 2007-08-07 2010-10-19 International Business Machines Corporation On-chip decoupling capacitor structures
US8194487B2 (en) 2007-09-17 2012-06-05 Micron Technology, Inc. Refreshing data of memory cells with electrically floating body transistors
US8536628B2 (en) 2007-11-29 2013-09-17 Micron Technology, Inc. Integrated circuit having memory cell array including barriers, and method of manufacturing same
US8349662B2 (en) 2007-12-11 2013-01-08 Micron Technology, Inc. Integrated circuit having memory cell array, and method of manufacturing same
US8773933B2 (en) 2012-03-16 2014-07-08 Micron Technology, Inc. Techniques for accessing memory cells
US8014195B2 (en) 2008-02-06 2011-09-06 Micron Technology, Inc. Single transistor memory cell
US8189376B2 (en) 2008-02-08 2012-05-29 Micron Technology, Inc. Integrated circuit having memory cells including gate material having high work function, and method of manufacturing same
US7957206B2 (en) 2008-04-04 2011-06-07 Micron Technology, Inc. Read circuitry for an integrated circuit having memory cells and/or a memory cell array, and method of operating same
US7947543B2 (en) 2008-09-25 2011-05-24 Micron Technology, Inc. Recessed gate silicon-on-insulator floating body device with self-aligned lateral isolation
US7933140B2 (en) 2008-10-02 2011-04-26 Micron Technology, Inc. Techniques for reducing a voltage swing
US7924630B2 (en) 2008-10-15 2011-04-12 Micron Technology, Inc. Techniques for simultaneously driving a plurality of source lines
US8223574B2 (en) 2008-11-05 2012-07-17 Micron Technology, Inc. Techniques for block refreshing a semiconductor memory device
US8213226B2 (en) 2008-12-05 2012-07-03 Micron Technology, Inc. Vertical transistor memory cell and array
US8319294B2 (en) 2009-02-18 2012-11-27 Micron Technology, Inc. Techniques for providing a source line plane
US8710566B2 (en) 2009-03-04 2014-04-29 Micron Technology, Inc. Techniques for forming a contact to a buried diffusion layer in a semiconductor memory device
US8748959B2 (en) 2009-03-31 2014-06-10 Micron Technology, Inc. Semiconductor memory device
US8139418B2 (en) 2009-04-27 2012-03-20 Micron Technology, Inc. Techniques for controlling a direct injection semiconductor memory device
US8508994B2 (en) 2009-04-30 2013-08-13 Micron Technology, Inc. Semiconductor device with floating gate and electrically floating body
US8498157B2 (en) 2009-05-22 2013-07-30 Micron Technology, Inc. Techniques for providing a direct injection semiconductor memory device
US8537610B2 (en) 2009-07-10 2013-09-17 Micron Technology, Inc. Techniques for providing a semiconductor memory device
US9076543B2 (en) 2009-07-27 2015-07-07 Micron Technology, Inc. Techniques for providing a direct injection semiconductor memory device
US8199595B2 (en) 2009-09-04 2012-06-12 Micron Technology, Inc. Techniques for sensing a semiconductor memory device
US8174881B2 (en) 2009-11-24 2012-05-08 Micron Technology, Inc. Techniques for reducing disturbance in a semiconductor device
US8310893B2 (en) 2009-12-16 2012-11-13 Micron Technology, Inc. Techniques for reducing impact of array disturbs in a semiconductor memory device
US8416636B2 (en) 2010-02-12 2013-04-09 Micron Technology, Inc. Techniques for controlling a semiconductor memory device
US8576631B2 (en) 2010-03-04 2013-11-05 Micron Technology, Inc. Techniques for sensing a semiconductor memory device
US8411513B2 (en) 2010-03-04 2013-04-02 Micron Technology, Inc. Techniques for providing a semiconductor memory device having hierarchical bit lines
US8369177B2 (en) 2010-03-05 2013-02-05 Micron Technology, Inc. Techniques for reading from and/or writing to a semiconductor memory device
EP2548227B1 (de) 2010-03-15 2021-07-14 Micron Technology, Inc. Verfahren zur bereitstellung einer halbleiterspeichervorrichtung
US8411524B2 (en) 2010-05-06 2013-04-02 Micron Technology, Inc. Techniques for refreshing a semiconductor memory device
US8455875B2 (en) 2010-05-10 2013-06-04 International Business Machines Corporation Embedded DRAM for extremely thin semiconductor-on-insulator
US8531878B2 (en) 2011-05-17 2013-09-10 Micron Technology, Inc. Techniques for providing a semiconductor memory device
US9559216B2 (en) 2011-06-06 2017-01-31 Micron Technology, Inc. Semiconductor memory device and method for biasing same

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DE2815316C2 (de) * 1978-04-08 1980-03-27 Dynamit Nobel Ag, 5210 Troisdorf Verfahren zur Herstellung von Alkylsilanen
DE2815978C2 (de) * 1978-04-13 1980-05-22 Dynamit Nobel Ag, 5210 Troisdorf Verfahren zur Herstellung von Athylsilanen
US4340574A (en) * 1980-08-28 1982-07-20 Union Carbide Corporation Process for the production of ultrahigh purity silane with recycle from separation columns
US4292433A (en) * 1980-10-31 1981-09-29 Chisso Corporation Method for producing 3-chloropropyltrichlorosilane
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JPH0810755B2 (ja) * 1986-10-22 1996-01-31 沖電気工業株式会社 半導体メモリの製造方法
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DE4130790A1 (de) * 1991-09-16 1993-03-18 Wacker Chemie Gmbh Verfahren zur abtrennung von alkenen bei der methylchlorsilan-destillation
JP2904635B2 (ja) * 1992-03-30 1999-06-14 株式会社東芝 半導体装置およびその製造方法
JP3251777B2 (ja) * 1994-06-28 2002-01-28 株式会社東芝 半導体記憶装置
US5838038A (en) * 1992-09-22 1998-11-17 Kabushiki Kaisha Toshiba Dynamic random access memory device with the combined open/folded bit-line pair arrangement
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JPH0817983A (ja) * 1994-06-29 1996-01-19 Nec Kansai Ltd 半田めっき装置
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DE4442753C2 (de) * 1994-12-01 2002-04-25 Degussa Verfahren zur Herstellung von Alkylhydrogenchlorsilane
JP3311205B2 (ja) 1995-07-13 2002-08-05 株式会社東芝 半導体記憶装置及びその製造方法
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US6500977B1 (en) * 2001-11-27 2002-12-31 Dow Corning Corporation Process for producing organosilanes

Also Published As

Publication number Publication date
US20010013601A1 (en) 2001-08-16
US6225657B1 (en) 2001-05-01
CN1190263A (zh) 1998-08-12
EP0858109B1 (de) 2006-09-06
JPH10223860A (ja) 1998-08-21
KR100306409B1 (ko) 2001-11-30
CN1152433C (zh) 2004-06-02
EP0858109A3 (de) 2000-02-02
EP0858109A2 (de) 1998-08-12
US6509224B2 (en) 2003-01-21
JP3161354B2 (ja) 2001-04-25
KR19980071153A (ko) 1998-10-26
DE69835780T2 (de) 2006-12-28
TW442922B (en) 2001-06-23

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee