KR960012496A - 반도체기억장치 및 그 제조방법 - Google Patents

반도체기억장치 및 그 제조방법 Download PDF

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Publication number
KR960012496A
KR960012496A KR1019950030331A KR19950030331A KR960012496A KR 960012496 A KR960012496 A KR 960012496A KR 1019950030331 A KR1019950030331 A KR 1019950030331A KR 19950030331 A KR19950030331 A KR 19950030331A KR 960012496 A KR960012496 A KR 960012496A
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KR
South Korea
Prior art keywords
manufacturing
memory device
semiconductor memory
semiconductor
memory
Prior art date
Application number
KR1019950030331A
Other languages
English (en)
Other versions
KR100197763B1 (ko
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of KR960012496A publication Critical patent/KR960012496A/ko
Application granted granted Critical
Publication of KR100197763B1 publication Critical patent/KR100197763B1/ko

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92—Capacitors having potential barriers
    • H01L29/94—Metal-insulator-semiconductors, e.g. MOS
    • H01L29/945—Trench capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Element Separation (AREA)
  • Semiconductor Integrated Circuits (AREA)
KR1019950030331A 1994-09-17 1995-09-16 반도체 기억장치 및 그 제조방법 KR100197763B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP24846394A JP3400143B2 (ja) 1994-09-17 1994-09-17 半導体記憶装置
JP94-248463 1994-09-17

Publications (2)

Publication Number Publication Date
KR960012496A true KR960012496A (ko) 1996-04-20
KR100197763B1 KR100197763B1 (ko) 1999-06-15

Family

ID=17178519

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950030331A KR100197763B1 (ko) 1994-09-17 1995-09-16 반도체 기억장치 및 그 제조방법

Country Status (3)

Country Link
US (1) US5804851A (ko)
JP (1) JP3400143B2 (ko)
KR (1) KR100197763B1 (ko)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3238066B2 (ja) * 1996-03-11 2001-12-10 株式会社東芝 半導体記憶装置およびその製造方法
US5945348A (en) * 1996-04-04 1999-08-31 Micron Technology, Inc. Method for reducing the heights of interconnects on a projecting region with a smaller reduction in the heights of other interconnects
US5929476A (en) 1996-06-21 1999-07-27 Prall; Kirk Semiconductor-on-insulator transistor and memory circuitry employing semiconductor-on-insulator transistors
US6500744B2 (en) 1999-09-02 2002-12-31 Micron Technology, Inc. Methods of forming DRAM assemblies, transistor devices, and openings in substrates
JP2001085617A (ja) * 1999-09-09 2001-03-30 Nec Corp 半導体装置及びその製造方法
KR20020071993A (ko) * 2001-03-08 2002-09-14 주식회사 하이닉스반도체 필드지역에 다중 트렌치형 강유전체 커패시터를 가지는강유전체 메모리 소자 및 그 제조방법
US20020163072A1 (en) * 2001-05-01 2002-11-07 Subhash Gupta Method for bonding wafers to produce stacked integrated circuits
US6664161B2 (en) 2002-05-01 2003-12-16 International Business Machines Corporation Method and structure for salicide trench capacitor plate electrode
US6913968B2 (en) * 2003-07-30 2005-07-05 International Business Machines Corporation Method and structure for vertical DRAM devices with self-aligned upper trench shaping
TWI222720B (en) * 2003-09-19 2004-10-21 Promos Technologies Inc DRAM process and structure
DE102004024659B4 (de) * 2004-05-18 2014-10-02 Infineon Technologies Ag Halbleiterbauteil
US7518182B2 (en) 2004-07-20 2009-04-14 Micron Technology, Inc. DRAM layout with vertical FETs and method of formation
US7271083B2 (en) * 2004-07-22 2007-09-18 Taiwan Semiconductor Manufacturing Company, Ltd. One-transistor random access memory technology compatible with metal gate process
TWI242258B (en) * 2004-09-09 2005-10-21 Promos Technologies Inc Deep trench capacitor and method of fabricating the same
JP2006128210A (ja) * 2004-10-26 2006-05-18 Toshiba Corp 半導体装置
US7232719B2 (en) * 2005-03-28 2007-06-19 Promos Technologies Inc. Memories having a charge storage node at least partially located in a trench in a semiconductor substrate and electrically coupled to a source/drain region formed in the substrate
US7923373B2 (en) 2007-06-04 2011-04-12 Micron Technology, Inc. Pitch multiplication using self-assembling materials
US7888723B2 (en) * 2008-01-18 2011-02-15 International Business Machines Corporation Deep trench capacitor in a SOI substrate having a laterally protruding buried strap
US7939876B2 (en) * 2008-04-09 2011-05-10 International Business Machines Corporation Metallized conductive strap spacer for SOI deep trench capacitor
US8168507B2 (en) 2009-08-21 2012-05-01 International Business Machines Corporation Structure and method of forming enhanced array device isolation for implanted plate EDRAM
US8686492B2 (en) * 2010-03-11 2014-04-01 Spansion Llc Non-volatile FINFET memory device and manufacturing method thereof
US9401363B2 (en) 2011-08-23 2016-07-26 Micron Technology, Inc. Vertical transistor devices, memory arrays, and methods of forming vertical transistor devices
US8557657B1 (en) * 2012-05-18 2013-10-15 International Business Machines Corporation Retrograde substrate for deep trench capacitors
DE102013204701A1 (de) * 2013-03-18 2014-10-02 Robert Bosch Gmbh Pseudo-Schottky-Diode

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61144057A (ja) * 1984-12-18 1986-07-01 Toshiba Corp 半導体装置の製造方法
JPS63258060A (ja) * 1987-04-15 1988-10-25 Nec Corp 半導体記憶装置
JPH01192165A (ja) * 1988-01-28 1989-08-02 Fujitsu Ltd ダイナミック・メモリセル及びその製造方法
EP0480411A1 (en) * 1990-10-10 1992-04-15 Micron Technology, Inc. Stacked capacitor DRAM
JP2819520B2 (ja) * 1991-05-07 1998-10-30 インターナショナル・ビジネス・マシーンズ・コーポレイション Ｄｒａｍセル
TW301782B (ko) * 1991-08-16 1997-04-01 Gold Star Electronics
JP2994110B2 (ja) * 1991-09-09 1999-12-27 株式会社東芝 半導体記憶装置
US5264716A (en) * 1992-01-09 1993-11-23 International Business Machines Corporation Diffused buried plate trench dram cell array
US5250829A (en) * 1992-01-09 1993-10-05 International Business Machines Corporation Double well substrate plate trench DRAM cell array
JP2570100B2 (ja) * 1993-05-16 1997-01-08 日本電気株式会社 半導体記憶装置

Also Published As

Publication number Publication date
US5804851A (en) 1998-09-08
JP3400143B2 (ja) 2003-04-28
KR100197763B1 (ko) 1999-06-15
JPH0888336A (ja) 1996-04-02

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