DE60109887D1 - Einmalig programmierbare nichtflüchtige halbleiterspeicheranordnung und verfahren zu deren herstellung - Google Patents

Einmalig programmierbare nichtflüchtige halbleiterspeicheranordnung und verfahren zu deren herstellung

Info

Publication number
DE60109887D1
DE60109887D1 DE60109887T DE60109887T DE60109887D1 DE 60109887 D1 DE60109887 D1 DE 60109887D1 DE 60109887 T DE60109887 T DE 60109887T DE 60109887 T DE60109887 T DE 60109887T DE 60109887 D1 DE60109887 D1 DE 60109887D1
Authority
DE
Germany
Prior art keywords
production
memory device
semiconductor memory
volatile semiconductor
time programmable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60109887T
Other languages
English (en)
Other versions
DE60109887T2 (de
Inventor
Yoshiaki Hagiwara
Hideaki Kuroda
Michitaka Kubota
Akira Nakagawara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Application granted granted Critical
Publication of DE60109887D1 publication Critical patent/DE60109887D1/de
Publication of DE60109887T2 publication Critical patent/DE60109887T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B99/00—Subject matter not provided for in other groups of this subclass
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/30—Resistive cell, memory material aspects
    • G11C2213/33—Material including silicon
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/71—Three dimensional array
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/77—Array wherein the memory element being directly connected to the bit lines and word lines without any access device being used
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/79—Array wherein the access device being a transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • H01L2225/06568—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking the devices decreasing in size, e.g. pyramidical stack
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
DE2001609887 2001-02-02 2001-06-27 Einmalig programmierbare nichtflüchtige Halbleiterspeicheranordnung und Verfahren zu deren Herstellung Expired - Lifetime DE60109887T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2001027307 2001-02-02
JP2001027307A JP3846202B2 (ja) 2001-02-02 2001-02-02 半導体不揮発性記憶装置

Publications (2)

Publication Number Publication Date
DE60109887D1 true DE60109887D1 (de) 2005-05-12
DE60109887T2 DE60109887T2 (de) 2006-02-23

Family

ID=18891994

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2001609887 Expired - Lifetime DE60109887T2 (de) 2001-02-02 2001-06-27 Einmalig programmierbare nichtflüchtige Halbleiterspeicheranordnung und Verfahren zu deren Herstellung

Country Status (7)

Country Link
US (2) US6583490B2 (de)
EP (1) EP1229552B1 (de)
JP (1) JP3846202B2 (de)
KR (1) KR100791905B1 (de)
CN (1) CN1157792C (de)
DE (1) DE60109887T2 (de)
TW (1) TW517233B (de)

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US20030109125A1 (en) * 2001-12-10 2003-06-12 Chewnpu Jou Fuse structure for a semiconductor device and manufacturing method thereof
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US6911360B2 (en) * 2003-04-29 2005-06-28 Freescale Semiconductor, Inc. Fuse and method for forming
US7132350B2 (en) 2003-07-21 2006-11-07 Macronix International Co., Ltd. Method for manufacturing a programmable eraseless memory
US7281274B2 (en) * 2003-10-16 2007-10-09 Lmp Media Llc Electronic media distribution system
KR100546392B1 (ko) 2003-11-01 2006-01-26 삼성전자주식회사 Ｅｐｒｏｍ 소자를 포함하는 반도체 소자와 그 제조 방법
EP2372614B1 (de) 2004-09-10 2013-03-13 Semiconductor Energy Laboratory Co. Ltd. Halbleiterbauelement
WO2006043687A1 (en) 2004-10-22 2006-04-27 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP2006148088A (ja) * 2004-10-22 2006-06-08 Semiconductor Energy Lab Co Ltd 半導体装置
US7242072B2 (en) * 2004-11-23 2007-07-10 International Business Machines Corporation Electrically programmable fuse for silicon-on-insulator (SOI) technology
US7768014B2 (en) * 2005-01-31 2010-08-03 Semiconductor Energy Laboratory Co., Ltd. Memory device and manufacturing method thereof
JP4749162B2 (ja) * 2005-01-31 2011-08-17 株式会社半導体エネルギー研究所 半導体装置
WO2006085633A1 (en) 2005-02-10 2006-08-17 Semiconductor Energy Laboratory Co., Ltd. Memory element and semiconductor device
US7926726B2 (en) * 2005-03-28 2011-04-19 Semiconductor Energy Laboratory Co., Ltd. Survey method and survey system
CN100391002C (zh) * 2005-03-29 2008-05-28 旺宏电子股份有限公司 单次可程序化只读存储器及其制造方法
JP5190182B2 (ja) * 2005-05-31 2013-04-24 株式会社半導体エネルギー研究所 半導体装置
WO2006129739A1 (en) 2005-05-31 2006-12-07 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
KR100667461B1 (ko) * 2005-09-26 2007-01-10 리디스 테크놀로지 인코포레이티드 각 셀의 소스 영역마다 콘택이 형성되어 있는 오티피 롬 셀구조, 및 상기 롬의 프로그래밍 및 읽기 방법
CN100442524C (zh) * 2005-09-28 2008-12-10 中芯国际集成电路制造(上海)有限公司 用于嵌入式eeprom中的一次可编程存储器器件的结构与方法
JP5027470B2 (ja) * 2005-09-29 2012-09-19 株式会社半導体エネルギー研究所 記憶装置
TWI411095B (zh) * 2005-09-29 2013-10-01 Semiconductor Energy Lab 記憶裝置
KR100875165B1 (ko) * 2007-07-04 2008-12-22 주식회사 동부하이텍 반도체 소자 및 제조 방법
JP4596070B2 (ja) * 2008-02-01 2010-12-08 ソニー株式会社 メモリ素子及びメモリ素子の製造方法、並びに表示装置及び表示装置の製造方法
CN101527167B (zh) * 2008-02-01 2012-08-15 索尼株式会社 显示装置
KR100979098B1 (ko) 2008-06-20 2010-08-31 주식회사 동부하이텍 반도체 소자 및 이를 위한 ｏｔｐ 셀 형성 방법
JP6345107B2 (ja) * 2014-12-25 2018-06-20 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
CN108538880B (zh) * 2017-03-02 2020-11-10 旺宏电子股份有限公司 半导体元件及具有此半导体元件的装置

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Also Published As

Publication number Publication date
US6583490B2 (en) 2003-06-24
CN1368763A (zh) 2002-09-11
KR20020064627A (ko) 2002-08-09
JP2002231899A (ja) 2002-08-16
US6800527B2 (en) 2004-10-05
US20020105050A1 (en) 2002-08-08
EP1229552B1 (de) 2005-04-06
JP3846202B2 (ja) 2006-11-15
DE60109887T2 (de) 2006-02-23
TW517233B (en) 2003-01-11
EP1229552A1 (de) 2002-08-07
CN1157792C (zh) 2004-07-14
US20030146467A1 (en) 2003-08-07
KR100791905B1 (ko) 2008-01-07

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