CN1879201A - 半导体器件中的透明非晶碳结构 - Google Patents
半导体器件中的透明非晶碳结构 Download PDFInfo
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- CN1879201A CN1879201A CNA2004800329672A CN200480032967A CN1879201A CN 1879201 A CN1879201 A CN 1879201A CN A2004800329672 A CNA2004800329672 A CN A2004800329672A CN 200480032967 A CN200480032967 A CN 200480032967A CN 1879201 A CN1879201 A CN 1879201A
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Abstract
形成透明非晶碳层。该透明非晶碳层具有低吸收系数以致非晶碳在可见光中是透明的。该透明非晶碳层可以使用于半导体器件中用于不同的目的。该透明非晶碳层可以包括在半导体器件的最终结构中。该透明非晶碳层还可在半导体器件的制造期间的蚀刻处理中用作掩模。
Description
相关申请
本申请涉及以下名为“具有包括非晶碳层的多层的掩模结构”的共同未决和共同转让的申请,其代理机构卷号为303869US1、申请号为10/661100,通过引用将其结合于本文。
技术领域
本发明通常涉及半导体器件,更具体地说,涉及半导体器件中的掩模结构。
背景技术
半导体器件(如存储器件)存在于许多计算机和电子产品中来存储数据。典型的半导体器件具有在半导体晶片上形成的不同材料的许多层。
在制造期间,上述层经过许多处理。例如,形成图案的处理在层上放置图案。一些形成图案的处理使用掩模将图案从掩模转移到掩模下面的层。
一些常规的掩模是由非晶碳组成。但是,一定厚度的非晶碳掩模对于光线具有高吸收性,导致非晶碳掩模不适用于某些处理。
发明内容
本发明提供具有掩模结构的器件和用于形成掩模结构的技术。掩模结构包括具有低吸收特性的非晶碳层。非晶碳层在电磁辐射的可见光范围内是透明的。
附图说明
图1A是示出根据本发明实施例形成非晶碳层的方法的流程图。
图1B是示出根据本发明实施例的透明非晶碳层的在示例波长的吸收系数(k)对沉积温度的图形。
图1C是示出根据本发明实施例的透明非晶碳的在示例温度的吸收系数(k)对波长范围的图形。
图1D是示出根据本发明实施例的在示例温度和示例厚度的几个透明非晶碳层的穿透百分比对波长范围的图形。
图1E是示出根据本发明实施例的形成透明非晶碳层的方法的示例淀积速率对温度范围的图形。
图2-10示出根据本发明实施例在不同处理阶段中器件的截面图。
图11-19示出根据本发明实施例在不同处理阶段中存储器件的截面图。
图20示出根据本发明实施例的系统。
具体实施方式
以下描述和附图充分阐明了本发明的特定实施例以使本领域技术人员能实践本发明。其它实施例可结合结构、逻辑、电气、处理和其它变化。在附图中,图中相似的标记描述基本相似的组件。示例仅仅代表可能的变化。某些实施例的部分和特征可以包括在或用于替代其它实施例的那些部分和特征。本发明的范围涵盖权利要求书的全部范围和所有可得到的等价物。
图1A是示出根据本发明实施例形成非晶碳层的方法的流程图。方法100形成具有低吸收系数的非晶碳层,使得非晶碳层在可见光范围内是透明的。
可见光范围是具有人眼可见的光(电磁辐射)的电磁光谱范围(光学范围)。可见光范围包括具有约400nm(纳米)到约700nm(纳米)之间波长的任何光。非可见光范围是整个电磁光谱减去可见光范围后的范围。非可见光范围的一些示例包括具有约700nm到一毫米之间波长(红外光)、10nm到400nm之间波长(紫外光)以及.01nm到10nm(X射线)之间波长的电磁辐射。
在本说明书中,非晶碳层在可见光范围内是透明的,这意味着非晶碳层具有充分低的吸收系数(k),其中k在633nm波长具有约0.15到约0.001的范围。在一些实施例中,在可见光范围的非晶碳层是在从约200℃到约500℃的温度形成的非晶碳层,使得非晶碳层在633nm波长具有约0.15到约0.001之间的吸收系数(k)。
在图1A中方法100的框102,在室中放置晶片。在一些实施例中,该室是化学气相沉积室并且晶片是半导体晶片。在图1A表示的实施例中,该室是等离子体增强化学气相沉积(PECVD)室。
在框104,为根据本发明形成非晶碳层的处理设置参数。参数包括温度、混合气体、气体流速、功率和压强。室内温度设置成选择的温度。所选择的温度是从约200℃到约500℃的任何温度。在一些实施例中,温度设置在约200℃到300℃以下之间。在其它实施例中,温度设置在约225℃到约375℃之间。
在形成非晶碳层的处理中,以某流速将包括丙稀(C3H6)的处理气体引入到室内。在一些实施例中,丙稀的流速设置在约500标准立方厘米每分钟(sccm)到约3000sccm之间。还可以某流速将包括氦的附加气体引入到室内。在一些实施例中,氦的流速设置在约250sccm到约1000sccm之间。而且,实施例存在使用其它烃气的至少一种作为处理气体的情况。其它烃气包括CH4、C2H2、C2H4、C2H6和C3H8。氦也可以与这些烃气的至少一种一起使用。因此,在框104中,将混合气体引入到室内。
在本说明书中,混合气体可以仅仅是一种气体或者是至少两种气体的组合。例如,混合气体可以仅仅是丙稀(C3H6)或者是丙稀和氦的组合。作为另一示例,混合气体可以是丙稀、CH4、C2H2、C2H4、C2H6和C3H8以及氦中的至少一种。
在方法100中形成非晶碳层的处理期间,室受到射频(RF)功率和压强的控制。在一些实施例中,射频功率设置在约450瓦到约1000瓦之间,以及压强设置在约4托到约6.5托之间。
在框106中,在晶片上将非晶碳层形成为沉积层。非晶碳层在可见光范围内是透明的。在一些实施例中,通过方法100形成的非晶碳层在633nm波长具有约0.15到约0.001之间的吸收系数(k)。
因为通过方法100形成的非晶碳层在可见光范围内是透明的,所以通过方法100形成的非晶碳层也称作透明非晶碳层。因此,透明非晶碳层是指根据其中温度设置成从约200℃到约500℃的方法100形成的非晶碳层。
通过方法100形成的非晶碳层的透明度在某种程度上取决于在处理期间的温度设置。在方法100中,在较低温度形成特定厚度的非晶碳层的透明度比在较高温度形成上述特定厚度的非晶碳层更透明。例如,在方法100中,在200℃形成某厚度的非晶碳层比在500℃形成相同厚度的非晶碳层更透明。
通过方法100形成的透明非晶碳层可用于例如存储器件和微处理器的半导体器件中。例如,通过方法100形成的透明非晶碳层可以作为绝缘层或抗反射层包括在半导体器件的结构中。在另一示例中,通过方法100形成的透明非晶碳层还可在半导体器件的制造期间的蚀刻处理中用作掩模。
图1B是示出根据本发明实施例的透明非晶碳层的在示例波长的吸收系数(k)对沉积温度的图形。在一些实施例中,图1B的图形示出了根据图1A中描述的方法形成的透明非晶碳层的吸收系数。
在图1B中,曲线150示出了在633nm波长具有从约0.15到约0.001范围的吸收系数k的透明非晶碳层,其中透明非晶碳层在从约200℃到约500℃的温度形成(或沉积)。在图1B中,曲线150具有示例形状。在一些实施例中,曲线150可具有与图1B示出的形状不同的形状。
图1C是示出根据本发明实施例的透明非晶碳的在示例温度的吸收系数(k)对波长范围的图形。在一些实施例中,图1C的图形示出根据图1A中描述的方法形成的透明非晶碳层的吸收系数。
在图1C中,曲线161示出在375℃的示例温度形成的透明非晶碳的吸收系数(k)对波长范围的曲线。曲线162示出在225℃的示例温度形成的另一透明非晶碳的吸收系数对波长范围的曲线。
图1D是示出根据本发明实施例的在示例温度和示例厚度的几个透明非晶碳层的穿透百分比对波长范围的图形。在一些实施例中,图1D的图形示出根据图1A中描述的方法形成的透明非晶碳层的示例穿透百分比。
在图1D中,曲线171、172和173示出了在不同温度形成的不同厚度的三个不同非晶碳层的穿透百分比对波长范围的曲线。曲线171示出了在225℃的温度形成的3000埃厚度的透明非晶碳层的穿透百分比对波长范围的曲线。曲线172示出了在375℃的温度形成的3000埃厚度的透明非晶碳层的穿透百分比对波长范围的曲线。曲线173示出了在375℃的温度形成的7000埃厚度的透明非晶碳层的穿透百分比对波长范围的曲线。图1D示出当厚度或温度或者二者都减小时穿透增加。
图1E是示出根据本发明实施例形成透明非晶碳层的方法的示例淀积速率对温度范围的图形。在一些实施例中,图1E的图形示出了根据图1A中描述的方法形成的透明非晶碳层的示例沉积速率。图1E示出沉积速率与温度成反比。例如,在250℃的温度,沉积速率约为2800埃每分钟。在另一实例中,在400℃的温度,沉积速率约为2100埃每分钟。
图2-10示出了根据本发明的实施例在不同处理阶段中的器件200。
图2示出了包括衬底210的器件200的截面图。衬底210可以表示一部分晶片或晶片自身。晶片可以是半导体晶片比如硅晶片。衬底210还可以是在晶片上形成的结构或层。衬底210可以包括非传导材料、传导材料和半传导材料中的至少一种。非传导材料的实例包括氧化物(如SiO2、Al2O3)、氮化物(如Si3N4)和玻璃(硼磷硅酸盐玻璃-BPSG)。传导材料的实例包括铝、钨、其它金属以及金属的化合物。半传导材料的实例包括硅和具有其它材料(如硼、磷和砷)掺杂的硅。在图2所示的实施例中,衬底210包括半导体材料。
衬底210具有其中形成对准标记214的表面212。对准标记214用作衬底(晶片)210的参考点或坐标。在对准处理期间,对准标记214用来对衬底210进行对准或定位,使得衬底210上的结构和层能彼此或与衬底210精确地对准。
图3示出具有在衬底210上形成的器件结构320的器件200。器件结构320包括多层322、324和326。这些多层中的每一个可包括非传导材料、半传导材料和传导材料中的至少一个。例如,层322可以是氧化层;层324可以是金属层或具有金属和硅的化合物的层;以及层326可以是氮化层。在一些实施例中,多层322、324和326按照不同于图3所示顺序的顺序排列。多层322、324和326通过生长或沉积或通过其它已知的处理来形成。在一些实施例中,层322、324和326中的一个或多个从器件结构320中省略。在其它实施例中,与层322、324和326类似的一个或多个附加层被增加到器件结构320中。器件结构320具有厚度T3。在一些实施例中,T3至少40000埃。
图4A示出了具有在器件结构320上形成的掩模(层)430的器件200。掩模430由碳制成。在图4A所示的实施例中,该碳是非晶碳。因此,在图4A中,掩模430还被称为非晶碳层430。非晶碳层430可以通过与图1A中描述的方法100类似的方法来形成。
非晶碳层430具有厚度T4。T4可为任何厚度。在一些实施例中,T4至少4000埃。非晶碳层430具有低吸收系数,使得非晶碳层430在可见光范围内是透明的。在一些实施例中,非晶碳层430在633nm波长具有约0.15到约0.001之间的吸收系数(k)。
因为非晶碳层430在可见光范围内是透明的,所以非晶碳层430在可见光范围内基本上不吸收或反射光。因此,非晶碳层430的在可见光范围特性中的透明度在衬底210的对准期间改善了衬底210上的对准标记214(图2)的读出。而且,因为非晶碳层430在可见光范围内是透明的,所以可以不限制非晶碳层430的厚度。因此,非晶碳层430可以形成具有足够的厚度以便彻底地蚀刻器件结构320,同时允许对准标记(如对准标记214)的精确读出。
与具有比非晶碳层430更高吸收系数(或更低透明度)的常规非晶碳层来比较非晶碳层430,常规非晶碳层对于一些处理会有厚度限制。例如,一些处理会要求具有特定厚度的掩模,因为常规非晶碳层的高吸收特性,使用具有特定厚度的常规非晶碳层会致使读出对准标记困难或可导致不精确的读出。因此,因为低吸收特性,非晶碳层430在要求具有特定厚度掩模的处理中是有用的,在该处理中常规非晶碳掩模是不适用的。
器件200的非晶碳层430形成具有足够的厚度以便彻底地蚀刻器件结构(如器件结构320)。例如,非晶碳层430形成具有大于等于约4000埃的厚度T4,以便蚀刻具有大于等于40000埃的厚度T3的器件结构320。
图4B示出了具有在非晶碳层430上形成的加盖层540的器件200。在一些实施例中,加盖层540包括氧化物材料。在其它实施例中,加盖层540包括非氧化材料。在图4B中,加盖层540包括氧氮化硅(SixOyNz)或富硅氧化物(SixOy)(silicon-rich oxide),其中x、y和z是实数。在一些实施例中,加盖层540包括氢化的氧氮化硅(SixOyNz:H)或氢化的富硅氧化物(SixOy:H)。
加盖层540能通过沉积处理(如CVD和PECVD处理)形成。在一些实施例中,加盖层540与非晶碳层430在相同处理(相同的处理步骤)中一起形成,使得加盖层540在非晶碳层430上原处沉积。
图5示出了具有在加盖层540和非晶碳层430上形成的光刻胶层550的器件200。使用已知的技术形成光刻胶层550。在一些实施例中,加盖层540用作抗反射层,用于在光刻胶层550的形成图案期间降低从非晶碳层430下面的层到光刻胶层550的反射。降低反射允许光刻胶层550的更精确的形成图案。在其它实施例中,加盖层540用作对非晶碳层430形成图案的掩模。在一些其它的实施例中,加盖层540用作抗反射层和掩模。
非晶碳层430、加盖层540和光刻胶层550的组合形成掩模结构560。在一些实施例中,加盖层540从掩模结构560中省略。在其它实施例中,除了非晶碳层430、加盖层540和光刻胶层550以外,掩模结构还包括在光刻胶层550和加盖层540之间形成的附加层。附加层用作抗反射层以便进一步增强图处理性能。
图6示出了光刻胶层550形成图案之后的器件200。能使用已知的技术对光刻胶层550执行形成图案。在图6中,经图案化的光刻胶层550具有开口652。经图案化的光刻胶层550用作对加盖层540和非晶碳层430形成图案的掩模。
图7示出了掩模结构560形成图案之后的器件200。能通过一个或多个蚀刻步骤执行对掩模结构560形成图案。在一些实施例中,加盖层540和非晶碳层430在一个蚀刻步骤中一起被蚀刻。在其它实施例中,加盖层540和非晶碳层430在不同的蚀刻步骤中分别被蚀刻。如图7所示,经图案化的加盖层540和经图案化的非晶碳层430中的每一个具有与光刻胶层550的开口652连续且对准的开口。在一些实施例中,在非晶碳层430形成图案之后,掩模结构560的层430、540和550的组合可以保留并用作蚀刻器件结构320的层的掩模。在其它实施例中,在非晶碳层430形成图案之后,移除光刻胶层550或光刻胶层550和加盖层540的组合。掩模结构560的剩余的(未移除)层用作蚀刻器件结构320和衬底210中的一个或两个的掩模。
图8示出了移除光刻胶层550和加盖层540之后的器件200。在该实例中,剩余的非晶碳层430用作蚀刻一部分器件结构320或整个器件结构320的掩模。在一些实施例中,还使用非晶碳层430作为掩模来蚀刻衬底210的至少一部分。
图9示出了蚀刻器件结构320之后的器件200。蚀刻处理的结果形成了槽901。在图9的实施例中,在器件结构320的至少一部分中形成槽901。在一些实施例中,在整个器件结构320和在衬底210的至少一部分中形成槽901。
将层322蚀刻到层面(level)902。层面902是衬底210的表面212以上的任何层面。在图9的实施例中,对器件结构320蚀刻,使得蚀刻处理穿透层326和324并部分地进入层322并停止在层面902。在一些实施例中,对器件结构320蚀刻,使得层面902能在器件结构320中的任何地方。在其它实施例中,蚀刻处理穿透所有的层322、324和326并停止在衬底210的表面212或表面212以下。蚀刻处理蚀刻进入器件结构320的哪一层面取决于在对器件结构320蚀刻之后形成什么。例如,如果要形成传导互联,则器件结构320被蚀刻到某一个层面,并且如果要形成组件(如电容器),则器件结构320被蚀刻到另一个层面。
图10示出了移除非晶碳层430之后的器件100。在一些实施例中,使用具有氧等离子体的灰烬处理来移除非晶碳层430。在其它实施例中,使用具有氧等离子体和CF4的组合的灰烬处理来移除非晶碳层430。
在上面图4A到图10的描述中,在可见光范围透明的非晶碳层430包括在掩模结构560中,用作蚀刻器件结构320的掩模。在一些实施例中,非晶碳层(如非晶碳层430)也包括在器件结构320中。比如,器件结构320的层322、324和326中的一个可以是非晶碳层(如非晶碳层430)。在另一实例中,器件结构320可包括除了层322、324和326之外的附加层,其中附加层是非晶碳层(如非晶碳层430)。
在器件结构320内存在非晶碳层的实施例中,器件结构320内的非晶碳层可用于绝缘目的、抗反射目的或用于其它目的。因此,在器件结构320包括类似于非晶碳层430的非晶碳层的实施例中,在从器件200移除掩模结构560的非晶碳层430之后,器件结构320的非晶碳层仍保留在器件200中。
如图10所示在移除非晶碳层430之后,能对器件200执行其它的处理以形成组件,比如晶体管、电容器、存储单元或比如存储器件、处理器、专用集成电路或其它类型的集成电路的集成电路。
图11-19示出了根据本发明的实施例在不同处理阶段中存储器件1100的截面图。在图11中,存储器件1100包括具有在衬底1102的表面1107上形成的对准标记1104的衬底1102。在衬底1102上形成若干表面结构(栅极结构)1105(1105.1-1105.4)。在衬底1102内,形成若干扩散区1106(1106.1-1106.3)和隔离结构1107.1和1107.2。为清晰起见,图11示出在对准标记1104上没有部件形成的对准标记1104。然而,在对准标记1104上可以形成如图11所示的层的部件。
存储器件1100还包括绝缘层1130和若干贯穿绝缘层1130的触点1140(1140.1-1140.3)。每个触点1140连接一个扩散区1106。阻挡层1145把表面结构1105从绝缘层1130和触点1140分开。触点1140由传导材料制成用以提供扩散区1106的电气连接。阻挡层1145可以是氧化物或氮化物或其它非传导材料,用以避免在表面结构1105和绝缘层1130之间的材料的交叉扩散。在一些实施例中,省略了阻挡层1145。绝缘层1130提供了触点1140之间的绝缘。绝缘层1130可以是用一种或多种掺杂物(如硼和磷)掺杂的硅酸盐玻璃或其它类型的掺杂玻璃的层。例如,绝缘层1130可以是硼磷酸盐玻璃(BSG)或磷硅酸盐玻璃(PSG)。在图11的实施例中,绝缘层1130包括硼磷硅酸盐玻璃(BPSG)且具有厚度T11。在一些实施例中,T11的范围为3000埃到5000埃。
在图11的实施例中,衬底1102包括用比如硼掺杂物掺杂的硅以便使其为P型材料。扩散区用比如磷掺杂物掺杂以便使它们为N型材料。在一些实施例中,衬底1102可以是N型材料而扩散区1106可以是P型材料。
每个栅极结构1105包括若干单元:栅极绝缘层(栅氧化层)1109、掺杂多晶硅层1112、硅化物层1114、加盖介质层1116和介质衬垫1118。硅化物层1114可包括金属和硅的化合物。比如硅化钛、硅化砷及其它。在栅极结构1105中的所有介质可包括比如氧化硅的材料。每个栅极结构1105还被称作字线。使用已知的技术能形成图11的结构。
图12示出了形成绝缘层1210之后的存储器件1100。类似于绝缘层1130,绝缘层1210可以包括BSG、PSG或BPSG。图12中的绝缘层1210和其它结构形成器件结构1220。器件结构1220具有厚度T12。在一些实施例中,T12至少为40000埃。
图13示出了在器件结构1220之上形成非晶碳层之后的存储器件1100。非晶碳层1330具有低吸收系数,使得非晶碳层1330在可见光范围内是透明的。在一些实施例中,非晶碳层1330在633nm波长具有从约0.15到约0.001之间的吸收系数(k)。通过与图1A中描述的方法100类似的方法形成非晶碳层1330。
因为非晶碳层430在可见光范围内是透明的,所以可以在选择的厚度形成非晶碳层1330以便彻底地蚀刻器件结构1220,而在器件1100的对准期间基本上不影响对准标记1104的读出。非晶碳层1330具有厚度T13,能选择适当的厚度值来彻底地蚀刻器件结构1220。T13可以是任何厚度。在一些实施例中,T13至少为4000埃。
图14示出了在非晶碳层1330上形成加盖层1440和光刻胶层1450之后的器件1100。在一些实施例中,加盖层1440包括氧化物材料。在其它实施例中,加盖层1440包括非氧化材料。在图14中,加盖层1440包括氧氮化硅(SixOyNz)或富硅氧化物(SixOy),其中x、y和z是实数。在一些实施例中,加盖层1440包括氢化的氧氮化硅(SixOyNz:H)或氢化的富硅氧化物(SixOy:H)。使用已知的技术形成层1440和1450。非晶碳层1330、加盖层1440和光刻胶层1450形成掩模结构1460。在一些实施例中,加盖层1440从掩模结构1460省略。在其它实施例中,掩模结构1460还包括在光刻胶层1450和加盖层1440之间形成的附加层。该附加层用作抗反射层以便进一步增强图处理性能。
图15示出了在光刻胶层1450形成图案之后的器件1100。能使用已知的技术对光刻胶层1450形成图案。经图案化的光刻胶层1450包括开口1552。
图16示出了掩模结构1460形成图案之后的器件1100。能通过一个或多个蚀刻步骤对掩模结构1460执行形成图案。在一些实施例中,加盖层1440和非晶碳层1330在一个蚀刻步骤中一起被蚀刻。在其它实施例中,加盖层1440和非晶碳层1330在不同蚀刻步骤中分别被蚀刻。如图16所示,在形成图案之后,经图案化的加盖层1440和经图案化的非晶碳层1330的每一个包括与光刻胶层1450的开口1552连续切对准的开口。
在一些实施例中,在非晶碳层1330形成图案之后,掩模结构1460的层1330、1440和1450的组合可以保留并用作蚀刻器件结构1220的层的掩模。在其它实施例中,在非晶碳层1330形成图案之后,移除光刻胶层1450或者光刻胶层1450和加盖层1440的组合。掩模结构1220的剩余的(未移除)层用作蚀刻器件结构1220的掩模。
图17示出了在蚀刻器件结构1220之后的器件1100。在图16的实施例中,在蚀刻器件结构1220之前移除光刻胶层1450和加盖层1440。非晶碳层1330用作蚀刻器件结构1220的层的掩模。已蚀刻的器件结构1220具有开口1701。
图18示出了移除非晶碳层1330之后的器件1100。在一些实施例中,使用具有氧等离子体的灰烬处理来移除非晶碳层1330。在其它实施例中,使用具有氧等离子体和CF4的组合的灰烬处理来移除非晶碳层1330。
图19示出了使用已知技术形成其它层之后的器件1100。在每个开口1552中形成第一传导层1902(1902.1和1902.2)、第二传导层1904(1904.1和1904.2)和介质层1906(1906.1和1906.2)。传导层1902、1904,介质层1906和其它部件形成存储电容器C1和C2。例如,在存储电容器C1中,传导层1902.1、触点1140.1和扩散区1106.1形成第一电容器板极(底板极);传导层1902.2形成第二电容器板极(顶板极);以及介质层1906.1是电容器介质。在一些实施例中,传导层1904连接到存储器件1100的公共单元板极。为简单起见图19省略了公共单元板极。
存储器件1110包括存取晶体管T1和T2。栅极结构1105.2和扩散区1106.1-1106.2形成存取晶体管T1。栅极结构1105.3和扩散区1106.2-1106.3形成存取晶体管T2。存取晶体管T1和存储电容器C1形成存储CELL1。存取晶体管T2和存储电容器C2形成存储CELL2。
存储单元CELL1和CELL2在存储电容器C1和C2中以电荷的形式存储数据。电荷通过触点1140.2传送到电容器C1和C2的掺杂区1106.1和1106.3或者从该掺杂区传递出。在一些实施例中,触点1140.2是埋置的位线触点,其连接到存储器件1100的位线上。
在其它实施例中,可以在开口1701(图17)中形成具有不同于层1902、1904和1906的结构的其它部件。例如,可以在开口1552中形成互联而不是电容器板极,以便把扩散区1106连接到存储器件1100的其它部分。
存储器件1100可以是动态随机存取存储器(DRAM)器件。DRAM器件的实例包括一般称为SDRAM的同步DRAM、SDRAM II、SGRAM(同步图形随机存取存储器)、DDR SDRAM(双倍数据速率SDRAM)、DDR II SDRAM、DDR III SDRAM、GDDR IIISDRAM(图形双倍数据速率)和Rambus DRAM。存储器件1100包括其它部件,为清晰起见其未示出。
图20示出了根据本发明实施例的系统。系统2000包括室2010和置于室中的晶片2020。在一些实施例中,室2010是PECVD室以及晶片2020是半导体晶片。室2010的实例包括从Applied Materials公司(座落在Santa Clara,California)得到的Producer Processor的室。室2010和晶片2020能用于图1A描述的方法100,以根据方法100形成透明非晶碳层。
晶片2020包括若干对准标记2014和若干管芯2030。在一些实施例中,对准标记2014表示对准标记214(图2)和对准标记1104(图11)。
管芯2030中的至少一个包括根据上文图2-19描述的实施例的部件。例如,管芯2030中的至少一个包括比如器件200和1100(图2-19)的衬底、器件结构和掩模结构。因此,管芯2030的至少一个包括非晶碳层、比如根据在图2-19中描述的处理形成的非晶碳层430(图4A)和非晶碳层1330(图13)。
比如管芯2030其中之一的管芯是半导体晶片(如晶片2020)上的图案。管芯含有执行特定功能的线路。例如,管芯2030中的至少一个含有用于器件的线路,上述器件例如为处理器或如存储器件1100(图11-19)的存储器件。
结论
本发明的各种实施例提供形成透明非晶碳层的技术。透明非晶碳层能用作掩模来蚀刻器件的某种结构。非晶碳层还可为用于其它目的的器件的结构的一部分。尽管在此描述了特定的实施例,但本领域技术人员认识到其它的实施例可以替代示出的特定实施例来取得相同目的。本申请涵盖了本发明的任何修改或变化。因此,本发明仅仅受限于权利要求书和所有可得到的等价物。
Claims (112)
1.一种在处理中的器件,所述器件包含:
衬底;
在所述衬底上形成的器件结构;以及
在所述器件结构上形成的掩模结构,所述掩模结构包括非晶碳层,其中所述非晶碳层在可见光范围内是透明的。
2.如权利要求1所述的器件,其中所述非晶碳层在633纳米波长具有约0.15到约0.001之间的吸收系数。
3.如权利要求1所述的器件,其中所述可见光范围包括具有400纳米到700纳米之间波长的电磁辐射。
4.如权利要求1所述的器件,其中所述非晶碳层具有大于4000埃的厚度。
5.如权利要求4所述的器件,其中所述器件结构具有大于40000埃的厚度。
6.如权利要求1所述的器件,其中所述掩模结构还包括在所述非晶碳层上形成的氧氮化硅层。
7.如权利要求1所述的器件,其中所述掩模结构还包括光刻胶层。
8.如权利要求7所述的器件,其中所述掩模结构还包括抗反射层。
9.如权利要求7所述的器件,其中所述光刻胶层包括至少一个开口。
10.如权利要求9所述的器件,其中所述非晶碳层包括与所述光刻胶层的至少一个开口连续的至少一个开口。
11.如权利要求1所述的器件,其中所述器件结构包括从由传导材料、非传导材料和半传导材料组成的组中的材料选择的层。
12.如权利要求11所述的器件,其中所述器件结构还包括非晶碳层,其中所述器件结构的所述非晶碳层在可见光范围内是透明的。
13.一种用于器件的掩模结构,所述掩模结构包含:
非晶碳层,其中所述非晶碳层对于具有400纳米到700纳米之间波长的辐射是透明的。
14.如权利要求13所述的掩模结构,其中所述非晶碳层在633纳米波长具有约0.15到约0.001之间的吸收系数。
15.如权利要求13所述的掩模结构,其中所述非晶碳层具有至少4000埃的厚度。
16.如权利要求13所述的掩模结构,还包含光刻胶层。
17.如权利要求16所述的掩模结构,还包含在所述非晶碳层上形成的加盖层。
18.如权利要求17所述的掩模结构,其中所述加盖层包括氧氮化硅。
19.如权利要求16所述的掩模结构,其中所述光刻胶层包括至少一个开口。
20.如权利要求19所述的掩模结构,其中所述非晶碳层包括与所述光刻胶层的至少一个开口连续的至少一个开口。
21.一种在处理中的存储器件,所述存储器件包含:
具有多个掺杂区的衬底;
在所述衬底上形成的器件结构,所述器件结构包括多个栅极结构、多个触点,每个所述触点位于两个栅极结构之间并接触一个掺杂区,并且在所述栅极结构和所述触点上形成绝缘层;以及
在所述器件结构上形成的掩模结构,所述掩模结构包括非晶碳层,其中所述非晶碳层在可见光范围内是透明的。
22.如权利要求21所述的存储器件,其中所述非晶碳层具有至少4000埃的厚度。
23.如权利要求22所述的存储器件,其中所述存储器件结构具有至少40000埃的厚度。
24.如权利要求21所述的存储器件,其中所述掩模结构还包括在所述非晶碳层上形成的氧氮化硅层。
25.如权利要求21所述的存储器件,其中所述掩模结构还包括光刻胶层。
26.如权利要求25所述的存储器件,其中所述掩模结构还包括抗反射层。
27.如权利要求25所述的存储器件,其中所述光刻胶层包括所述光刻胶层的至少一个开口。
28.如权利要求27所述的存储器件,其中所述非晶碳层包括与所述光刻胶层的至少一个开口连续的至少一个开口。
29.如权利要求28所述的存储器件,其中所述绝缘层包括与所述非晶碳层的至少一个开口和所述光刻胶层的至少一个开口都连续的至少一个开口。
30.如权利要求21所述的存储器件,其中所述器件结构还包括位于所述栅极结构和所述触点之间的阻挡层。
31.如权利要求21所述的存储器件,其中所述非晶碳层在633纳米波长具有约0.15到约0.001之间的吸收系数。
32.一种系统,包含:
具有约200℃到约500℃之间温度的室;以及
置于所述室中的晶片,所述晶片包括管芯,所述管芯包括衬底、在所述衬底上形成的器件结构和在所述器件结构上形成的掩模结构,所述掩模结构包括非晶碳层,其中所述非晶碳层在可见光范围内是透明的。
33.如权利要求32所述的系统,其中所述非晶碳层具有大于4000埃的厚度。
34.如权利要求33所述的系统,其中所述器件结构具有大于40000埃的厚度。
35.如权利要求34所述的系统,其中所述掩模结构还包括在所述非晶碳层上形成的氧氮化硅层。
36.如权利要求32所述的系统,其中所述掩模结构还包括光刻胶层。
37.如权利要求36所述的系统,其中所述掩模结构还包括抗反射层。
38.如权利要求36所述的系统,其中所述光刻胶层包括至少一个开口。
39.如权利要求38所述的系统,其中所述非晶碳层包括与所述光刻胶层的至少一个开口连续的至少一个开口。
40.如权利要求32所述的系统,其中所述器件结构包括传导层。
41.如权利要求40所述的系统,其中所述器件结构还包括绝缘层。
42.如权利要求41所述的系统,其中所述器件结构还包括抗反射层。
43.如权利要求42所述的系统,其中所述器件结构还包括非晶碳层。
44.如权利要求43所述的系统,其中所述掩模结构还包括光刻胶层。
45.如权利要求44所述的系统,其中所述掩模结构还包括抗反射层。
46.如权利要求32所述的系统,其中所述至少一个管芯包括用于存储器件的线路。
47.如权利要求32所述的系统,其中所述至少一个管芯包括用于处理器的线路。
48.如权利要求32所述的系统,其中所述室是等离子体增强气相化学沉积室。
49.一种方法,包含:
在衬底上形成器件结构;以及
在所述衬底上形成掩模结构包括形成非晶碳层,其中所述非晶碳层在可见光范围内是透明的。
50.如权利要求49所述的方法,其中形成非晶碳层包括形成具有至少4000埃厚度的所述非晶碳层。
51.如权利要求50所述的方法,其中形成所述器件结构包括形成具有至少40000埃厚度的所述器件结构。
52.如权利要求49所述的方法,其中形成所述掩模结构还包括在所述非晶碳层上形成氧氮化硅层。
53.如权利要求52所述的方法,其中所述氧氮化硅层与所述非晶碳层一起在原处沉积。
54.如权利要求49所述的方法,其中形成非晶碳层包括对所述非晶碳层形成图案以形成经图案化的非晶碳层。
55.如权利要求54所述的方法,其中形成器件结构包括使用所述经图案化的非晶碳层作为掩模对所述器件结构形成图案。
56.如权利要求49所述的方法,其中形成掩模结构还包括形成经图案化的光刻胶层。
57.如权利要求56所述的方法,其中形成掩模结构还包括使用所述经图案化的光刻胶层作为掩模对所述非晶碳层形成图案。
58.如权利要求56所述的方法,其中形成器件结构包括使用所述经图案化的非晶碳层作为掩模对所述器件结构形成图案。
59.如权利要求49所述的方法,其中所述非晶碳层在633纳米波长具有约0.15到约0.001之间的吸收系数。
60.如权利要求59所述的方法,其中所述非晶碳在约200℃到约500℃的温度范围形成。
61.如权利要求49所述的方法,其中所述可见光范围包括具有400纳米到700纳米之间波长的电磁辐射。
62.一种方法,包含:
在衬底上形成器件结构;以及
在所述器件结构上形成掩模结构包括在约200℃到约500℃的温度范围形成非晶碳层。
63.如权利要求62所述的方法,其中形成所述掩模结构还包括在所述非晶碳层上形成氧氮化硅层。
64.如权利要求63所述的方法,其中所述氧氮化硅层同所述非晶碳层一起在原处沉积。
65.如权利要求64所述的方法,其中所述非晶碳层在633纳米波长具有约0.15到约0.001之间的吸收系数。
66.如权利要求62所述的方法,其中形成非晶碳层包括在约200℃到约300℃以下的温度形成所述非晶碳层。
67.如权利要求62所述的方法,其中形成非晶碳层包括形成具有大于4000埃厚度的所述非晶碳层。
68.如权利要求67所述的方法,其中形成所述器件结构包括形成具有大于40000埃厚度的所述器件结构。
69.如权利要求62所述的方法,其中形成非晶碳层在经受约4托到约6.5托的压强范围、约450瓦到约1000瓦的射频功率范围并且包括丙稀的混合气体的室中执行。
70.如权利要求69所述的方法,其中所述混合气体还包括氦。
71.如权利要求70所述的方法,其中所述丙稀以500标准立方厘米每分钟(sccm)到4000sccm之间的流速引入到所述室中。
72.如权利要求71所述的方法,其中所述氦以250sccm到1000sccm之间的流速引入到所述室中。
73.一种方法,包含:
在衬底上形成器件结构;
在所述器件结构上形成掩模结构包括形成非晶碳层,其中所述非晶碳层在可见光范围内是透明的;以及
使用所述非晶碳层作为掩模蚀刻所述器件结构。
74.如权利要求73所述的方法,其中形成非晶碳层在具有约200℃到约500℃的温度范围、约4托到约6.5托的压强范围、约450瓦到约1000瓦的射频功率范围并且包括丙稀的混合气体的室中执行。
75.如权利要求74所述的方法,其中所述丙稀以500标准立方厘米每分钟(sccm)到4000sccm之间的流速引入到所述室中。
76.如权利要求75所述的方法,其中所述氦以250sccm到1000sccm之间的流速引入到所述室中。
77.如权利要求73所述的方法,其中形成非晶碳层通过化学气相沉积处理执行。
78.如权利要求73所述的方法,其中形成所述掩模结构还包括在所述非晶碳层上形成氧氮化硅层。
79.如权利要求78所述的方法,其中所述氧氮化硅层同所述非晶碳层一起在原处沉积。
80.如权利要求79所述的方法,其中所述非晶碳层在633纳米波长具有约0.15到约0.001之间的吸收系数。
81.一种方法,包含:
形成非晶碳层,其中所述非晶碳层在可见光范围内是透明的,其中形成非晶碳层在具有200℃以上到500℃以下的温度、约4托到约6.5托的压强范围、约450瓦到约1000瓦的射频功率范围并且包括丙稀的混合气体的室中执行。
82.如权利要求81所述的方法,其中形成非晶碳层包括形成具有大于4000埃厚度的所述非晶碳层。
83.如权利要求81所述的方法,其中所述混合气体还包括氦。
84.如权利要求83所述的方法,其中所述丙稀以500标准立方厘米每分钟(sccm)到4000sccm之间的流速引入到所述室中。
85.如权利要求84所述的方法,其中所述氦以250sccm到1000sccm之间的流速引入到所述室中。
86.一种方法,包含:
在衬底上形成具有栅极结构的器件结构;
在所述器件结构上形成非晶碳层,其中所述非晶碳层在可见光范围内是透明的;
对所述非晶碳层形成图案以形成经图案化的非晶碳层;
使用所述经图案化的非晶碳层作为掩模蚀刻所述器件结构,以形成存储单元的电容器的结构;以及
移除所述经图案化的非晶碳层。
87.如权利要求86所述的方法,其中对所述非晶碳层形成图案包括:
在所述非晶碳层上形成经图案化的光刻胶层;以及
使用所述经图案化的光刻胶层作为掩模蚀刻所述非晶碳层。
88.如权利要求87所述的方法,还包含:
在形成所述经图案化的光刻胶层之前在所述非晶碳层上形成氧氮化硅层。
89.如权利要求88所述的方法,其中所述氧氮化硅层同所述非晶碳层一起在原处沉积。
90.如权利要求86所述的方法,其中移除所述经图案化的非晶碳使用氧等离子体处理来执行。
91.如权利要求86所述的方法,其中移除所述经图案化的非晶碳使用具有CF4和H2之一的氧等离子体处理来执行。
92.一种方法,包含:
在室中放置晶片,所述晶片包括具有衬底的至少一个管芯和在所述衬底上形成的器件结构;
在所述室中设置温度在约200℃到约500℃之间;以及
在所述器件结构上形成掩模结构包括形成非晶碳层。
93.如权利要求92所述的方法,其中形成所述掩模结构还包括在所述非晶碳层上形成氧氮化硅层。
94.如权利要求93所述的方法,其中所述氧氮化硅层同所述非晶碳层一起在原处沉积。
95.如权利要求94所述的方法,其中所述非晶碳层在633纳米波长具有约0.15到约0.001之间的吸收系数。
96.如权利要求92所述的方法,其中执行形成非晶碳层直到所述非晶碳层具有至少4000埃的厚度。
97.如权利要求92所述的方法,还包含:
把丙稀引入到所述室中;
在所述室中设置压强在约4托到约6.5托之间;以及
使所述晶片经受约450瓦到约1000瓦的功率。
98.如权利要求92所述的方法,还包含:
把氦引入到所述室中。
99.如权利要求98所述的方法,其中所述丙稀以500标准立方厘米每分钟(sccm)到4000sccm之间的流速引入到所述室中。
100.如权利要求99所述的方法,其中所述氦以250sccm到1000sccm之间的流速引入到所述室中。
101.如权利要求92所述的方法,其中所述室是等离子体增强气相化学沉积室。
102.一种方法,包含:
形成若干存储单元包括形成非晶碳层,其中所述非晶碳层在可见光范围内是透明的。
103.如权利要求102所述的方法,其中形成若干存储单元还包括在所述非晶碳层上形成氧氮化硅层。
104.如权利要求103所述的方法,其中所述氧氮化硅层同所述非晶碳层一起在原处沉积。
105.如权利要求104所述的方法,其中所述非晶碳层在633纳米波长具有约0.15到约0.001之间的吸收系数。
106.如权利要求102所述的方法,其中非晶碳层有至少4000埃的厚度。
107.如权利要求102所述的方法,其中形成若干存储单元包括:
形成若干晶体管;以及
形成具有电容器板极的若干电容器。
108.如权利要求107所述的方法,其中所述电容器板极在使用所述非晶碳层蚀刻所述晶体管的栅极结构上的绝缘层之后形成。
109.如权利要求108所述的方法,其中所述层在具有约200℃到500℃的温度范围、约4托到约6.5托的压强范围、约450瓦到约1000瓦的射频功率范围并且包括丙稀的混合气体的室中完成。
110.如权利要求109所述的方法,其中所述混合气体还包括氦。
111.如权利要求110所述的方法,其中所述丙稀以500标准立方厘米每分钟(sccm)到4000sccm之间的流速引入到所述室中。
112.如权利要求112所述的方法,其中所述氦以250sccm到1000sccm之间的流速引入到所述室中。
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US7298024B2 (en) | 2007-11-20 |
TWI262551B (en) | 2006-09-21 |
US20060244086A1 (en) | 2006-11-02 |
US7132201B2 (en) | 2006-11-07 |
US20060003237A1 (en) | 2006-01-05 |
US7220683B2 (en) | 2007-05-22 |
TW200518209A (en) | 2005-06-01 |
WO2005034229A1 (en) | 2005-04-14 |
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