CN1100329C - 多层电子部件及其制造方法 - Google Patents
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Abstract
构成基本上为矩形平行六面体形状的多层电子部件,它有把线圈导体和用磁性或非磁性材料制成的生板叠置而构成的多层体。终端电板沿垂直于电流流过多层体中的线圈导体而产生的磁力线方向分别设置在多层体的两端。终端电极是只形成在多层体的两个端面上的导电薄片,与多层体成为一体。
Description
发明领域
本发明涉及多层电子部件及其制造方法,所述多层电子部件包括:叠置线圈导体和磁性或非磁性材料而构成的电感器。和把电容器插到电感器上端构成的滤波器,谐振器等等。
背景技术
常规的多层电子部件按下述方式构成。如图10A所示的膜层结构,在磁性或非磁性材料薄层1上形成线圈导体2,并在其中还形成有通过孔3,把有这种结构的薄层叠置。焙烧这样制成的组件,之后再切割成芯片。如图1 1A所示,把这些芯片4加压填入支承板5例如硅板中形成的通孔5a中,之后,把两边浸入银浆6中。这些芯片4焙烧后镀覆例如Ni或锡(Sn),形成终端电极7。如图10B所示,这样制成的常规电子部件中,两个终端电极沿垂直于电流流过线圈40而产生的磁力线方向X的方向分别设置在两端。此外,每个终端电极7必须有部分7a伸出边缘并覆盖终端附近的侧边的这些部分。
但是,有上述结构的电子部件存在以下问题。当该电子部件10安装在印刷电路板9上时,制成的包括印刷电路板9的磁路改变磁阻,其它性能与电子部件10的安装形式,使磁力线方向X垂直于印刷电路板9的平面,如图10C所示,或与电子部件10安装成使磁力线X的方向X平行于印刷电路板9的平面,如图10D所示。当用的电子部件10例如是用低导磁率材料的高频小电感器时,该性能的特别显著地变化可归因于电子部件10安装到印刷电路板9上的安装方式所致。
为克服上述问题,日本特许公开JP-A-8-55726公开了一种电子部件,它有在以后的步骤中用浸渍并沿电流流过多层结构中的线圈导体而产生的磁力线方向分别设置于两端构成的终端电极7。如图11B所示的剖视图和图11C所示的斜面图。
但是,有在随后的步骤中形成的终端电极7的多层电子部件存在以下问题。如图1D所示,由于终端电极7之间的距离L1有明显的波动,不仅性能明显地波动,而且合格率低,而且,所用的终端电极7还有称作尖角的凸点7b的缺陷。由于存在这些缺陷,L2的尺寸也不稳定。因此,当按成批存储的电子部件10经过有适合于电子部件10的尺寸的宽度的管道11输送并安装成行时,如图11E所示,由于有凸点7b因而引起一些电子部件10倾斜,并以倾斜状态安装到印刷电路板7上。
发明内容
本发明的目的是,提供一种电子部件,以减小安装到印刷电路板上时的性能波动,并提高其终端电极之间的距离精度,因此能提高合格率、在其成批存储后能令人满意地进行安装。
本发明的另一目的是,提供电子部件的制造方法。
按本发明的基本上是矩形的平行六面体多层电子部件包括线圈导体;多个薄板,其中每个薄板包括磁性或非磁性材料,线圈导体与薄板叠置构成多层电子部件中的线圈;多层体的两端设置终端电极,其中,线圈导体和薄板按电流流过多层体中的线圈导体时产生的磁力线方向叠置,终端电极由多层体的导电层构件构成。
按本发明的多层电子部件中,终端电极只构成在多层结构的两个端表面上,并伸出侧表面。而且,消除了因从端表面伸向侧表面的凸出部分而造成的终端电极距离波动。结果,能减小其性能波动。此外,由于终端电极是叠层体的导电层构件的构件,因此,在浸渍方法中多层电子部件不产生凸点,提高了尺寸精度。而且,在把电子部件安装到印刷电动板用的自动安装机中,可把电子部件按行排列在安装机的通道内,而没有倾斜地安装到衬底上。
按本发明的多层电子部件的制造方法中,在切割叠层体的同时构成终端电极。
附图说明
图1A是按本发明的电子部件的一个实施例的相当于一个芯片的层结构的透视图;
图1B和1C分别是制成的电子部件的剖视图和透视图;
图1D是安装到印刷电路板上的电子部件的平面图;
图1E是用另一边作安装边安装在印刷电路板上的电子部件的平面图;
图1F是各图形中的电抗波动结果图;
图2是用于制造上述实施例中的多个芯片的层结构透视图;
图3A是上述实施例用的叠置薄板构成的组件的透视图;
图3B是按本发明的电子部件另一实施例的透视图;
图3C是按本发明的电子部件另一实施例的剖视图;
图4A是常规电感器和作为按本发明的电子部件实施例的电感器的的频率特性图;
图4B是按本发明的电子部件的另一实施例的透视图。
图5是相当于作为本发明电子部件又一实施例的一个芯片的层结构透视图;
图6是用于制造图5所示实施例的多个芯片的层结构的透视图;
图7是按本发明电子部件与用常规浸渍法制造的电子部件之间柔软强度比较的测试结果曲线;
图8A是按本发明的另一实施例的剖视图;
图8B是图8A所示实施例的等效电路图;
图8C是另一实施例的剖视图;
图8D是图8C所示实施例的等效电路图;
图9A是按本发明又一实施例的剖视图;
图9B是图9A所示实施例的等效电路图;
图9C是又一实施例的剖视图;
图9D是图9C所示实施例的等效电路图;
图10A是常规电子部件的多层体的透视图;
图10B是图10A的剖视图;
图10C和10D分别是常规电子部件在印刷电路板上的安装表面变化时的状态的透视图;
图11A是常规终端制造方法的剖视图;
图11B是常规电子部件另一例的剖视图;
图11C是图11B的透视图;
图11D是说明常规电子部件尺寸波动的侧视图;
图11E是电子部件在管道中排列状态的平面图;
图11F是展示本发明的电子部件在管道中的排列状态的平面图。
具体实施方式
图1A是相当于作为按本发明电子部件的一个实施例的一个芯片的层结构透视图;图1B和1C分别是制成的电子部件的剖视图和透视图,图1D是安装到印刷电路板上的电子部件的平面图。图2是用于制造该实施例的多个芯片的层结构透视图。图3A叠置薄板构成的组件的透视图。以图1A所示层结构为基础,电子部件的本实施例制造如下。
在低导磁率的非磁性材料构成的生板1上印刷如图所示的U(3/4匝)形或L(1/2匝)形的例如银或银合金构成的线圈导体2。再在这些生板1的每一生板中形成通孔3,如图1A所示,把每个生板1的线圈导体2的端部连接到相邻生板1上的线圈导体2的端部。并用导电浆料填充这些通孔3。
为了用于高频而减小分布电容量,最好用相对导磁率为30以下的材料制造生板1。材料包括:氧化铝、堇青石、和低导磁率玻璃等。但是,该实施例用由锶,钙,氧化铝和氧化硅制成的70wt%的玻璃和30wt%的氧化铝构成的陶瓷制成的陶瓷生板。印刷宽度为60μm和厚度为10μm的图形,构成每个线圈导体。
在其中形成有通孔3的最外边的生板1上形成终端电极20用的金属箔。终端电极20用的金属箔和可剥离膜21叠置在另一最外边的生板1上。金属箔20用银,银合金,镍等制成。可能存在以下情形,每个生板只有通孔3的一个以上的生板1放置在金属箔制成的终端电极20与有线圈导体2的生板1之间,或位于有金属箔制成的终端电极20的生板1与有线圈导体2的生板1之间。
如图3A所示,这样制成的生板1和膜21叠置并加压。之后,剥去膜21。制成的组件沿图2和3A所示虚线22切割,之后,焙烧,由此获得各多层体24,用填入通孔3中的导体互连各层上的线圈导体,如图1B和1C所示,线圈40的每一端经通孔3中引出的导体29连到终端电极20。
如果需要,切割成各个芯片后对每个芯片的终端电极20电镀例如铜,镍,锡,镍和锡或镍和锡铅,形成镀层23,构成多个电极上的这些构件,如图1B所示。
按上述的形成终端电极20的步骤,能制成电子部件,其中,终端电极20沿电流流过多层体24中的多个线圈而产生的磁力线方向分别设置在两端。按该结构,终端电极20构成在多层体24的端表面区内。因此,终端20之间的距离由多层体24的宽度确定。结果,能消除常规浸渍法中因接收导电浆料而引起的终端电极覆盖区的尺寸波动。因此,能减小性能波动并提高合格率。
用上述叠置步骤,或用印刷法在叠层体上叠加,或叠置步骤之后再粘接等方法形成终端电极20。因此,能高精度地构成终端电极20,并电镀5μm厚的锡层23。而且不会形成常规浸渍法中形成的凸出部分7b。由于提高了有上述结构的电子部件的尺寸精度,因此可以无倾斜或定位缺陷的按好的顺序安装电子部件,高电子部件成批储存后能按行排列在自动安装机的管道中,如图11F所示。
本实施例中,如图1D所示,多层体24有垂直于线圈导体2产生的磁力线方向的正方形截面。因此,即使在电子部件安装中多层体的任何一边对着印刷电路板9,磁力线轴与印刷电路板之间的距离也总是恒定不变,因此,能减小由于安装边的不同而引起的性能波动。
而且,如图1C和1D所示,多层体24中的螺线起始点“a”和螺线终点“b”位于垂直于磁力线方向的矩形截面的对角线上,两点的位置与多层体24的这些矩形截面的中心对称。因此,如图1E所示,即使多层体24的另一边用作安装边,电子部件的性能也变化很小。因此,不必注意选择安装边,使安装容易。
以下说明性能波动。电感器有图10B至10D所示常规结构,其尺寸为1.01mm×1.0mm×0.5mm,和标称电感量3.3nH时,用不同的安装边安装到印刷电路板9上引起的阻抗变化平均值是11.21%。另一方面,有按本发明结构的电子部件中,其中每个线圈导体2的螺线起始点“a”和螺线终点“b”均位于垂直于磁力线方向的矩形截面中的对角线上,除其中心之外。从平行于磁力线的方向观察时,点“a”和“b”在同一位置,用不同的安装边引起的阻抗变化平均值是3.92%。即,能明显减小性能波动,并能不仔细选择安装边而进行安装。如图1D和1E所示,当按本发明的电子部件中“a”和“b”点相对于矩形截面的中心D对称时,用不同的安装边所引起的阻抗变化为2.2%。因此,能大大降低用安装边改变造成的性能波动。
把线圈40的螺线起始点“a”和螺线终点“b”,即引出导体29的位置变成各种位置,检测由其安装位置变化引起的阻抗波动。该检测中,每个位置用5个样品,结果在图1F中画出。
从图1F看出,在“B”的情况下,位置“a”和“b”处于中心,由安装表面变化引起的波动比最小。之后,在“c”和“D”的情况下,位置“a”和“b”位于对中心对称和线圈剥离部分里边的位置,变化比小。但是,在“E”的情况下,“a”和“b”处于同一位置,波动比是“a”和“b”位置对称,并处于靠近角附近的“A”情况下的波动比的两倍。因此,按位置“a”和“b”的位置或相对位置,使因安装表面变化引起的阻抗波动比变大,其原因是由于安装表面和位置“a”之间及安装表面和位置“b”之间的总变化量变大,使安装表面的变化变大。
图3B示出按本发明电子部件的另一实施例。该实施例中,有终端电极20的每一端有在其中心不构成终端电极20的区域。按该实施例,所获得的电感器或谐振器,其性能与空心线圈因没形成终端电极20的区域26引起的性能很相同。
图4A展示出有沿垂直于图10所示磁力线方向分别设置在两端的终端电极7的常规电感器中的分布电容量与自谐振频率之间的关系曲线,是本发明实施例的电感器有沿磁力线方向在两端表面上的终端电极25如图1B和1C所示。作为本发明另一实施例的电感器有每一端上不形成终端电极20的区域26。如图3B所示;三个电感器的标称电感量均为33.0nH。常规电感器,即图1B和1C,图3B所示实施例的自谐振频率分别是2.0GHz;6.4GHz、和7.8GHz。这些结果证明,能按本发明制成适用于较高频率的电感器和谐振器。并发现,图3B所示实施例特别适用于高频。
图5是按本发明的一个芯片多层体的另一实施例。本实施例中,如图图6所示,用导电生板20A,因此,终端电极20作为烧成的多层体的一部分而整体构成。用16.7vol%银粉作导体粉,18.8vol%的玻璃粉作绝缘粉和64.5vol%的赋形剂和合成树脂粘接剂混合,使烧结后的厚度为120μm,由此把导电生板20A制成膜。
作为导电粉的银粉含量最好在7.20vol%至24.47vol%范围内,作为绝缘粉的玻璃粉的含量范围最好是0.49vol%到43.97vol%,赋形剂的含量范围最好是48.83vol%至75.94vol%。
作为导电粉的银粉含量在10.61vol%至20.20vol%,绝缘粉的玻璃粉含量在11.22vol%至35.37vol%,赋形剂的含量在54.02vol%至68.58vol%更好。
而且,导电薄板烧结后的组分变成47.0vol%的银和53.0vol%的玻璃作为绝缘粉。只有其中填有线圈引出导体的通孔3的一个以上的薄板叠置在导电生板20A与线圈导体2之间。
把这样制成的导电生板20A和薄板1,1A叠置并加压,并在切割成各芯片之后对其烧结。
随后,对每个芯片的终端电极20电镀铜,镍,锡,或镍和锡,或镍和锡-铜,形成镀层23,构成每个电极20上的这些构件,如图1B所示。
比较按本发明实施例的图5和图6所示电子部件的外部尺寸与用常规浸渍法制成的电子部件的外部尺寸,各部件的终端20的相对方向的长度。结果,常规电子部件中,长度的平均值是0.5286mm,ρ(离差)为0.0072mm,另一方面,本实施例中,长度平均值是0.5271mm,离差ρ是0.0041mm。而且本发明显著减小了尺寸波动。
就有突出部分7a的常规电子部件而言,其中在烧结切割芯片之后用浸渍法制成终端电极,另一个无凸出部分7a的常规电子部件,其中,烧结切割芯片后用浸渍法制成尺寸精确的终端电极,按本发明的电子部件,测试弯曲强度并相互比较。关于弯曲强度,在样品焊到测试板上之后,从测试板背面加机械负荷,直到样品破坏时确定测试板的弯曲量,以此确定弯曲强度。
弯曲强度测试结果展示于图7中。从图7发现,对本发明的实施例而言,即,用叠置和烧结导电薄板把终端电极20构成为烧结叠层体,导电薄层厚度用作凸出部分7a。因此,与没有凸出部分7a的常规电子部件相比,本发明的电子部件的弯曲强度增大,并与有凸出部分7a的常规电子部件的弯曲强度相同。
而且,图5和图6所示实施例中,可单独用Ag,Ag合金,Au,Pt,V等,或两种以上的上述金属组合作为制造薄板20A的导电粉。薄板20A中的绝缘粉,除上面列出的材料外还能单独用In,Pb,Si,B,Bi,Mn,Y等的氧化物,或将其中的两种以上的氧化物组合使用。
如图3C所示,本发明还能用于经介质体27设置在多层体中的相对电极33的情形,以构成电容器28;使电容器28串联到线圈40,构成谐振器。而且,按本发明,可制成把多个线圈连接到理入的电容器中的结构。
图4B中示出按本发明的电子部件的又一实施例。本实施例中,多层体24中有排列成行的两组以上的线圈40。每组线圈40的两端连接到多层体两端上形成的各终端电极20。这种情况下还能获得提高尺寸精度和减小性能波动的效果。而且,有这种结构的电感器与分别制造的相同数量的电感器所需的安装空间小。图4B所示的结构能改变成如图3C所示结构的包括一个以上的埋入电容器的结构。
图8(A)展示出本发明的又一实施例,一个引出导体29与终端电极20A3之间设置有露在多层体24四周之外的介质体27和中间的终端电极20A2。因此,电容器28可由中间电极20A2,终端电极20A3和介质层27构成。中间的终端电极20A2有垂直于线圈40中产生的磁力线方向的表面。
如图8B所示,终端电极20A1和中间的终端电极20A2可用作输入和输出端,终端电极20A3用作接地端,因此,图8A所示部件可用作L型滤波器。
图8A所示结构中,例如,除了在生板上印刷线圈导体2之外,还有如图6所示的有通孔3的生板1A和终端电极导电生板20A、在有通孔3的生板1A与上下终端电极导电生板20A中的一生板之间,设置有用于构成电容器的由形成电容器电极(即中间的终端电极20A27用的导体生板和构成介质体27的生板组成的叠层板部分。
图8C是本实施例的剖视图,图8D是其等效电路图。本实施例中,多层体24两端设置的终端电极20A4与20A7之间在线圈40的两端分别设置中间的终端电极20A5和20A6。并分别在中间的终端电极20A5与20A6之间和终端电极20A4和20A6之间设置介质体27。构成电容器28,以构成π型滤波电路。
而且,图9A示出本发明又一实施例的剖面图,图9B是其等效电路图。在终端电极20A4和中间的终端电极20A5之间,和终端电极20A7和中间的终端电极20A6之间设置两对电极33。电极33经引出导体30分别连接到终端电极20A4和20A7。
这种情况下,把电容器电极33,33之间的距离和电极33的面积设置成使电容器28有规定的电容量。而且,不必改变芯片尺寸就能制成有各种性能的滤波器和谐振器。而且,这种结构中,终端之间设置的电容器的内电极33也可用于图8A所示的电容器只设置在一端的情况下。
图9C是本发明又一实施例的剖视图,图9D是其等效电路图。本实施例中,终端电极20A8与20A10之间设置有中间的终端电极20A9,在中间的终端电极20A9的两边设置线圈40,40。线圈40之一的一端设置构成电容器28的内电极34,并使其与中间的终端电极20A9相对。内电极34与线圈40之一经引出导体29相连接。内电极34经设置在贯穿中间的终端电极20A9作为通孔而构成的非导体部分31中的贯穿导体部分32连接到另一电极40。本实施例中,构成图9D所示T型滤波器。
按本发明,为了获得电感量增大的电子部件,用诸如铁氧体的磁性元件作薄板1。而且,不使用薄板法也可以用印刷法制成多层体。
按本发明,如图1F所示,引出位置29,即,剥离的起始点“a”和剥离终点“b”可用于线圈40连到电容器28和另一线圈40在多层体中的情形。
Claims (11)
1、基本上为矩形平行六面体形状的多层电子部件,包括:
线圈导体(2);
多个薄板(1),每一个薄板包括磁性或非磁性材料,所述线圈导体和所述薄板叠置,构成所述多层电子部件中的线圈,
设置在多层体(24)两端上的终端电极(20),其中,所述线圈导体和所述多个薄板沿电流流过所述多层体中的所述线圈导体而产生的磁力线方向叠置;其特征在于:
所述终端电极是只形成在所述多层体的两个端面上的导电薄板,与所述多层体成为一体。
2、按权利要求1的多层电子部件,还包括至少一个电容器部分(28),该电容器部分包括电容器电极(33)和介质体(27);
其中,所述多层体和所述电容器部分纵向连续叠置。
3、按权利要求1的多层电子部件,还包括形成垂直于磁力线方向的平面的至少一个中间的终端电极(20A2),所述中间的终端电极的周边露在所述多层体的周边以外。
4、按权利要求3的多层电子部件,其中,中间的终端电极还用作电容器电极。
5、按权利要求3的多层电子部件,还包括:
设置在中间的终端电极(20A9)中的非导电部件(31);
设置在所述非导电部件中的贯穿导电部件(32),用于连接所述中间的终端电极两个相对边的导电部件。
6、按权利要求1的多层电子部件,其中,所述多层体有垂直于磁力线方向的正方形截面。
7、按权利要求1的多层电子部件,其中,所述多层体中所述线圈导体的螺线起始点(a)和螺线终点(b)位于垂直于磁力线方向的矩形截面中心,或位于相对中心而彼此对称的位置。
8、按权利要求1的多层电子部件,还包括:在所述多层体中纵向排列的多个线圈;其中,所述终端电极直接连接到所述的多个线圈,或经电容器连接到每个线圈。
9、按权利要求1的多层电子部件,其中,所述终端电极是电镀形成的。
10、制造多层电子部件的方法,包括以下工艺步骤:
按垂直或水平方向叠置其上形成有作为多个线圈的构件的L形或U形线圈导体(2)的薄板(1),经每个薄板中形成的和用导电材料填充的通孔(3)互连以按上下方向调节线圈导体;
同时,经由具有通孔(3)的薄板在多个薄板的上部和下部叠置作为终端电极(20)的导体薄板,所述通孔中填充有各个线圈导体的引出部分的导电材料;
压配合全部的多个薄板;
此后,把加压后的这些薄板切割成芯片状的各个线圈;和
烧结切割出的线圈,获得有作为所述多层电子部件的端面的终端电极的多层电子部件。
11、按权利要求10的方法,其中,在至少是在形成终端电极的导电层的顶部和底部之一与有电导材料填充的通孔的薄板之间设置有形成电容器电极(20A2)用的导电薄板和形成叠置薄板(27)的电容器的条件下给多个薄板加压。
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JP310310/1996 | 1996-11-21 | ||
JP310310/96 | 1996-11-21 | ||
JP31031096 | 1996-11-21 | ||
JP11730697 | 1997-05-07 | ||
JP117306/97 | 1997-05-07 | ||
JP117306/1997 | 1997-05-07 | ||
JP28416497A JP3438859B2 (ja) | 1996-11-21 | 1997-10-17 | 積層型電子部品とその製造方法 |
JP284164/1997 | 1997-10-17 | ||
JP284164/97 | 1997-10-17 |
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Publication Number | Publication Date |
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CN1191376A CN1191376A (zh) | 1998-08-26 |
CN1100329C true CN1100329C (zh) | 2003-01-29 |
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CN97126397A Expired - Lifetime CN1100329C (zh) | 1996-11-21 | 1997-11-21 | 多层电子部件及其制造方法 |
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US (2) | US6147573A (zh) |
EP (1) | EP0844625B1 (zh) |
JP (1) | JP3438859B2 (zh) |
CN (1) | CN1100329C (zh) |
DE (1) | DE69719680T2 (zh) |
MY (1) | MY119340A (zh) |
NO (1) | NO975338L (zh) |
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CN104575987B (zh) * | 2013-10-11 | 2018-11-20 | 新光电气工业株式会社 | 线圈基板及其制造方法、以及电感器 |
Also Published As
Publication number | Publication date |
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DE69719680T2 (de) | 2003-08-14 |
NO975338L (no) | 1998-05-22 |
US6147573A (en) | 2000-11-14 |
US6568054B1 (en) | 2003-05-27 |
EP0844625A2 (en) | 1998-05-27 |
CN1191376A (zh) | 1998-08-26 |
EP0844625B1 (en) | 2003-03-12 |
MY119340A (en) | 2005-05-31 |
JPH1126241A (ja) | 1999-01-29 |
NO975338D0 (no) | 1997-11-20 |
EP0844625A3 (en) | 1999-02-10 |
JP3438859B2 (ja) | 2003-08-18 |
DE69719680D1 (de) | 2003-04-17 |
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