CN102812520A - 导电性糊料和由该糊料得到的导电连接部件 - Google Patents
导电性糊料和由该糊料得到的导电连接部件 Download PDFInfo
- Publication number
- CN102812520A CN102812520A CN201180014310.3A CN201180014310A CN102812520A CN 102812520 A CN102812520 A CN 102812520A CN 201180014310 A CN201180014310 A CN 201180014310A CN 102812520 A CN102812520 A CN 102812520A
- Authority
- CN
- China
- Prior art keywords
- quality
- conductive paste
- metal
- organic solvent
- binding agent
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
- B23K35/02—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
- B23K35/0222—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape for use in soldering, brazing
- B23K35/0244—Powders, particles or spheres; Preforms made therefrom
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
- H01B1/00—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
- H01B1/20—Conductive material dispersed in non-conductive organic material
- H01B1/22—Conductive material dispersed in non-conductive organic material the conductive material comprising metals or alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3485—Applying solder paste, slurry or powder
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/034—Manufacturing methods by blanket deposition of the material of the bonding area
- H01L2224/03444—Manufacturing methods by blanket deposition of the material of the bonding area in gaseous form
- H01L2224/0345—Physical vapour deposition [PVD], e.g. evaporation, or sputtering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04026—Bonding areas specifically adapted for layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05644—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
- H01L2224/1131—Manufacturing methods by local deposition of the material of the bump connector in liquid form
- H01L2224/1132—Screen printing, i.e. using a stencil
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/13198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/13199—Material of the matrix
- H01L2224/1329—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/13198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/13298—Fillers
- H01L2224/13299—Base material
- H01L2224/133—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/165—Material
- H01L2224/16505—Material outside the bonding interface, e.g. in the bulk of the bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/273—Manufacturing methods by local deposition of the material of the layer connector
- H01L2224/2731—Manufacturing methods by local deposition of the material of the layer connector in liquid form
- H01L2224/2732—Screen printing, i.e. using a stencil
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29199—Material of the matrix
- H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/325—Material
- H01L2224/32505—Material outside the bonding interface, e.g. in the bulk of the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
- H01L2224/486—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48638—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/48644—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8112—Aligning
- H01L2224/81121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81192—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/812—Applying energy for connecting
- H01L2224/81201—Compression bonding
- H01L2224/81203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/8184—Sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/832—Applying energy for connecting
- H01L2224/83201—Compression bonding
- H01L2224/83203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8384—Sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01014—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01028—Nickel [Ni]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2924/15738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
- H01L2924/15747—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3512—Cracking
- H01L2924/35121—Peeling or delaminating
Abstract
本发明提供导电性糊料,其用于形成空穴(空隙)的不均匀分布少、不存在粗大空隙和裂纹、热循环特性提高、且抗裂性和接合强度优异的导电连接部件。一种导电性糊料,其特征在于,其包含50质量%~85质量%的金属微粒(P)和50质量%~15质量%的由有机溶剂(S)构成或者由有机溶剂(S)与有机粘结剂(B)构成的有机分散介质(D)(质量%的合计为100质量%),所述金属微粒(P)由金属微粒(P1)和金属微粒(P2)构成,所述金属微粒(P1)由选自金属和合金的1种或2种以上构成且平均一次粒径为1nm~150nm,所述金属微粒(P2)与金属微粒(P1)为同种金属且平均一次粒径为1μm~10μm,其混配比例(P1/P2)为80质量%~95质量%/20质量%~5质量%(质量%的合计为100质量%)。
Description
技术领域
本发明涉及用于半导体元件、电路基板等的接合的导电性糊料以及对该导电性糊料进行加热处理而得到的导电性凸块、导电性芯片焊接部等导电连接部件。
背景技术
近年来,为了实现电子设备的高功能、高性能化和小型化,半导体安装技术的高密度化得以推进。作为半导体元件彼此的接合、半导体元件与电路基板的接合方法的代表性技术,可以举出引线接合技术(WB)、作为无引线接合技术的卷带式自动接合技术(TAB)和倒装芯片焊接技术(FCB)。作为高密度地安装计算机设备等半导体装置的技术,多使用能够最高密度化的倒装芯片焊接技术。
倒装芯片焊接将形成于半导体元件等上的凸块(突起状物)接合到电路基板等,该凸块的形成主要采用了镀覆法。
在利用镀覆法形成凸块时,能够形成微细的图案,虽然尝试了通过条件设定来控制凸块高度,但存在无法避免凸块的高度多少产生偏差的问题。为了防止电极的接触不良,作为针对这样的凸块高度的偏差的对策,还可以采用通过接合时的加压单元而使全部凸块密合的方法,但若过度加压则凸块内部有可能残存变形、或者耐热应力有可能降低从而导致破损。因此,优选形成具有在加压时容易使金属制的微细图案连接用凸块的结构变形的柔软性的结构。
另外,利用镀覆法形成的凸块存在据认为是在使用过程中因疲劳破坏而引起的裂纹的发生、断裂的问题。在倒装芯片焊接中,若半导体元件的构成材料与安装到半导体元件的电路配线基板之间的构成材料不同,则因热膨胀系数的不同而使焊料凸点电极产生应力变形。该应力变形会破坏焊料凸点电极,使可靠性寿命降低。作为解决这样的问题的手段,已知对包含金属微粒的导电性糊料进行烧制而形成的多孔质体。
专利文献1公开了一种凸块,其作为用于在基板上电连接导体配线电路和基板的连接用凸块,通过对金属颗粒的平均粒径为0.1μm~50μm的金属微粒进行烧结而获得,其由多孔质金属构成,其密度为块状金属的0.2倍~0.9倍。
专利文献2提出了一种凸块,其中,使用于凸块的材料由多孔质、比较柔软且具有弹性的烧结体构成。通过使凸块具有弹性,即使凸块高度存在偏差,多孔质体也可以通过加压而产生收缩,能够接合。另外,内部残存变形的情况少,耐热应力的降低也少。
专利文献3公开了一种接合方法,其中,在第一金属层与第二金属层之间夹杂由第三金属构成的多孔质金属层,在第一金属层与该多孔质金属层之间以及第二金属层与该多孔质金属层之间设置将平均直径为100nm以下的金属超微粒分散于有机系溶剂中而成的金属纳米糊料,并通过加热接合。
专利文献4公开了一种凸块,其在设置于基板上的光致抗蚀剂层的微孔内设置了镀金层(第1凸块层、高度:10μm),在其上滴加金糊料作为金属糊料,填充后进行烧结,制成烧结体(第2凸块层)。
专利文献5公开了一种铁素体多孔体的制造方法,其中,将升华性物质完全溶解于有机溶剂中,从微孔向水中喷出该溶解液,使升华性物质的微粒析出,并将所得到的微粒添加到铁素体粉体中进行混合,成型后进行烧制。
现有技术文献
专利文献
专利文献1:日本特开2003-174055号公报
专利文献2:日本特开2005-216508号公报
专利文献3:日本特开2006-202944号公报
专利文献4:日本特开2009-302511号公报
发明内容
发明所要解决的课题
将上述专利文献1公开的微米尺寸(指1μm以上且小于1000μm的尺寸、以下相同)的金属颗粒烧结而得到的金属多孔质体与纳米尺寸(纳米尺寸是指小于1μm的尺寸、以下相同)的金属多孔质体相比,耐热应力低,因此存在热循环特性相对不充分的问题。即,上述专利文献1所具体公开的多孔质体为在微米尺寸的金属颗粒的结合体之间存在微米尺寸的空穴的结构。
根据金属材料中的裂纹(龟裂)的传播理论,裂纹被认为是空穴,已知空穴尺寸足够小时,即使施加较大的应力,空穴(裂纹)也不扩大(参照日本材料学会编、疲劳设计便览、1995年1月20日、养贤堂发行、148页~195页)。这种情况下,推测例如具有纳米尺寸的空穴的凸块与具有微米尺寸的空穴的凸块相比,具有约100倍左右的耐应力性。
在应用上述专利文献2公开的由烧结体构成的凸块时,不存在上述问题,但为了使凸块具有弹性,安装时可能产生横向的变形,有时会损害凸块间隔(间距)。
在对上述专利文献3和专利文献4公开的由纳米尺寸构成的金属微粒进行烧结时,存在以下问题:至烧结温度附近为止,固体粉末残存,由分散介质产生的气体进入,由此容易形成粗大空隙,容易形成膨胀和裂纹。
若半导体元件与插入器的连接结构部即芯片焊接部的粘接性低,则半导体元件的背面或插入器连接端子与导电性芯片焊接部的粘接界面有时会因机械应力(外部应力、内部应力)或物理应力(热应力)而部分剥离、或者完全剥离。
对于具有优异的热循环特性的导电性凸块、导电性芯片焊接部等导电连接部件,优选对含有纳米尺寸的金属微粒的导电性糊料进行烧制,制成该微粒的表面结合的同时形成了纳米尺寸的空穴的多孔质体,导电性糊料中,若金属微粒不均匀分布,或者加热处理时有机分散剂蒸发或热分解而产生的气泡成长,在多孔质体内部形成粗大空隙或裂纹,则机械强度和热循环特性显著降低。
用于解决课题的方案
鉴于上述现有技术,本发明人发现:在导电性糊料中,通过在平均一次粒径为1nm~150nm的导电性金属微粒中以一定比例混配与该微粒为同种金属且平均一次粒径为1μm~10μm的导电性金属微粒,并且使用具有还原性的有机溶剂作为有机分散介质,可以得到空穴(空隙)的不均匀分布少、不存在粗大空隙和裂纹、接合强度优异的导电性凸块、导电性芯片焊接部等导电连接部件,由此完成了本发明。
即,本发明的要点在于以下的(1)~(17)中记载的方案。
(1)一种导电性糊料(下文中有时称为第1方式),其特征在于,其包含金属微粒(P)和由有机溶剂(S)构成或者由有机溶剂(S)与有机粘结剂(B)构成的有机分散介质(D),金属微粒(P)与有机分散介质(D)的混配比例(P/D)为50质量%~85质量%/50质量%~15质量%(质量%的合计为100质量%),所述金属微粒(P)由金属微粒(P1)和金属微粒(P2)构成,所述金属微粒(P1)由选自金属和合金的1种或2种以上构成且平均一次粒径为1nm~150nm,所述金属微粒(P2)与金属微粒(P1)为同种金属且平均一次粒径为1μm~10μm,其混配比例(P1/P2)为80质量%~95质量%/20质量%~5质量%(质量%的合计为100质量%)。
(2)如上述(1)所述的导电性糊料,其特征在于,所述金属微粒(P)为选自铜、金、银、镍和钴中的1种或2种以上。
(3)如上述(1)或(2)所述的导电性糊料,其特征在于,所述有机分散介质(D)中的有机溶剂(S)与有机粘结剂(B)的混配比例(S/B)为80质量%~100质量%/20质量%~0质量%(质量%的合计为100质量%)。
(4)如上述(1)~(3)中任一项所述的导电性糊料,其特征在于,所述有机分散介质(D)含有水,该水的含量以有机溶剂(S)与水(W)的比例(S/W)计为75质量%~99.9质量%/25质量%~0.1质量%(质量%的合计为100质量%)。
(5)如权利要求1~4中任一项所述的导电性糊料,其特征在于,所述有机溶剂(S)为(i)有机溶剂(S1)(常压下的沸点为100℃以上、且由分子中具有1个或2个以上羟基的醇和/或多元醇构成);或者为(ii)至少由5~95体积%的有机溶剂(S1)(常压下的沸点为100℃以上、且由分子中具有1个或2个以上羟基的醇和/或多元醇构成)以及95~5体积%的具有酰胺基的有机溶剂(SA)构成的有机溶剂(S2)。
(6)如上述(5)所述的导电性糊料,其特征在于,所述有机溶剂(S1)为选自乙二醇、二乙二醇、1,2-丙二醇、1,3-丙二醇、1,2-丁二醇、1,3-丁二醇、1,4-丁二醇、2-丁烯-1,4-二醇、2,3-丁二醇、戊二醇、己二醇、辛二醇、甘油、1,1,1-三羟基甲基乙烷、2-乙基-2-羟基甲基-1,3-丙二醇、1,2,6-己三醇、1,2,3-己三醇、1,2,4-丁三醇、苏糖醇、赤藓糖醇、季戊四醇、戊五醇、己糖醇和亚氨基二乙醇中的1种或2种以上。
(7)如上述(5)所述的导电性糊料,其特征在于,所述有机溶剂(SA)为选自N-甲基乙酰胺、N-甲基甲酰胺、N-甲基丙酰胺、甲酰胺、N,N-二甲基乙酰胺、1,3-二甲基-2-咪唑啉酮、N,N-二甲基甲酰胺、1-甲基-2-吡咯烷酮、六甲基磷酰三胺、2-吡咯烷酮、ε-己内酰胺和乙酰胺中的1种或2种以上。
(8)如上述(1)~(7)中任一项所述的导电性糊料,其特征在于,所述有机粘结剂(B)为选自纤维素树脂系粘结剂、乙酸酯树脂系粘结剂、丙烯酸类树脂系粘结剂、氨基甲酸酯树脂系粘结剂、聚乙烯吡咯烷酮树脂系粘结剂、聚酰胺树脂系粘结剂、丁缩醛树脂系粘结剂和萜烯系粘结剂中的1种或2种以上。
(9)如上述(8)所述的导电性糊料,其特征在于,所述纤维素树脂系粘结剂为选自乙酰纤维素、甲基纤维素、乙基纤维素、丁基纤维素和硝酸纤维素中的1种或2种以上;乙酸酯树脂系粘结剂为选自乙二醇甲醚乙酸酯、乙二醇乙醚乙酸酯、乙二醇丁醚乙酸酯、二乙二醇乙醚乙酸酯和二乙二醇丁醚乙酸酯中的1种或2种以上;丙烯酸类树脂系粘结剂为选自甲基丙烯酸甲酯、甲基丙烯酸乙酯和甲基丙烯酸丁酯中的1种或2种以上;氨基甲酸酯树脂系粘结剂为选自2,4-甲苯二异氰酸酯和对苯二异氰酸酯中的1种或2种以上;聚乙烯吡咯烷酮树脂系粘结剂为选自聚乙烯吡咯烷酮和N-乙烯基吡咯烷酮中的1种或2种以上;聚酰胺树脂系粘结剂为选自聚酰胺6、聚酰胺66和聚酰胺11中的1种或2种以上;丁缩醛树脂系粘结剂为聚乙烯醇缩丁醛;萜烯系粘结剂为选自蒎烯、桉树脑、苧烯和萜品醇中的1种或2种以上。
(10)如上述(1)~(9)中任一项所述的导电性糊料,其特征在于,在对所述导电性糊料进行加热处理而形成金属多孔质体时,有机溶剂(S)和有机粘结剂(B)蒸发或热分解。
(11)一种导电连接部件(下文中有时称为第2方式),其特征在于,所述导电连接部件由金属多孔质体构成,该金属多孔质体如下形成:将上述(1)~(10)中任一项所述的导电性糊料放置于电子部件的半导体元件或者电路基板的电极端子或导电性基板的接合面后,在该导电性糊料上进一步配置所连接的另一个电极端子或导电性基板的接合面,通过加热处理而烧结形成,
该金属多孔质体中,来自平均粒径为1nm~150nm的金属微粒(P1)的颗粒以其部分表面结合的状态存在于来自平均粒径为1μm~10μm的金属微粒(P2)的颗粒间,在这些金属微粒间分散有空穴。
(12)如上述(11)所述的导电连接部件,其特征在于,所述导电连接部件为用于接合半导体元件间的导电性凸块。
(13)如上述(11)所述的导电连接部件,其特征在于,所述导电连接部件为用于接合半导体元件与导电性基板间的导电性芯片焊接部。
(14)如上述(11)~(13)所述的导电连接部件,其特征在于,所述加热处理在两电极端子间或者在电极端子与基板间以用0.5MPa~15MPa加压的状态进行。
(15)如上述(11)~(14)所述的由金属多孔质体构成的导电连接部件,其特征在于,所述导电性糊料的加热处理温度为150℃~350℃。
(16)如上述(11)~(14)所述的由金属多孔质体构成的导电连接部件,其特征在于,所述导电性糊料的加热处理温度为250℃~300℃。
(17)如上述(11)~(16)所述的由金属多孔质体构成的导电连接部件,其特征在于,所述金属多孔质体的空隙率为5%~35%。
发明效果
(i)上述(1)中记载的第1方式的导电性糊料含有由平均一次粒径为1nm~150nm的金属微粒(P1)和平均一次粒径为1μm~10μm的金属微粒(P2)构成的两种粒径的金属微粒以及有机溶剂(S),由此在对导电性糊料进行加热处理(烧结)而得到金属多孔质体时,与该糊料中的金属微粒仅由纳米颗粒构成的情况相比,在该糊料中金属微粒(P2)限制了纳米尺寸的金属微粒(P1)的自由移动,抑制了烧制时产生的气泡成长和粗大空隙或裂纹的发生,能够得到分散有金属微粒和空穴的导电连接部件。该加热处理时,有机溶剂(S)在金属微粒(P1)与金属微粒(P2)间以及在金属微粒(P1)间以液态和/或气态存在,形成非氧化性气氛,抑制这些金属微粒被氧化并促进烧结,促进空穴分散而形成。其结果,为了以电气、机械的方式接合,在电极端子的接合面上对本发明的导电性糊料进行烧制而形成导电连接部件,则能够提高接合强度。
(ii)上述(11)中记载的第2方式的导电连接部件中,金属微粒(P)和空穴分散而没有不均匀分布,不存在粗大空隙和裂纹,因此热循环特性提高,抗裂性和接合强度优异。
附图说明
图1是实施例2中得到的导电性凸块截面的电子显微镜照片。
具体实施方式
以下,详细说明本发明。
〔1〕关于作为第1方式的“导电性糊料”
作为第1方式的“导电性糊料”的特征在于,其包含金属微粒(P)和由有机溶剂(S)构成或者由有机溶剂(S)与有机粘结剂(B)构成的有机分散介质(D),金属微粒(P)与有机分散介质(D)的混配比例(P/D)为50质量%~85质量%/50质量%~15质量%(质量%的合计为100质量%),所述金属微粒(P)由金属微粒(P1)和金属微粒(P2)构成,所述金属微粒(P1)由选自金属和合金的1种或2种以上构成且平均一次粒径为1nm~150nm,所述金属微粒(P2)与金属微粒(P1)为同种金属且平均一次粒径为1μm~10μm,其混配比例(P1/P2)为80质量%~95质量%/20质量%~5质量%(质量%的合计为100质量%)。
(1)金属微粒(P)
金属微粒(P)由平均一次粒径为1nm~150nm的金属微粒(P1)和与金属微粒(P1)为同种金属且平均一次粒径为1μm~10μm的金属微粒(P2)构成,其混配比例(P1/P2)为80质量%~95质量%/20质量%~5质量%(质量%的合计为100质量%)。构成金属微粒(P)的金属微粒(P1)和金属微粒(P2)为同种的金属,作为金属微粒(P),只要含在导电性糊料中且在加热处理后可发挥作为导电连接部件的功能就可以使用,从导电性、加热处理(烧结性)、市场上的易获得性等方面出发,优选为选自铜、金、银、镍和钴中的1种或2种以上。
金属微粒(P1)的平均一次粒径为1nm~150nm。若该平均一次粒径小于1nm,则有可能难以通过烧制形成具有均质的粒径和空穴的多孔质体。另一方面,加热处理导电性糊料时金属微粒(P1)存在于平均一次粒径为1μm~10μm的金属微粒(P2)间,因此若金属微粒(P1)的平均一次粒径超过150nm,则难以稳定地存在于金属微粒(P2)间,有可能无法充分发挥本发明的效果。
需要说明的是,本发明中,一次颗粒的平均粒径是指构成二次颗粒的各个金属微粒的一次颗粒的直径。该一次粒径可以基于透射型电子显微镜(TEM)观察来测定。另外,平均粒径是指一次颗粒的数均粒径。
金属微粒(P2)的平均一次粒径为1μm~10μm。通过使金属微粒(P2)的平均一次粒径在该范围,能够确保与金属微粒(P1)的平均一次粒径的粒径之差,在加热处理时能够有效地抑制金属微粒(P1)的自由移动。金属微粒(P)中的金属微粒(P1)与金属微粒(P2)的混配比例(P1/P2)为80质量%~95质量%/20质量%~5质量%(质量%的合计为100质量%)。通过为该混配比例,在加热处理导电性糊料而形成的由金属多孔质体构成的导电连接部件中,能够抑制金属微粒(P2)的不均匀分布,能够提高分散性。
(2)有机分散介质(D)
有机分散介质(D)由有机溶剂(S)或者由有机溶剂(S)与有机粘结剂(B)构成。有机分散介质(D)在导电性糊料中使金属微粒(P1)和金属微粒(P2)分散,调节导电性糊料的粘度,以及维持凸块前体、芯片焊接部前体等导电连接部件前体的形状,并且在加热处理时以液态和气态发挥作为还原剂的功能。上述有机分散介质(D)中有机溶剂(S)与有机粘结剂(B)的混配比例(S/B)优选为80质量%~100质量%/20质量%~0质量%(质量%的合计为100质量%)。若有机分散介质(D)中的有机粘结剂(B)的混配比例超过20质量%,则加热处理凸块前体时有机粘结剂(B)热分解并飞散的速度变慢,而且若导电性凸块中残留的碳量增加则烧结受到阻碍,有可能发生裂纹、剥离等问题,因而不优选。通过有机溶剂(S)的选择,在仅利用该溶剂就能够使金属微粒(P1)和金属微粒(P2)分散,并调节导电性糊料的粘度,发挥出可维持导电性凸块前体、导电性芯片焊接部前体等导电连接部件前体的形状的功能的情况下,可以使用仅由有机溶剂(S)构成的成分作为有机分散介质(D)。
(2-1)有机溶剂(S)
上述有机溶剂(S)优选为(i)常压下的沸点为100℃以上、且由分子中具有1个或2个以上羟基的醇和/或多元醇构成的具有还原性的有机溶剂(S1);或者为(ii)至少由5~95体积%的有机溶剂(S1)以及95~5体积%的具有酰胺基的有机溶剂(SA)构成的有机溶剂(S2),所述有机溶剂(S1)常压下的沸点为100℃以上,且由分子中具有1个或2个以上羟基的醇和/或多元醇构成,具有还原性。
若有机分散介质(D)中含有具有还原性的有机溶剂(S1),则在加热处理导电性糊料时,认为首先金属微粒表面被还原,其后在该微粒的表面间进行基于烧结的结合,因此有机溶剂(S1)连续地蒸发,若在存在液体和蒸气的气氛下还原并烧制,则烧结得到促进,形成具有良好的导电性的导电连接部件。因此,若有机分散介质(D)中存在有机溶剂(S1),则在加热处理时形成非氧化性气氛,金属微粒(P)表面中的还原、结合得到促进。
从这方面考虑,有机溶剂(S2)更优选由60体积%~95体积%的有机溶剂(S1)以及40体积%~5体积%的具有酰胺基的有机溶剂(SA)构成。
另外,上述有机分散介质(D)还可以含有水,该水的含量以有机溶剂(S)与水(W)的比例(S/W)计为75质量%~99.9质量%/25质量%~0.1质量%(质量%的合计为100质量%)。由于后述的有机溶剂(S)多为与水的亲和性良好的物质,因而容易吸收水,因此可以通过预先添加水来抑制产生导电性糊料的经时的粘性变化。若有机溶剂(S2)中以上述比例含有酰胺系有机溶剂(SA),则与有机溶剂(S1)的混合良好,而且在使用沸点高的有机溶剂作为有机溶剂(S1)时会促进溶剂的蒸发,使颗粒间进行烧结,因而能够期待烧制后的烧结颗粒与导电性基板的密合性和连接强度的提高。
作为有机溶剂(S1)的具体例,可以例示选自乙二醇(沸点197℃)、二乙二醇(沸点244℃)、1,2-丙二醇(沸点188℃)、1,3-丙二醇(沸点212℃)、1,2-丁二醇(沸点192℃)、1,3-丁二醇(沸点208℃)、1,4-丁二醇(沸点230℃)、2-丁烯-1,4-二醇(沸点235℃)、2,3-丁二醇、戊二醇(沸点239℃)、己二醇(沸点250℃)、辛二醇(沸点244℃)、甘油(沸点290℃)、1,1,1-三羟基甲基乙烷、2-乙基-2-羟基甲基-1,3-丙二醇(沸点161℃)、1,2,6-己三醇、1,2,3-己三醇和1,2,4-丁三醇中的1种或2种以上。
另外,作为有机溶剂(S1),还可以使用苏糖醇、赤藓糖醇(沸点331℃)、季戊四醇、戊五醇、木糖醇(沸点216℃)、核醣醇、阿拉伯糖醇、己糖醇、甘露醇、山梨糖醇、卫矛醇、甘油醛、二羟氧基丙酮、苏阿糖、红藓酮糖、红藓糖、阿拉伯糖、核糖、核酮糖、木糖、木酮糖、来苏糖、葡萄糖、果糖、甘露糖、艾杜糖、山梨糖、古洛糖、塔洛糖、塔格糖、半乳糖、阿洛糖、阿卓糖、乳糖、木糖、阿拉伯糖、异麦芽糖、葡庚糖、庚糖、麦芽三糖、乳果糖和海藻糖等糖类,这些之中,对于熔点高的物质,可以与其他有机溶剂(S1)混合而使用。需要说明的是,在上述多元醇的例示中,括号内表示常压下的沸点。
关于上述有机溶剂(S1),从容易发挥后述的还原功能的方面考虑,更优选具有2个以上的羟基、且该羟基键合的碳基部分为(-CH(OH)-)结构的多元醇。需要说明的是,在上述多元醇的例示中,括号内表示常压下的沸点。
作为有机溶剂(SA)的具体例,可以举出N-甲基乙酰胺、N-甲基甲酰胺、N-甲基丙酰胺、甲酰胺、N,N-二甲基乙酰胺、1,3-二甲基-2-咪唑啉酮、N,N-甲基甲酰胺、1-甲基-2-吡咯烷酮、六甲基磷酰三胺、2-吡咯烷酮、ε-己内酰胺和乙酰胺等。
(2-2)有机粘结剂(B)
有机粘结剂(B)在导电性糊料中发挥如下功能:抑制金属微粒(P)的凝聚;调节导电性糊料的粘度;以及维持导电性凸块前体、导电性芯片焊接部前体等导电连接部件前体的形状的功能。作为具有这样的功能的有机粘结剂(B),优选为选自纤维素树脂系粘结剂、乙酸酯树脂系粘结剂、丙烯酸类树脂系粘结剂、氨基甲酸酯树脂系粘结剂、聚乙烯吡咯烷酮树脂系粘结剂、聚酰胺树脂系粘结剂、丁缩醛树脂系粘结剂和萜烯系粘结剂中的1种或2种以上。
作为有机粘结剂(R)的具体例,上述纤维素树脂系粘结剂可以举出乙酰纤维素、甲基纤维素、乙基纤维素、丁基纤维素和硝酸纤维素;乙酸酯树脂系粘结剂可以举出乙二醇甲醚乙酸酯、乙二醇乙醚乙酸酯、乙二醇丁醚乙酸酯、二乙二醇乙醚乙酸酯和二乙二醇丁醚乙酸酯;丙烯酸类树脂系粘结剂可以举出甲基丙烯酸甲酯、甲基丙烯酸乙酯和甲基丙烯酸丁酯;氨基甲酸酯树脂系粘结剂可以举出2,4-甲苯二异氰酸酯和对苯二异氰酸酯;聚乙烯吡咯烷酮树脂系粘结剂可以举出聚乙烯吡咯烷酮和N-乙烯基吡咯烷酮;聚酰胺树脂系粘结剂可以举出聚酰胺6、聚酰胺66和聚酰胺11;丁缩醛树脂系粘结剂可以举出聚乙烯醇缩丁醛;萜烯系粘结剂可以举出蒎烯、桉树脑、苧烯和萜品醇等。
(3)导电性糊料
导电性糊料包含金属微粒(P)和有机分散介质(D),是金属微粒(P)均匀分散于有机分散介质(D)中的糊料状的物质,以金属微粒(P)为50质量%~85质量%、有机分散介质(D)为50质量%~15质量%(质量%的合计为100质量%)的比例含有。若金属微粒(P)的比例超过上述85质量%,则糊料为高粘度,在加热处理中金属微粒(P)表面间的结合不足,导电性有可能降低。另一方面,若金属微粒(P)的比例小于上述50质量%,则糊料的粘度降低,有可能难以维持涂布于半导体元件的电极端子或电路基板的电极端子的接合面的导电连接部件前体的形状,另外,在加热处理时有可能发生金属多孔质体收缩这样的不良情况。从这方面考虑,上述金属微粒(P)与有机分散介质(D)的比例(P/D)优选为55质量%~80质量%/45质量%~20质量%(质量%的合计为100质量%)。
本发明中,利用下述原理:若加热处理导电性糊料,则在达到某温度时进行有机溶剂(S)的蒸发、或者有机溶剂(S)的蒸发和有机粘结剂(B)的热分解,在金属微粒(P)的表面彼此接触后,相互结合(烧结)。本发明的导电性糊料中,在不损害本发明的效果的范围内,可以在上述成分中根据需要加入消泡剂、分散剂、增塑剂、表面活性剂、增稠剂等其他金属颗粒等。
在制造导电性糊料时,可以向上述金属微粒(P)中添加有机分散介质(D),施加剪切应力,由此混炼并制备出导电性糊料。
作为施加剪切应力的方法,可以使用例如捏合机、三辊等混炼装置、能够在密闭系统混炼的擂溃机等。混炼时,优选不过度进行铜粉的氧化。
〔2〕关于作为第2方式的“导电连接部件”
第2方式的“导电连接部件”的特征在于,所述导电连接部件由金属多孔质体构成,该金属多孔质体如下形成:将上述第1方式所记载的导电性糊料放置于电子部件的半导体元件或者电路基板的电极端子或导电性基板的接合面后,在该导电性糊料上进一步配置所连接的另一个电极端子或导电性基板的接合面,通过加热处理而烧结形成,
该金属多孔质体中,来自平均粒径为1nm~150nm的金属微粒(P1)的颗粒以其部分表面结合的状态存在于来自平均粒径为1μm~10μm的金属微粒(P2)的颗粒间,在这些金属微粒间分散有空穴。
(1)导电连接部件的制作
作为导电连接部件,可以举出用于接合半导体元件间的导电性凸块、用于接合半导体元件与导电性基板间的导电性芯片焊接部等,但不限定于此。
导电性凸块如下形成:将导电性糊料放置(还包括涂布、印刷等)于电子部件的半导体元件或者电路基板的电极端子的接合面,在该导电性糊料上进一步配置所连接的另一个电极端子的接合面后,通过加热处理或者在加压下加热处理而烧结形成。上述所连接的另一个电极端子还包含进行引线接合时的金线等线。需要说明的是,在上述导电性糊料上进一步配置所连接的另一个电极端子的接合面时,优选进行位置对准。
导电性芯片焊接部通常如下形成:将导电性糊料放置(还包括涂布、印刷等)于电子部件的电路基板的接合面,在该导电性糊料上进一步配置所连接的另一个电极端子的接合面后,通过加热处理或者在加压下加热处理而烧结形成。
上述加压下的加热处理能够通过两电极端子间或者电极端子与基板间的加压而使导电连接部件前体与两电极端子接合面、或者电极端子与导电性基板间的接合可靠,或者使导电连接部件前体产生适当的变形而能够与电极端子接合面进行可靠的接合,同时导电连接部件前体与电极端子接合面的接合面积变大,能够进一步提高接合可靠性。另外,若在半导体元件与导电连接部件前体间使用加压型加热工具等在加压下烧制,则接合部的烧结性提高,能够得到更良好的接合部。
上述两电极端子间、或者电极端子与基板间的加压优选为0.5MPa~15MPa。该加压为0.5MPa以上的加压时,抑制接合面形成大空隙的效果得到提高,另一方面,若超过15MPa,则导电性金属微粒(P1)间的空隙减少,空隙率有可能降低。
该导电性糊料可以使用第1方式中记载的导电性糊料。即,该导电性糊料可以使用包含50质量%~85质量%的金属微粒(P)和50质量%~15质量%的由有机溶剂(S)构成或者由有机溶剂(S)与有机粘结剂(B)构成的有机分散介质(D)(质量%的合计为100质量%)的导电性糊料,所述金属微粒(P)由金属微粒(P1)和金属微粒(P2)构成,所述金属微粒(P1)由选自金属和合金的1种或2种以上构成且平均一次粒径为1nm~150nm,所述金属微粒(P2)与金属微粒(P1)为同种金属且平均一次粒径为1μm~10μm,其混配比例(P1/P2)为80质量%~95质量%/20质量%~5质量%(质量%的合计为100质量%)。
关于上述金属微粒(P1)、金属微粒(P2)、有机溶剂(S)以及有机粘结剂(B)的成分,如第1方式中记载的那样。另外,有机分散介质(D)优选由80质量%~100质量%的有机溶剂(S)和20质量%~0质量%的有机粘结剂(B)构成这一点也如第1方式中记载的那样。
作为将导电性糊料放置于半导体元件的电极端子等上而形成导电性凸块前体、导电性芯片焊接部前体等导电连接部件前体的手段,可以举出通过例如公知的丝网印刷、后述的抗蚀剂等在电极端子的连接部形成开口部并为了在该开口部放置导电性糊料而进行涂布的方法;等等。在使用丝网印刷的情况下,在半导体元件的电极端子等上配置设有版膜(抗蚀剂)的筛版,在其上放置导电性糊料并针对该糊料用刮刀进行滑动,则导电性糊料通过不存在抗蚀剂的部分的筛,转移到电极端子等上,形成导电性凸块前体、导电性芯片焊接部前体等导电连接部件前体。
作为用于填充导电性糊料的开口部的形成方法,包括以下方法:经过曝光/显影工序而在感光性树脂层形成图案的照相平版印刷方法;将激光、电子射线、离子束等高能射线照射到设置于元件上的绝缘树脂层,通过加热所致的熔融或者切断树脂的分子键的切除(ablation)而在该树脂层形成开口部的方法。这些之中,从实用性的方面考虑,优选照相平版印刷法、或者基于利用激光的切除的开口部形成方法。加热处理(烧结)后,为了以能够确保电连接的方式使半导体元件上的电极端子和电路基板的电极端子接触,位置对准中,可以例如使用光学装置等对于半导体元件上的电极端子和用带卷等搬运来的导电性基板的连接电极端子部进行位置对准。
在半导体元件的电极端子上等之上形成、与成对的端子电极接触的状态的凸块前体、芯片焊接部前体等导电连接部件前体优选以150℃~350℃、更优选以250℃~300℃的温度进行加热处理(烧结)而形成导电连接部件,由此通过该导电连接部件以电气、机械的方式与半导体元件的电极端子等相对的端子电极等接合。
上述加热处理所需要的时间因所使用的金属微粒(P1)的种类、有机分散介质(D)的种类而异,希望为5分钟~30分钟左右。由于使用平均一次粒径为1nm~150nm的微粒作为金属微粒(P1),因此若通过加热除去有机分散介质(D),则由于其表面的能量而以低于块状态的金属的熔点的温度进行金属微粒表面间的结合(烧结),形成由金属多孔质体构成的导电性凸块、导电性芯片焊接部等导电连接部件。
(2)导电连接部件
如上所述,第2方式的导电连接部件的特征在于,所述导电连接部件由金属多孔质体构成,该金属多孔质体如下形成:将上述第1方式所记载的导电性糊料放置于电子部件的半导体元件或者电路基板的电极端子或导电性基板的接合面后,在该导电性糊料上进一步配置所连接的另一个电极端子或导电性基板的接合面,通过加热处理而烧结形成,
该金属多孔质体中,来自平均粒径为1nm~150nm的金属微粒(P1)的颗粒以其部分表面结合的状态存在于来自平均粒径为1μm~10μm的金属微粒(P2)的颗粒间,在这些金属微粒间分散有空穴。
对于上述通过加热处理得到的导电连接部件,在与利用镀覆法得到的导电性凸块等进行对比金属微粒(P1)中变形和应力得到缓和的状态下使金属微粒(P1)彼此在表面接触,并进行结合(烧结),由此具有适度的弹性和柔软性,并且得到良好的导电性。
如此得到的由金属多孔质体构成的导电性凸块、导电性芯片焊接部等导电连接部件的空隙率为5体积%~35体积%,并且空穴没有不均匀分布,因此机械和电接合性优异,热循环特性提高,抗裂性优异。需要说明的是,可以通过使用扫描型电子显微镜(SEM),拍摄观察倍数为1000~10000倍的电子显微镜照片,并分析其截面图像来求出导电性凸块形状物或导电性芯片焊接部的空隙率。
实施例
通过实施例具体地说明本发明,但本发明并不被这些实施例所限定。实施例1~3以及比较例1~5中,制作评价用导电性凸块样品,实施例4~6以及比较例6~10中,制作评价用导电性芯片焊接部样品,并分别进行评价。以下对本实施例、比较例中的评价试验用的样品的制作法进行说明。
需要说明的是,关于导电性凸块和导电性芯片焊接部的评价方法等,如后所述。
[实施例1]
将平均一次粒径为60nm的银微粒和平均一次粒径为5μm的银微粒以95:5(质量比)混合,向该混合物中添加乙二醇作为具有还原性的有机溶剂,并使银微粒浓度为60质量%,然后充分搅拌,制备导电性糊料。
通过丝网印刷将该导电性糊料涂布于导电性基板(DBC基板,直接键合铜基板),涂布4处(与1边为4mm的正方形的顶点对应的位置)导电性凸块前体(尺寸:厚度:150μm)。在该前体上以成对的方式放置,使对双头螺栓(厚度:150μm)进行了金溅射的Si芯片(形状:1边为4.5mm的长方体)的金溅射面与该前体面相对。以200℃对搭载了Si芯片的导电性基板进行加热处理,对导电性糊料中含有的银微粒进行烧结,制作出导电性基板与Si芯片的端子以电气、机械方式接合的导电性凸块。对于所得到的导电性凸块,进行后述的接合强度试验(测定的平均值(N=10))等评价。其评价结果列于表1。
[实施例2]
将在水溶液中通过由铜离子的无电解还原所制备的平均一次粒径为120nm的铜微粒和通过同样的无电解还原所制备的平均一次粒径为7μm的铜微粒以90:10(质量比)混合,向该混合物中添加甘油作为具有还原性的有机溶剂,并使铜微粒浓度为80质量%,与实施例1同样地制备导电性糊料。
使用所得到的导电性糊料,并使加热处理温度为300℃,除此以外与实施例1中记载的内容同样地制作导电性基板与Si芯片的端子以电气、机械方式接合的导电性凸块。对于所得到的导电性凸块,进行与实施例1相同的评价。其评价结果列于表1。另外,实施例2中得到的导电性凸块截面的电子显微镜照片见图1。由图1观察到:来自平均一次粒径为7μm的铜微粒的烧结颗粒分散存在于导电性凸块中,在该烧结颗粒的周围存在来自平均一次粒径为120nm的铜微粒的烧结颗粒,不存在粗大空隙和裂纹。
[实施例3]
将与实施例2中使用的铜微粒同样的平均一次粒径为120nm的铜微粒和平均一次粒径为7μm的铜微粒以90:10(质量比)混合,添加由甘油80体积%和N-甲基乙酰胺20体积%构成的混合溶剂作为有机溶剂,调节铜微粒浓度为75质量%,使用如此得到的导电性糊料,并使加热处理温度为300℃,除此以外与实施例1中记载的内容同样地制作导电性基板与Si 芯片的端子以电气、机械方式接合的导电性凸块。对于所得到的导电性凸块,进行与实施例1相同的评价。其评价结果列于表1。
[比较例1]
在与实施例2中使用的铜微粒同样的平均一次粒径为120nm的铜微粒中添加甘油作为具有还原性的有机溶剂,调节铜微粒浓度为50质量%,使用如此得到的导电性糊料,并使加热处理温度为300℃,除此以外与实施例1中记载的内容同样地制作导电性基板与Si芯片的端子以电气、机械方式接合的导电性凸块。对于所得到的导电性凸块,进行与实施例1相同的评价。其评价结果列于表1。
[比较例2]
将与实施例2中使用的铜微粒同样的平均一次粒径为120nm的铜微粒和在水溶液中通过由铜离子的无电解还原所制备的平均一次粒径为10μm的铜微粒以75:25(质量比)混合,添加甘油作为具有还原性的有机溶剂,调节铜微粒浓度为50质量%,使用如此得到的导电性糊料,并使加热处理温度为300℃,除此以外与实施例1中记载的内容同样地制作导电性基板与Si芯片的端子以电气、机械方式接合的导电性凸块。对于所得到的导电性凸块,进行与实施例1相同的评价。其评价结果列于表1。
[比较例3]
将与实施例2中使用的铜微粒同样的平均一次粒径为120nm的铜微粒和在水溶液中通过由铜离子的无电解还原所制备的平均一次粒径为10μm的铜微粒以70:30(质量比)混合,添加甘油作为具有还原性的有机溶剂,调节铜微粒浓度为50质量%,使用如此得到的导电性糊料,并使加热处理温度为300℃,除此以外与实施例1中记载的内容同样地制作导电性基板与Si芯片的端子以电气、机械方式接合的导电性凸块。对于所得到的导电性凸块,进行与实施例1相同的评价。其评价结果列于表1。
[比较例4]
将与实施例2中使用的铜微粒同样的平均一次粒径为120nm的铜微粒和在水溶液中通过由铜离子的无电解还原所制备的平均一次粒径为15μm的铜微粒以95:5(质量比)混合,添加甘油作为具有还原性的有机溶剂,调节铜微粒浓度为50质量%,使用如此得到的导电性糊料,并使加热处理温度为300℃,除此以外与实施例1中记载的内容同样地制作导电性基板与Si芯片的端子以电气、机械方式接合的导电性凸块。对于所得到的导电性凸块,进行与实施例1相同的评价。其评价结果列于表1。
[比较例5]
将与实施例2中使用的铜微粒同样的平均一次粒径为120nm的铜微粒和在水溶液中通过由铜离子的无电解还原所制备的平均一次粒径为6μm的铜微粒以95:5(质量比)混合,向该混合物中添加甘油作为具有还原性的有机溶剂,调节铜微粒浓度为90质量%,使用如此得到的导电性糊料,并使加热处理温度为300℃,除此以外与实施例1中记载的内容同样地制作导电性基板与Si芯片的端子以电气、机械方式接合的导电性凸块。对于所得到的导电性凸块,进行与实施例1相同的评价。其评价结果列于表1。
针对上述实施例1~3、比较例1~5的表1中的评价基准如下所述。
(i)体积空隙率
导电性凸块的体积空隙率为5%~35%时评价为A,超过35%时评价为B,小于5%时评价为C。
(ii)平均接合强度试验
对于基板和Si芯片通过导电性凸块接合的接合强度试验用的Si芯片连接样品,将利用芯片剪切试验机从基板剥离Si芯片时施加的力除以导电性凸块的接合面积,求出每单位面积的接合强度[N/mm2]。
(iii)有无粗大空隙
导电性凸块中未观察到10μm以上的粗大空隙时评价为A,观察到时评价为B。
(iv)有无裂纹
导电性凸块及其接合面未观察到裂纹时评价为A,观察到时评价为B。
[表1]
[实施例4]
将平均一次粒径为60nm的银微粒和平均一次粒径为5μm的银微粒以95:5(质量比)混合,向该混合物中添加乙二醇作为具有还原性的有机溶剂,并使银微粒浓度为60质量%,然后充分搅拌,制备导电性糊料。
在导电性基板(DBC基板,直接键合铜基板)上粘贴150微米厚的带(氯乙烯带),通过金属刮刀涂布导电性糊料(形状:1边为4mm的长方体),在其上以成对的方式放置,使进行了金溅射的Si芯片(形状:1边为3.5mm的长方体)的金溅射面与导电性糊料面相对。
接下来,以2MPa的压力在导电性糊料方向对搭载有Si芯片的导电性基板加压,同时以200℃对导电性基板、导电性糊料以及Si芯片部分进行加热处理,对导电性糊料中含有的金属微粒进行烧结,制作出该导电性基板与Si芯片通过导电性芯片焊接部以电气、机械方式接合的接合强度试验用的Si芯片连接样品。对于该导电性芯片焊接部,进行后述的接合强度试验(测定的平均值(N=10))等评价。其评价结果列于表2。
[实施例5]
将与实施例2中使用的铜微粒同样的平均一次粒径为120nm的铜微粒和在水溶液中通过由铜离子的无电解还原所制备的平均一次粒径为7μm的铜微粒以90:10(质量比)混合,向该混合物中添加甘油作为具有还原性的有机溶剂,并使铜微粒浓度为80质量%,然后充分搅拌,制备导电性糊料。
使用该导电性糊料,并使加热处理温度为300℃,除此以外与实施例4中记载的内容同样地制作导电性基板与Si芯片的端子以电气、机械方式接合的导电性芯片焊接部。对于该芯片焊接部,进行与实施例4相同的评价。其评价结果列于表2。
[实施例6]
将与实施例5中使用的铜微粒同样的平均一次粒径为120nm的铜微粒和平均一次粒径为7μm的铜微粒以90:10(质量比)混合,向该混合物中添加由甘油80体积%和N-甲基乙酰胺20体积%构成的混合溶剂作为有机溶剂,并使铜微粒浓度为75质量%,然后充分搅拌,制备导电性糊料。
使用该导电性糊料,并使加热处理温度为300℃,除此以外与实施例1中记载的内容同样地制作导电性基板与Si芯片的端子以电气、机械方式接合的导电性芯片焊接部。对于导电性该芯片焊接部,进行与实施例4相同的评价。其评价结果列于表2。
[比较例6]
在与实施例5中使用的铜微粒同样的平均一次粒径为120nm的铜微粒中添加甘油作为具有还原性的有机溶剂,并使铜微粒浓度为50质量%,然后充分搅拌,制备导电性糊料。
使用该导电性糊料,并使加热处理温度为300℃,除此以外与实施例1中记载的内容同样地制作导电性基板与Si芯片的端子以电气、机械方式接合的导电性芯片焊接部。对于该导电性芯片焊接部,进行与实施例4相同的评价。其评价结果列于表2。
[比较例7]
将与实施例5中使用的铜微粒同样的平均一次粒径为120nm的铜微粒和在水溶液中通过由铜离子的无电解还原所制备的平均一次粒径为10μm的铜微粒以75:25(质量比)混合,向该混合物中添加甘油作为具有还原性的有机溶剂,并使铜微粒浓度为50质量%,然后充分搅拌,制备导电性糊料。
使用该导电性糊料,并使加热处理温度为300℃,除此以外与实施例1中记载的内容同样地制作导电性基板与Si芯片的端子以电气、机械方式接合的导电性芯片焊接部。对于该导电性芯片焊接部,进行与实施例4相同的评价。其评价结果列于表2。
[比较例8]
将与实施例5中使用的铜微粒同样的平均一次粒径为120nm的铜微粒和在水溶液中通过由铜离子的无电解还原所制备的平均一次粒径为10μm的铜微粒以70:30(质量比)混合,向该混合物中添加甘油作为具有还原性的有机溶剂,并使铜微粒浓度为50质量%,然后充分搅拌,制备导电性糊料。
使用该导电性糊料,并使加热处理温度为300℃,除此以外与实施例1中记载的内容同样地制作导电性基板与Si芯片的端子以电气、机械方式接合的导电性芯片焊接部。对于该导电性芯片焊接部,进行与实施例4相同的评价。其评价结果列于表2。
[比较例9]
将与实施例5中使用的铜微粒同样的平均一次粒径为120nm的铜微粒和在水溶液中通过由铜离子的无电解还原所制备的平均一次粒径为15μm的铜微粒以95:5(质量比)混合,向该混合物中添加甘油作为具有还原性的有机溶剂,并使铜微粒浓度为50质量%,然后充分搅拌,制备导电性糊料。
使用该导电性糊料,并使加热处理温度为300℃,除此以外与实施例1中记载的内容同样地制作导电性基板与Si芯片的端子以电气、机械方式接合的导电性芯片焊接部。进行该导电性芯片焊接部的接合强度试验。对于该导电性芯片焊接部,进行与实施例4相同的评价。其评价结果列于表2。
[比较例10]
将与实施例5中使用的铜微粒同样的平均一次粒径为250nm的铜微粒和在水溶液中通过由铜离子的无电解还原所制备的平均一次粒径为6μm的铜微粒以95:5(质量比)混合,向该混合物中添加甘油作为具有还原性的有机溶剂,并使铜微粒浓度为50质量%,然后充分搅拌,制备导电性糊料。
使用该导电性糊料,并使加热处理温度为300℃,除此以外与实施例1中记载的内容同样地制作导电性基板与Si芯片的端子以电气、机械方式接合的导电性芯片焊接部。对于该导电性芯片焊接部,进行与实施例4相同的评价。其评价结果列于表2。
需要说明的是,表2中的评价基准如下所述。
(i)体积空隙率
使用扫描型电子显微镜(SEM),拍摄观察倍数为1000~10000倍的电子显微镜照片,并分析其截面图像,由此求出导电性凸块的空隙率。
导电性芯片焊接部的体积空隙率为3%~25%时评价为A,超过25%且在35%以下时评价为B,超过35%时评价为C,小于3%时评价为D。
(ii)平均接合强度试验
对于导电性基板和Si芯片通过导电性芯片焊接部以电气、机械方式接合的接合强度试验用的Si芯片连接样品,将利用芯片剪切试验机从导电性基板剥离Si芯片时施加的力除以导电性芯片焊接部的接合面积,求出每单位面积的接合强度[N/mm2]。
(iii)有无粗大空隙
导电性芯片焊接部中未观察到5μm以上的粗大空隙时评价为A,观察到时评价为B。
(iv)有无裂纹
导电性芯片焊接部及其接合面未观察到裂纹时评价为A,观察到时评价为B。
[表2]
Claims (17)
1.一种导电性糊料,其特征在于,其包含金属微粒(P)和由有机溶剂(S)构成或者由有机溶剂(S)与有机粘结剂(B)构成的有机分散介质(D),金属微粒(P)与有机分散介质(D)的混配比例P/D为50质量%~85质量%/50质量%~15质量%,质量%的合计为100质量%,
所述金属微粒(P)由金属微粒(P1)和金属微粒(P2)构成,所述金属微粒(P1)由选自金属和合金的1种或2种以上构成且平均一次粒径为1nm~150nm,所述金属微粒(P2)与金属微粒(P1)为同种金属且平均一次粒径为1μm~10μm,其混配比例P1/P2为80质量%~95质量%/20质量%~5质量%,质量%的合计为100质量%。
2.如权利要求1所述的导电性糊料,其特征在于,所述金属微粒(P1)为选自铜、金、银、镍和钴中的1种或2种以上。
3.如权利要求1或2所述的导电性糊料,其特征在于,所述有机分散介质(D)中的有机溶剂(S)与有机粘结剂(B)的混配比例S/B为80质量%~100质量%/20质量%~0质量%,质量%的合计为100质量%。
4.如权利要求1~3中任一项所述的导电性糊料,其特征在于,所述有机分散介质(D)含有水,该水的含量以有机溶剂(S)与水(W)的比例S/W计为75质量%~99.9质量%/25质量%~0.1质量%,质量%的合计为100质量%。
5.如权利要求1~4中任一项所述的导电性糊料,其特征在于,所述有机溶剂(S)为:
(i)常压下的沸点为100℃以上、且由分子中具有1个或2个以上羟基的醇和/或多元醇构成的有机溶剂(S1);或者为
(ii)至少由5~95体积%的有机溶剂(S1)以及95~5体积%的具有酰胺基的有机溶剂(SA)构成的有机溶剂(S2),所述有机溶剂(S1)常压下的沸点为100℃以上、且由分子中具有1个或2个以上羟基的醇和/或多元醇构成。
6.如权利要求5所述的导电性糊料,其特征在于,所述有机溶剂(S1)为选自乙二醇、二乙二醇、1,2-丙二醇、1,3-丙二醇、1,2-丁二醇、1,3-丁二醇、1,4-丁二醇、2-丁烯-1,4-二醇、2,3-丁二醇、戊二醇、己二醇、辛二醇、甘油、1,1,1-三羟基甲基乙烷、2-乙基-2-羟基甲基-1,3-丙二醇、1,2,6-己三醇、1,2,3-己三醇、1,2,4-丁三醇、苏糖醇、赤藓糖醇、季戊四醇、戊五醇、己糖醇和亚氨基二乙醇中的1种或2种以上。
7.如权利要求5所述的导电性糊料,其特征在于,所述有机溶剂(SA)为选自N-甲基乙酰胺、N-甲基甲酰胺、N-甲基丙酰胺、甲酰胺、N,N-甲基乙酰胺、1,3-二甲基-2-咪唑啉酮、N,N-甲基甲酰胺、1-甲基-2-吡咯烷酮、六甲基磷酰三胺、2-吡咯烷酮、ε-己内酰胺和乙酰胺中的1种或2种以上。
8.如权利要求1~7中任一项所述的导电性糊料,其特征在于,所述有机粘结剂(B)为选自纤维素树脂系粘结剂、乙酸酯树脂系粘结剂、丙烯酸类树脂系粘结剂、氨基甲酸酯树脂系粘结剂、聚乙烯吡咯烷酮树脂系粘结剂、聚酰胺树脂系粘结剂、丁缩醛树脂系粘结剂和萜烯系粘结剂中的1种或2种以上。
9.如权利要求8所述的导电性糊料,其特征在于,所述纤维素树脂系粘结剂为选自乙酰纤维素、甲基纤维素、乙基纤维素、丁基纤维素和硝酸纤维素中的1种或2种以上;乙酸酯树脂系粘结剂为选自乙二醇甲醚乙酸酯、乙二醇乙醚乙酸酯、乙二醇丁醚乙酸酯、二乙二醇乙醚乙酸酯和二乙二醇丁醚乙酸酯中的1种或2种以上;丙烯酸类树脂系粘结剂为选自甲基丙烯酸甲酯、甲基丙烯酸乙酯和甲基丙烯酸丁酯中的1种或2种以上;氨基甲酸酯树脂系粘结剂为选自2,4-甲苯二异氰酸酯和对苯二异氰酸酯中的1种或2种以上;聚乙烯吡咯烷酮树脂系粘结剂为选自聚乙烯吡咯烷酮和N-乙烯基吡咯烷酮中的1种或2种以上;聚酰胺树脂系粘结剂为选自聚酰胺6、聚酰胺66和聚酰胺11中的1种或2种以上;丁缩醛树脂系粘结剂为聚乙烯醇缩丁醛;萜烯系粘结剂为选自蒎烯、桉树脑、苧烯和萜品醇中的1种或2种以上。
10.如权利要求1~9中任一项所述的导电性糊料,其特征在于,在对所述导电性糊料进行加热处理而形成金属多孔质体时,有机溶剂(S)和有机粘结剂(B)蒸发或热分解。
11.一种导电连接部件,其特征在于,所述导电连接部件由金属多孔质体构成,该金属多孔质体如下形成:将权利要求1~10中任一项所述的导电性糊料放置于电子部件的半导体元件或者电路基板的电极端子或导电性基板的接合面后,在该导电性糊料上进一步配置所连接的另一个电极端子或导电性基板的接合面,通过加热处理而烧结形成,
该金属多孔质体中,来自平均粒径为1nm~150nm的金属微粒(P1)的颗粒以其部分表面结合的状态存在于来自平均粒径为1μm~10μm的金属微粒(P2)的颗粒间,在这些金属微粒间分散有空穴。
12.如权利要求11所述的导电连接部件,其特征在于,所述导电连接部件为用于接合半导体元件间的导电性凸块。
13.如权利要求11所述的导电连接部件,其特征在于,所述导电连接部件为用于接合半导体元件与导电性基板间的导电性芯片焊接部。
14.如权利要求11~13中任一项所述的导电连接部件,其特征在于,所述加热处理在两电极端子间或者在电极端子与基板间以用0.5MPa~15MPa加压的状态进行。
15.如权利要求11~14中任一项所述的由金属多孔质体构成的导电连接部件,其特征在于,所述导电性糊料的加热处理温度为150℃~350℃。
16.如权利要求11~14中任一项所述的由金属多孔质体构成的导电连接部件,其特征在于,所述导电性糊料的加热处理温度为250℃~300℃。
17.如权利要求11~16中任一项所述的由金属多孔质体构成的导电连接部件,其特征在于,所述金属多孔质体的空隙率为5%~35%。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010061838 | 2010-03-18 | ||
JP2010-061838 | 2010-03-18 | ||
PCT/JP2011/001615 WO2011114747A1 (ja) | 2010-03-18 | 2011-03-18 | 導電性ペースト、及び該ペーストから得られる導電接続部材 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN102812520A true CN102812520A (zh) | 2012-12-05 |
CN102812520B CN102812520B (zh) | 2016-10-19 |
Family
ID=44648858
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201180014310.3A Active CN102812520B (zh) | 2010-03-18 | 2011-03-18 | 导电性糊料和由该糊料得到的导电连接部件 |
Country Status (6)
Country | Link |
---|---|
US (1) | US10046418B2 (zh) |
EP (1) | EP2549488B1 (zh) |
JP (1) | JP5041454B2 (zh) |
KR (1) | KR20130061671A (zh) |
CN (1) | CN102812520B (zh) |
WO (1) | WO2011114747A1 (zh) |
Cited By (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105981111A (zh) * | 2013-12-10 | 2016-09-28 | 同和电子科技有限公司 | 导电性糊料和使用该导电性糊料的导电膜的制造方法 |
CN107112068A (zh) * | 2015-01-13 | 2017-08-29 | 同和电子科技有限公司 | 导电性糊料以及使用该糊料的导电膜的制造方法 |
CN107249787A (zh) * | 2014-09-01 | 2017-10-13 | 同和电子科技有限公司 | 粘合材料和使用所述粘合材料的粘合方法 |
CN108140710A (zh) * | 2015-12-15 | 2018-06-08 | 株式会社Lg化学 | 金属糊料和热电模块 |
CN109070206A (zh) * | 2016-04-28 | 2018-12-21 | 日立化成株式会社 | 接合用铜糊料、接合体的制造方法及半导体装置的制造方法 |
CN109887639A (zh) * | 2019-01-18 | 2019-06-14 | 昆明贵金属研究所 | 一种可焊接低温固化型功能银浆及其制备方法 |
CN109962020A (zh) * | 2017-12-14 | 2019-07-02 | 华为技术有限公司 | 一种用于封装芯片的方法 |
CN110167695A (zh) * | 2017-01-11 | 2019-08-23 | 日立化成株式会社 | 无加压接合用铜糊料、接合体及半导体装置 |
CN110462753A (zh) * | 2017-03-30 | 2019-11-15 | 哈利玛化成株式会社 | 导电性糊剂 |
CN110612173A (zh) * | 2017-05-16 | 2019-12-24 | 株式会社Lg化学 | 金属泡沫的制备方法 |
CN110809806A (zh) * | 2017-07-03 | 2020-02-18 | 同和电子科技有限公司 | 导电性糊料 |
WO2020199637A1 (zh) * | 2019-04-03 | 2020-10-08 | 深圳第三代半导体研究院 | 一种多尺寸混合纳米颗粒膏体及其制备方法 |
WO2020199638A1 (zh) * | 2019-04-03 | 2020-10-08 | 深圳第三代半导体研究院 | 一种多尺寸纳米颗粒混合金属膜及其制备方法 |
CN112694838A (zh) * | 2020-12-22 | 2021-04-23 | 北京翠铂林有色金属技术开发中心有限公司 | 一种新型半导体元件结合用贵金属粘结剂 |
TWI759279B (zh) * | 2017-01-26 | 2022-04-01 | 日商昭和電工材料股份有限公司 | 無加壓接合用銅糊、接合體與其製造方法及半導體裝置 |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101852649B1 (ko) * | 2010-12-17 | 2018-04-26 | 후루카와 덴키 고교 가부시키가이샤 | 가열 접합용 재료, 가열 접합용 코팅 재료, 코팅물, 및 전자부품의 접합방법 |
JP5780191B2 (ja) * | 2012-03-28 | 2015-09-16 | 三菱マテリアル株式会社 | パワーモジュール、及び、パワーモジュールの製造方法 |
JP6170045B2 (ja) * | 2012-06-25 | 2017-07-26 | イビデン株式会社 | 接合基板及びその製造方法ならびに接合基板を用いた半導体モジュール及びその製造方法 |
JP6053386B2 (ja) * | 2012-08-09 | 2016-12-27 | 古河電気工業株式会社 | 電子部品の接合方法 |
JP6179520B2 (ja) | 2012-09-05 | 2017-08-16 | 日立化成株式会社 | 銀ペースト組成物及びそれを用いた半導体装置 |
US9190188B2 (en) * | 2013-06-13 | 2015-11-17 | E I Du Pont De Nemours And Company | Photonic sintering of polymer thick film copper conductor compositions |
JP6178850B2 (ja) * | 2013-06-28 | 2017-08-09 | 古河電気工業株式会社 | 接続構造体、及び半導体装置 |
JP5642312B1 (ja) * | 2014-05-13 | 2014-12-17 | イサハヤ電子株式会社 | 半導体装置及びその製造方法 |
JP6462715B2 (ja) * | 2014-11-07 | 2019-01-30 | 新日鐵住金株式会社 | 電子部品の導電性接合体及びこれを用いた半導体装置、並びに導電性接合体の製造方法 |
JP2016171014A (ja) * | 2015-03-13 | 2016-09-23 | 東洋インキScホールディングス株式会社 | レーザー加工用導電性ペースト、およびその利用 |
US10594008B2 (en) | 2015-07-31 | 2020-03-17 | Dan Curfew | Electrochemical cell |
US9637648B2 (en) | 2015-08-13 | 2017-05-02 | E I Du Pont De Nemours And Company | Photonic sintering of a solderable polymer thick film copper conductor composition |
US9637647B2 (en) | 2015-08-13 | 2017-05-02 | E I Du Pont De Nemours And Company | Photonic sintering of a polymer thick film copper conductor composition |
CN107949447B (zh) * | 2015-09-07 | 2020-03-03 | 日立化成株式会社 | 接合用铜糊料、接合体的制造方法及半导体装置的制造方法 |
WO2017043541A1 (ja) | 2015-09-07 | 2017-03-16 | 日立化成株式会社 | 接合用銅ペースト、接合体の製造方法及び半導体装置の製造方法 |
JP7005121B2 (ja) * | 2015-12-04 | 2022-01-21 | 昭和電工マテリアルズ株式会社 | 無加圧接合用銅ペースト、接合体、及び半導体装置 |
JP6887293B2 (ja) * | 2016-04-28 | 2021-06-16 | Dowaエレクトロニクス株式会社 | 接合材およびそれを用いた接合方法 |
EP3267491A1 (en) * | 2016-07-06 | 2018-01-10 | Karlsruher Institut für Technologie | Process for producing highly conductive, printable pastes from capillary suspensions |
WO2018092671A1 (ja) * | 2016-11-18 | 2018-05-24 | 古河電気工業株式会社 | 接合フィルム、ウエハ加工用テープ、接合体の製造方法および接合体 |
JP6907540B2 (ja) * | 2017-01-11 | 2021-07-21 | 昭和電工マテリアルズ株式会社 | 接合用銅ペースト、焼結体、接合体、半導体装置及びそれらの製造方法 |
US11931808B2 (en) | 2018-08-08 | 2024-03-19 | Mitsui Mining & Smelting Co., Ltd. | Bonding composition, conductor bonding structure, and method for producing same |
JP7468358B2 (ja) * | 2018-11-29 | 2024-04-16 | 株式会社レゾナック | 接合体及び半導体装置の製造方法、並びに接合用銅ペースト |
JP2020102316A (ja) * | 2018-12-20 | 2020-07-02 | Dic株式会社 | ピラー用導電性ペースト |
KR20200083697A (ko) | 2018-12-28 | 2020-07-09 | 삼성전자주식회사 | 접착 필름, 이를 이용한 반도체 장치, 및 이를 포함하는 반도체 패키지 |
JP7264669B2 (ja) * | 2019-03-01 | 2023-04-25 | 株式会社ジャパンディスプレイ | 表示装置 |
JP7293160B2 (ja) | 2020-03-24 | 2023-06-19 | 株式会社東芝 | 半導体装置 |
JP2022133735A (ja) * | 2021-03-02 | 2022-09-14 | 三菱マテリアル株式会社 | プリフォーム層付きの接合用シート及び接合体の製造方法並びにプリフォーム層付きの被接合部材 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1021744A (ja) * | 1996-06-28 | 1998-01-23 | Mitsuboshi Belting Ltd | 銅導体ペースト及び該銅導体ペーストを印刷した基板 |
JP2004111253A (ja) * | 2002-09-19 | 2004-04-08 | Noda Screen:Kk | 電子デバイスの電気的接続用導電性組成物および電子デバイス |
JP2006321948A (ja) * | 2005-05-20 | 2006-11-30 | Sumitomo Electric Ind Ltd | 金属微粒子分散液とそれを用いる金属被膜の形成方法 |
JP2007035353A (ja) * | 2005-07-25 | 2007-02-08 | Namics Corp | 金属ペースト |
JP2008138286A (ja) * | 2006-11-09 | 2008-06-19 | Furukawa Electric Co Ltd:The | 微粒子分散溶液、及び微粒子分散溶液の製造方法 |
CN101620909A (zh) * | 2008-06-05 | 2010-01-06 | 垂德维夫瑞股份有限公司 | 软磁材料及该软磁材料组成的制品的制造方法 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3827569B2 (ja) | 2001-12-06 | 2006-09-27 | 旭化成エレクトロニクス株式会社 | 微細パターン接続用回路部品およびその形成方法 |
JP4255847B2 (ja) | 2004-01-27 | 2009-04-15 | 田中貴金属工業株式会社 | 金属ペーストを用いた半導体ウェハーへのバンプの形成方法 |
JP3858902B2 (ja) | 2004-03-03 | 2006-12-20 | 住友電気工業株式会社 | 導電性銀ペーストおよびその製造方法 |
JP4635230B2 (ja) | 2005-01-20 | 2011-02-23 | 日産自動車株式会社 | 接合方法及び接合構造 |
KR100658492B1 (ko) | 2005-03-21 | 2006-12-15 | 주식회사 잉크테크 | 도전성 잉크 조성물 및 이를 이용한 박막 형성방법 |
US7745013B2 (en) * | 2005-12-30 | 2010-06-29 | Intel Corporation | Solder foams, nano-porous solders, foamed-solder bumps in chip packages, methods of assembling same, and systems containing same |
JP4821396B2 (ja) | 2006-03-27 | 2011-11-24 | 住友金属鉱山株式会社 | 導電性組成物及び導電膜形成方法 |
JP5376808B2 (ja) * | 2008-01-25 | 2013-12-25 | Dic株式会社 | 透明導電性フィルムの製造方法、透明導電性フィルム及びタッチパネル |
JP5363839B2 (ja) | 2008-05-12 | 2013-12-11 | 田中貴金属工業株式会社 | バンプ及び該バンプの形成方法並びに該バンプが形成された基板の実装方法 |
JP2011526054A (ja) * | 2008-06-12 | 2011-09-29 | ナノマス テクノロジーズ インコーポレイテッド | 導電性インクおよびペースト |
JP5038267B2 (ja) | 2008-09-01 | 2012-10-03 | 株式会社東海理化電機製作所 | エンジンスタータースイッチ装置 |
-
2011
- 2011-03-18 WO PCT/JP2011/001615 patent/WO2011114747A1/ja active Application Filing
- 2011-03-18 KR KR1020127026988A patent/KR20130061671A/ko active Search and Examination
- 2011-03-18 EP EP11755937.7A patent/EP2549488B1/en active Active
- 2011-03-18 US US13/634,057 patent/US10046418B2/en active Active
- 2011-03-18 JP JP2011535811A patent/JP5041454B2/ja active Active
- 2011-03-18 CN CN201180014310.3A patent/CN102812520B/zh active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1021744A (ja) * | 1996-06-28 | 1998-01-23 | Mitsuboshi Belting Ltd | 銅導体ペースト及び該銅導体ペーストを印刷した基板 |
JP2004111253A (ja) * | 2002-09-19 | 2004-04-08 | Noda Screen:Kk | 電子デバイスの電気的接続用導電性組成物および電子デバイス |
JP2006321948A (ja) * | 2005-05-20 | 2006-11-30 | Sumitomo Electric Ind Ltd | 金属微粒子分散液とそれを用いる金属被膜の形成方法 |
JP2007035353A (ja) * | 2005-07-25 | 2007-02-08 | Namics Corp | 金属ペースト |
JP2008138286A (ja) * | 2006-11-09 | 2008-06-19 | Furukawa Electric Co Ltd:The | 微粒子分散溶液、及び微粒子分散溶液の製造方法 |
CN101620909A (zh) * | 2008-06-05 | 2010-01-06 | 垂德维夫瑞股份有限公司 | 软磁材料及该软磁材料组成的制品的制造方法 |
Cited By (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105981111A (zh) * | 2013-12-10 | 2016-09-28 | 同和电子科技有限公司 | 导电性糊料和使用该导电性糊料的导电膜的制造方法 |
CN107249787A (zh) * | 2014-09-01 | 2017-10-13 | 同和电子科技有限公司 | 粘合材料和使用所述粘合材料的粘合方法 |
CN107249787B (zh) * | 2014-09-01 | 2020-12-01 | 同和电子科技有限公司 | 粘合材料和使用所述粘合材料的粘合方法 |
CN107112068A (zh) * | 2015-01-13 | 2017-08-29 | 同和电子科技有限公司 | 导电性糊料以及使用该糊料的导电膜的制造方法 |
CN108140710A (zh) * | 2015-12-15 | 2018-06-08 | 株式会社Lg化学 | 金属糊料和热电模块 |
US10998482B2 (en) | 2015-12-15 | 2021-05-04 | Lg Chem, Ltd. | Metal paste and thermoelectric module |
CN109070206A (zh) * | 2016-04-28 | 2018-12-21 | 日立化成株式会社 | 接合用铜糊料、接合体的制造方法及半导体装置的制造方法 |
US11532588B2 (en) | 2017-01-11 | 2022-12-20 | Showa Denko Materials Co., Ltd. | Copper paste for pressureless bonding, bonded body and semiconductor device |
CN110167695A (zh) * | 2017-01-11 | 2019-08-23 | 日立化成株式会社 | 无加压接合用铜糊料、接合体及半导体装置 |
US10930612B2 (en) | 2017-01-11 | 2021-02-23 | Showa Denko Materials Co., Ltd. | Copper paste for pressureless bonding, bonded body and semiconductor device |
TWI759279B (zh) * | 2017-01-26 | 2022-04-01 | 日商昭和電工材料股份有限公司 | 無加壓接合用銅糊、接合體與其製造方法及半導體裝置 |
CN110462753A (zh) * | 2017-03-30 | 2019-11-15 | 哈利玛化成株式会社 | 导电性糊剂 |
CN110612173A (zh) * | 2017-05-16 | 2019-12-24 | 株式会社Lg化学 | 金属泡沫的制备方法 |
CN110809806A (zh) * | 2017-07-03 | 2020-02-18 | 同和电子科技有限公司 | 导电性糊料 |
CN110809806B (zh) * | 2017-07-03 | 2021-07-06 | 同和电子科技有限公司 | 导电性糊料 |
CN109962020A (zh) * | 2017-12-14 | 2019-07-02 | 华为技术有限公司 | 一种用于封装芯片的方法 |
CN109887639B (zh) * | 2019-01-18 | 2021-01-26 | 昆明贵金属研究所 | 一种可焊接低温固化型功能银浆及其制备方法 |
CN109887639A (zh) * | 2019-01-18 | 2019-06-14 | 昆明贵金属研究所 | 一种可焊接低温固化型功能银浆及其制备方法 |
WO2020199638A1 (zh) * | 2019-04-03 | 2020-10-08 | 深圳第三代半导体研究院 | 一种多尺寸纳米颗粒混合金属膜及其制备方法 |
WO2020199637A1 (zh) * | 2019-04-03 | 2020-10-08 | 深圳第三代半导体研究院 | 一种多尺寸混合纳米颗粒膏体及其制备方法 |
CN112694838A (zh) * | 2020-12-22 | 2021-04-23 | 北京翠铂林有色金属技术开发中心有限公司 | 一种新型半导体元件结合用贵金属粘结剂 |
Also Published As
Publication number | Publication date |
---|---|
CN102812520B (zh) | 2016-10-19 |
JP5041454B2 (ja) | 2012-10-03 |
EP2549488A1 (en) | 2013-01-23 |
EP2549488A4 (en) | 2014-06-04 |
JPWO2011114747A1 (ja) | 2013-06-27 |
US20130001774A1 (en) | 2013-01-03 |
US10046418B2 (en) | 2018-08-14 |
EP2549488A9 (en) | 2014-12-03 |
KR20130061671A (ko) | 2013-06-11 |
WO2011114747A1 (ja) | 2011-09-22 |
EP2549488B1 (en) | 2016-06-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN102812520A (zh) | 导电性糊料和由该糊料得到的导电连接部件 | |
JP5158904B2 (ja) | 導電接続部材、及び導電接続部材の作製方法 | |
JP5416153B2 (ja) | 導電性ペースト、及びその製造方法、並びに導電接続部材 | |
JP4848674B2 (ja) | 樹脂金属複合導電材料およびその製造方法 | |
JP6337909B2 (ja) | 電子部品モジュールの製造方法 | |
JP5718536B2 (ja) | 接続構造体、及び半導体装置 | |
US10369667B2 (en) | Sintered body made from silver fine particles | |
CN103608140B (zh) | 接合材料及使用该接合材料制成的接合体 | |
JP6372978B2 (ja) | 導電性ペースト | |
KR102225427B1 (ko) | 파워 모듈용 기판 및 그 제조 방법, 파워 모듈 | |
JP6133149B2 (ja) | 導電性ペースト、及びその製造方法 | |
JP7317397B2 (ja) | 酸化銅ペースト及び電子部品の製造方法 | |
WO2021039874A1 (ja) | 低温焼結性接合ペースト及び接合構造体 | |
EP4023362A1 (en) | Copper paste for forming sintered copper pillar and method for producing bonded body | |
JP5306322B2 (ja) | 複合銀ナノペースト、その製法、接合方法及びパターン形成方法 | |
JP2016167379A (ja) | 導電ペースト、その乾燥物、及び複合体 | |
JP2009130072A (ja) | 半導体装置およびその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant |