CN102318045B - 改良式击穿电压的边缘端点 - Google Patents

改良式击穿电压的边缘端点 Download PDF

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CN102318045B
CN102318045B CN200980113106.XA CN200980113106A CN102318045B CN 102318045 B CN102318045 B CN 102318045B CN 200980113106 A CN200980113106 A CN 200980113106A CN 102318045 B CN102318045 B CN 102318045B
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field plate
enlivens
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曾军
穆罕默德·恩·达维希
苏世宗
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Abstract

本发明公开了一种在边缘端点区域上具有低表面电场的金属氧化物半导体场效晶体管开关，其还具有提高的击穿电压。该金属氧化物半导体场效晶体管开关具有利用N-P-N夹层结构的新式边缘端点结构。该金属氧化物半导体场效晶体管开关还具有多晶硅场板构造以增强在该N-P-N夹层结构中主要的PN结边缘上的任何耗尽层的任何扩展。

Description

改良式击穿电压的边缘端点
与相关申请的互相参考：
本申请要求2008年4月29日提交的序列号为61/125,892以及2008年年2月14日提交的序列号为61/065,759的美国申请的优先权，在此通过参引并入其全部内容.
技术领域
本发明关于功率晶体管或开关，尤其是关于具有浅本体结(junction)的功率金属氧化物半导体场效晶体管的边缘端点区域结构。
背景技术
为了改善功率半导体金属氧化物半导体场效晶体管开关的效能，可以使用短沟道来减少导电与切换功率的耗损。如此先进的功率金属氧化物场效半导体晶体管开关的一个范例是利用凹陷场板(RFP，Recessed Field Plate)设计，用以限制耗尽区域扩展进入本体区域。如此的结构将形成一较短沟道长度而不会遭受击穿崩溃与高漏电流。德尔维希提出的第2008/0073707 A1号美国专利申请案已描述许多凹陷场板-金属氧化物场效半导体晶体管的实施例，其在此完整的并入作为参考。图1描述的该金属氧化物场效半导体晶体管具有掺杂多晶硅(PolySi)的凹陷场板(RFP)102、掺杂多晶硅栅极104和本体106。本体106通常具有浅本体面深度(例如目前小于0.5μm)，用以达成短沟道长度(例如目前小于0.25μm)。
然而，可以理解的是，金属氧化物场效半导体晶体管装置的PN本体结处必须适当地沿着周边终止；否则装置将具有低击穿电压。图2揭示传统的具有凹陷场板结构的金属氧化物场效半导体晶体管装置的边缘端点(edgetermination)的范例。端点区域具有第一介电层202和第二介电层204，以及多晶硅(PolySi)层206、源极金属208和N型外延层210。P+区域212嵌埋在源极金属208之下，并且P区域214嵌埋在第一介电层202和第二介电层204之下。不过，传统端点结构对于在具有浅本体结的更先进装置内将击穿电压最大化的效果就不太好。
图3介绍了一种目前在边缘端点区域上引入深PN结的方式，在图3内，端点区域具有第一介电层302和第二介电层304，以及多晶硅(PolySi)场板306、源极金属308和N-外延层310。第一P+区域312嵌埋在源极金属208之下；P区域314借由第一介电层302隔开而嵌埋在第二介电层304之下；以及，较深的第二轻度掺杂P-区域316嵌埋在引入较深PN结多晶硅场板306之下并增加击穿电压。P区域314耦合至P+区域312和第二轻度掺杂深P-区域316。然而，此结构需要额外屏蔽与处理步骤，因此增加制造复杂度与成本。
进一步地，活跃区域(active area)与边缘端点区域间的现有布局并无法有效地避免边缘端点区域内的电压击穿。图11是传统活跃区域至栅极总线或边缘端点区域的布局范例示意。于图11中，活跃区域与端点区域之间并无过渡(transition)的设计。利用这类浅本体结装置进行布局系存在许多缺点，该装置例如是具有凹陷场板(RFP)结构的金属氧化物半导体场效晶体管。例如，由于沟槽底部(图中未示出)比沟槽深度浅，故其所受到本体PN结的保护较少，并且在装置周边上的最后的沟槽可能由于该浅PN结而导致击穿崩溃。
发明内容
本申请揭示一种新的功率切换结构及方法。特别地，本申请揭示各种针对边缘端点，尤其是针对包括浅本体结的垂直功率晶体管的边缘端点的新方法。在所揭示一系列实施例中，浅“夹层”双结结构包含在端点区域中。
这些夹层结构可与各种场板设计结合。其中，值得注意的实施例将多结(muli-juntion)结构与环绕沟槽场板结合，以及还包括在环绕沟槽场板底下的补偿掺杂物。这将有效地结合凹陷场板与其它先进晶体管制程。
在其它实施例内，在活跃区域与端点区域(也称为多晶硅栅极总线)之间引入过渡区(transition)。该过渡区可包括与栅极沟槽和凹陷场板沟槽交错的多个多晶硅指。另外在过渡区内将N+区域排除在外，进一步改善抵抗在此区内击穿的能力。
在各种实施例中揭示的创新点提供了至少一个或多个优点。然而，并非所有这些优点产生自所揭示的每一个创新点，这些优点并不受限于各种声明的发明。
●击穿电压的改善；
●不提高制程复杂度；
●针对端点不需额外屏蔽步骤
●不需额外植入步骤用以形成端点；
●由于形成栅极接触，故在不损失任何良率之下，即就可达成栅极沟槽的间距紧密；
●该端点结构与短沟道垂直活跃区域结构协同结合，可在现有的结构中有效地运用浅扩散；
●功率切换装置允许具有较大击穿电压的短沟道。
附图说明
图1是已知具有一本体的金属氧化物半导体场效晶体管开关的示意图，其中该本体具有浅的本体结(＜0.5μm)比短沟道区域(＜0.25μm)还深。
图2为具有传统简单场板边缘端点的已知先进功率金属氧化物半导体场效晶体管开关的示意图。
图3为在边缘端点区域上具有深PN结的已知金属氧化物半导体场效晶体管开关的示意图。
图4为具有PN结端点的金属氧化物半导体场效晶体管开关的示意图，其中，该PN结端点使用N-P-N夹层结构与平面多晶硅场板和金属场板至少其中之一结合。
图5为具有平面多晶硅场板、N-P-N夹层端点结构以及内含介电材料的宽沟槽的金属氧化物半导体场效晶体管开关的示意图。
图6为具有N-P-N夹层端点结构以及内含凹陷多晶硅场板的宽沟槽的金属氧化物半导体场效晶体管开关的示意图。
图7为具有至少其中一个N-P-N夹层端点结构完全嵌埋，以及在平坦化的多晶硅场沟槽填入导电材料的金属氧化物半导体场效晶体管开关的示意图。
图8为具有至少一个额外浮动P区域的图7的金属氧化物半导体场效晶体管的示意图。
图9为具有包含图8中PN本体结端点结构的深PN本体结的金属氧化物半导体场效晶体管开关的示意图。
图10a显示类似图8的端点结构，其具有位于嵌埋多晶硅场板沟槽底部的P区域来取代在沟槽之间具有的浮动P区域。
图10b显示类似图8的端点结构，其具有位于嵌埋多晶硅场板沟槽底部的额外P区域。
图10c显示其它端点结构，其中在嵌埋在多晶硅场板沟槽底部上的p型扩散已融合。
图10d显示类似图10c的端点结构，其中所有P区域彼此相连。
图10e显示类似图10d的端点结构，其中具有PN结而非N-P-N夹层结构。
图11为传统活跃区域至栅极总线或边缘端点区域的布局的上视图。
图12为在装置的活跃区域与多晶硅栅极总线(或边缘端点区域)之间具有一过渡区的金属氧化物半导体场效晶体管开关的上视图。
图13为在装置的活跃区域与多晶硅栅极总线(或边缘端点区域)之间具有一过渡区并且栅极沟槽之间空间极窄的金属氧化物半导体场效晶体管开关的上视图。
图14为图4中金属氧化物半导体场效晶体管的端点结构内开始击穿时的电位轮廓模拟的示意图。
图15为图10c中金属氧化物半导体场效晶体管的端点结构内开始击穿时的电位轮廓模拟的示意图。
【主要组件符号说明】
102掺杂多晶硅凹陷场板
104掺杂多晶硅栅极
106本体
202第一介电层
204第二介电层
206多晶硅层
208源极金属
210n型外延层
212P+区域
214P区域
302第一介电层
304第二介电层
306多晶硅场板
308源极金属
310N-外延层
312第一P+区域
314P区域
316第二较深轻度掺杂P-区域
401p+区域
402第一介电层
404N-P-N夹层结构
406第二介电层
408正常掺杂区域
409轻度掺杂N-区域
411源极金属
412轻度掺杂P-区域
416简易阶梯状场板
502二氧化硅
504平多晶硅场板
506第二氧化物层
508源极金属
510浅重度掺杂p+区域
512嵌埋的轻度掺杂P-区域
516浅N-P-N夹层端点结构
518宽沟槽
520N-外延层
601N-P-N夹层结构
602宽沟槽
604浅p+区域
606第一氧化物
608凹陷多晶硅场板
610源极金属
612氧化物
702浅N-P-N夹层
704全嵌埋沟槽
704嵌埋的多晶硅场板结构
706导电材料
706沟槽结构
706嵌埋的多晶硅场板结构
708N-外延层
710一层氧化物
712p+区域
716氧化物
801p+区域
802浮动P区域
804浅N-P-N夹层结构
808多晶硅场板
902深P+本体区域
904浅的N-P-N结构
906嵌埋平坦化多晶硅场板
910P浮动区域
1010P型掺杂区域
1012p-区域
1014场沟槽
1210过渡区域
1212多晶硅指
1214栅极沟槽
1216凹陷场板沟槽
1218周边区域
1310过渡区
1312通过多晶硅带
1314多晶硅指
1316栅极沟槽
具体实施方式
在此将特别参考本申请较佳具体实施例(通过示例方式，但不以此为限)，来描述本申请案的许多创新技术。本申请描述许多具体实施例，然而该以下具体实施例不得作为权利要求书的限制。
为视图的简化与清晰起见，图式例示描述一般方式建构，并且省略已知特征与技术的描述与细节，以避免不必要地模糊本发明。此外，图式内的组件并非依照实际比例绘制，某些区域或组件可扩大绘制，用以帮助了解本发明的实施例。
需考虑和注意到是，该设计同时应用在n型与p型金属氧化物半导体场效晶体管上；为了清晰起见，主要以n型金属氧化物半导体场效晶体管结构为范例说明，然而本领域技术人员应知道对于该设计可进行修改用以制作类似的p型装置。“+”符号表示较高掺杂度，而无“+”符号表示普通掺杂度。此处的图式仅供例示，而通常描绘端点区域位于金属氧化物半导体场效晶体管装置活跃区域的左侧。
图4显示具有使用N-P-N夹层结构404的PN结端点的金属氧化物半导体场效晶体管开关。于此范例中，N-P-N夹层结构404与简易阶梯状场板416结合。场板416覆盖第一介电层402的边缘，然后再被第二介电层406覆盖。该N-P-N结构404包括轻度掺杂N-区域409、轻度掺杂P-区域412以及位于轻度掺杂P-区域412和p+区域401下方的正常掺杂区域408。例如可利用具有范围与分散的本体来达成植入，用以使得在表面上n型材料不会逆转成p型。这意味着，P+接点扩散必须够深以与本体扩散接触。
多晶硅场板416可连接至源极端(图上未显示)或栅极端(图上未显示)。如果需要，还可使用额外的金属场板。第一介电层402和第二介电层406可由二氧化硅或其它类似材料制成。这两层将源极金属411与外延层408的除P+区域401以外的其它区域隔开。
图14显示具有图4内边缘端点结构的金属氧化物半导体场效晶体管装置的漏极至源极损耗电压轮廓的仿真结果。在图14内，边缘端点结构显示44V的BVdss(漏极至源极的击穿电压)。这显著高于具由可比较的凹陷场板和端点结构的传统金属氧化物半导体场效电晶的击穿电压。可以看到的是，夹层结构404内的p-层已经部分耗尽。请注意有多少等位线通过左上角的此p层，并且越过最下面的第三角，但是未越过p层剩余角落。据信，耗尽受限在夹层结构中间层的事实为其在本文中有利的一部分原因。
图5显示具有填入了例如二氧化硅502这类介电材料的宽沟槽518的其它具体实施例。平的多晶硅场板504配置在氧化物层502顶端，而第二氧化物层506覆盖场板504。浅N-P-N夹层端点结构516配置在宽沟槽518与浅重度掺杂p+区域510之间。源极金属508与重度掺杂浅的P+区域510接触。N-P-N夹层结构516在N-外延层内形成，并且与p+区域510连接。
N-P-N夹层结构包括相邻于P+区域510的嵌埋的轻度掺杂P-区域512，以便在N-外延层520的顶端表面与p+区域510之间有个浅N-区域，形成N-P-N夹层结构。
图6显示金属氧化物半导体场效晶体管开关的其它具体实施例，该金属氧化物半导体场效晶体管开关具有类似图5内的端点结构，其中类似N-P-N夹层端点601位于宽沟槽602侧壁的其中之一的与浅p+区域604之间。然而，在图6中，宽沟槽602填入一层第一氧化物606以及在氧化物606顶端填入凹陷多晶硅场板608或其它导电材料。浅p+区域604与源极金属610接触，第二层氧化物612将此金属与多晶硅场板608分隔。
请参阅图7，该图描述了具有图5所示的N-P-N夹层结构的金属氧化物半导体场效晶体管端点结构的另一具体实施例。与浅的重度掺杂p+区域712接触并相邻的N-P-N夹层702的浅的层位于内含平坦多晶硅的全嵌埋沟槽704及/或其它导电材料706与p+区域712之间。夹层结构702、沟槽结构706和p+区域702在水平面上平行。在沉积一层氧化物710之前，在N-外延层708的顶端表面上建立许多嵌埋的多晶硅场板结构704和706。沟槽704的侧壁可与类似氧化物的介电材料隔离。
图8显示图7内具有类似浅的N-P-N夹层结构804和相邻p+区域801的金属氧化物半导体场效晶体管开关的修改。不过在图8内，端点结构进一步具有至少一个浮动P区域802，其位于内含沟槽的多晶硅场板808之间，并且与沟槽侧壁的其中之一接触。透过扩散或驱动处理可达成浮动P区域802。
上述端点结构的具体实施例还可应用在具有深PN本体结的金属氧化物半导体场效晶体管装置。图9显示这种应用的示例。图8中金属氧化物半导体场效晶体管的端点区域已经修改成具有相邻于类似的浅N-P-N结构904的深P+本体区域902，其中类似的浅N-P-N结构904位于深PN本体区域902与配置在各自沟槽内的嵌埋平坦化多晶硅场板906群之间。P浮动区域910可轻度掺杂p型掺杂物。
如图10a至图10d内所揭示，端点结构的场板区域可进一步修改，图4至图6内宽沟槽的底部区域以及图7至图9内多个场板沟槽的底部区域可加入额外的P型掺杂区域1010。而该区域的加入可以平滑电场散布并且保护沟槽底部角落。加入的p型掺杂区域1010可与场沟槽1014之间的浮动p区域或p-区域1012结合，如图10b内所示。根据特定特征需求，浮动p区域1014可为轻度掺杂或重度掺杂。
p型掺杂区域1010可利用改变植入角度、扩散条件以及掺杂物浓度，扩散成不同形状。围绕场板沟槽底部的掺杂p区域1010可受限在局部区域，并且可如图10c内所示彼此合并。掺杂的p型区域1010还可与浮动p-区域1012合并，形成围绕场板沟槽1014的扩展的p区域，如图10d所示。这些修改系进一步避免击穿崩溃，并且增加漏极至源极击穿电压。
如图10e所示为已经进行的边缘端点结构开始崩溃时的电位轮廓模拟。如图15所示，针对图10e的端点结构，相较于具有44V的BVdss的图4内端点结构(图4)以及根据本体结深度具有10-30V的BVdss的传统端点结构，BVdss提高为53V。图15中可看出图10e内实体结构的轮廓，不过此具体实施例内显示四个同心场板环。值得注意的是，位于场板环之间的电压轮廓线，显示出它们全都在不同电压上。另外值得注意的是，场板环底下的补偿(或甚至反掺杂)区域具有将等位线往下弯曲至低于最外侧场板环的效果。这导致最内侧场环底下的等位线不太弯曲(更一致水平)。这是优点，因为夹层结构404的末端(也可当成本体扩散的末端)为最可能开始崩溃的点。如图15内所示，此处的等位线相当平坦，这可以去除电场的几何增强，因此改善崩溃以及热载子行为。
若要改善金属氧化物半导体场效晶体管装置对于击穿电压以及击穿崩溃的阻力，则在金属氧化物半导体场效晶体管装置的活跃区域与多晶硅栅极总线(或边缘端点区)之间引入过渡区域1210，如图12所示。
过渡区域1210包括与栅极沟槽1214和凹陷场板沟槽1216交错的多个多晶硅指1212，以便在每一沟槽的末端上，有更多PN本体结区域围绕每一多晶硅指1212来提供更多端点保护。此外，凹陷场板沟槽也提供更多屏蔽效果，以避免耗尽层延伸进入本体。因此，提高了PN结的击穿电压。更进一步地，N+区域故意排除在无栅极沟槽的周边区域1218之外，因此通常可以避免过渡区域内的击穿崩溃。
图13显示用于在金属氧化物半导体场效晶体管装置的活跃区域与多晶硅栅极总线(或边缘端点区域)之间引入一过渡区域的替代设计。在图13中，过渡区域1310具有多晶硅指1314，其未与栅极或凹陷场板沟槽直接接触，而与混合交叉(cross-over)的多晶硅带1312合并，该多晶硅带1312接触并跨越所有单独的栅极沟槽1316。因此，过渡区域内只需要形成少数多晶硅指1314。针对在栅极沟槽之间具有极窄空间的金属氧化物半导体场效晶体管而言，如图13所示揭示了较佳的结构。图13的结构还比图12的结构容易实现，因为可更容易地控制多晶硅蚀刻处理与栅极延展电阻。
上述描述的结构可与具有浅的PN本体结的任何活跃区域金属氧化物半导体场效晶体管设计结合，以便克服击穿电压以及穿通击穿电压的降低。该描述的端点结构也可用在具有深PN本体结的金属氧化物半导体场效晶体管装置。范例金属氧化物半导体场效晶体管装置具有大约5.5μm的外延层厚度，具有大约0.43欧姆公分的体积电阻率。栅极沟槽或凹陷场板沟槽的沟槽深度较佳大约是1.0μm。栅极沟槽与凹陷场板沟槽大体上具有相同深度。栅极沟槽与凹陷场板沟槽可与利用沉积或氧化处理产生的介电材料层绝缘，例如二氧化硅。栅极电极氧化物厚度较佳大约是并且凹陷场板电极氧化物厚度大约是
通过植入P型掺杂物可形成N-P-N夹层结构、形成p本体区域、P浮动区域以及各种沟槽底部上的各种p区域，例如：可使用剂量5×1012cm-2并且能量60-80keV的硼植入P-区域、使用剂量5×1012-5×1013cm-2并且能量60-120keV的硼用以P区域的植入以及使用剂量2×1015至4×1015cm-2并且能量20-60keV的硼用以P+区域的植入。像是钨这类金属塞子可在沉积源极接点层之前，沉积在凹陷场板沟槽的上半部以及端点区域内的多晶硅场板内。
上述许多夹层结构可用与p本体形成的相同制程来形成。
在较佳实施例内，补偿植入至凹陷场板沟槽的能量与剂量也适用于绝缘沟槽。此协同处理提供经济性以及优良效能。随所揭示处理缩放至其它操作电压，可以预期的是，尺寸与掺杂物的预测比例遵照相同比例，例如：在200V的实施例中，发明者预期沟槽深度稍微深一点(例如1.5至2.5微米)，并且预期植入能量与剂量大致相同。当然外延层(epi layer)掺杂大体上较少并且外延层厚度较厚，此为本领域技术人员所熟知。
根据各种实施例，在此提供：一半导体装置，包括一个或多个活跃装置区段；一边缘端点结构，其围绕一个或多个该活跃装置区段；以及多个沟槽场板，其连续围绕该边缘端点以及彼此围绕；其中该场板之一嵌埋在各自沟槽内，并且其中各自浓度的一补偿掺杂物位于该沟槽之下。
根据各种实施例，在此提供：一半导体装置，包括具有一本体结的一个或多个活跃装置区段；一边缘端点结构，其围绕一个或多个该活跃装置区段，并且包括具有背靠背结的一夹层结构，其一大体上与该本体结共平面；以及一个或多个场板，其电容耦合至该边缘端点结构。
根据各种实施例，在此提供：一功率半导体装置，包括一个或多个功率装置的一活跃区域，该功率装置具有该装置关闭时逆向偏压的一第一导电类型本体；以及相邻该活跃区域，一端点区域包括一夹层结构，夹层该结构包括一第一导电类型扩散，以及与位于该第一导电类型扩散之上和之下的第二导电类型扩散。
根据各种实施例，在此提供：一半导体开关，包括具有一本体结的一个或多个活跃装置区段；一边缘端点结构，其围绕一个或多个该活跃装置区段，并且包括具有背靠背结的一夹层结构，该背靠背结之一大体上与该本体结共平面；以及多个沟槽场板，其连续围绕该边缘端点以及彼此围绕；其中该场板之一嵌埋在各自沟槽内，并且其中各自浓度的一补偿掺杂物位于该沟槽之下。
根据各种实施例，在此提供：一种操作功率半导体装置的方法，包括以下操作：a)提供一所要的电流特性，其使用一个或多个活跃装置区段；另同时b)使用围绕一个或多个该活跃装置区段的一边缘端点结构以及连续围绕该边缘端点和彼此围绕的多个沟槽场板，来避免边缘击穿；其中该场板之一嵌埋在各自沟槽内，并且其中各自浓度的一补偿掺杂物位于该沟槽之下。
根据各种实施例，在此提供：一种操作功率半导体装置的方法，包括以下操作：a)提供一所要的电流特性，其使用具有一本体结的一个或多个活跃装置区段；另同时b)借由使用一边缘端点结构，其围绕一个或多个该活跃装置区段，并且包括具有背靠背结的一夹层结构，该背靠背结之一大体上与该本体结共平面，来避免边缘击穿；以及另外一个或多个场板，其电容耦合至该边缘端点结构。
根据各种实施例，在此提供：一种操作功率半导体装置的方法，包括以下操作：a)提供所要的电流特性，其使用具有本体结的一个或多个活跃装置区段；另同时b)借由使用下列避免边缘击穿：边缘端点结构，其围绕一个或多个该活跃装置区段；以及另外多沟槽场板，其连续围绕该边缘端点以及彼此围绕；其中该场板之一嵌埋在各自沟槽内，并且其中各自浓度的一补偿掺杂物位于该沟槽之下。
根据各种实施例，在此提供：一种半导体装置边缘端点结构，包括：夹层结构，其横向围绕一个或多个该活跃装置区段，并且包括背靠背结，该背靠背结之一大体上与该活跃装置区段内的本体结共平面；以及多沟槽场板，其连续彼此围绕；其中该场板之一嵌埋在各自沟槽内，并且其中各自浓度的一补偿掺杂物位于该沟槽之下。
根据各种实施例，在此提供一种在边缘端点区域上具有一低表面电场的金属氧化物半导体场效晶体管开关，并且还可以提高击穿电压。该金属氧化物半导体场效晶体管开关具有运用一N-P-N夹层结构的新式边缘端点结构。该金属氧化物半导体场效晶体管开关也具有一多晶硅场板构造，可用以操作增强位于该N-P-N夹层结构的一主要PN结边缘上任何耗尽层的任何扩展。
<修改与变化>
本领域技术人员将会了解，本申请书内描述的创新概念可在广大应用范围上修改与变化，因此申请标的的范围并不受限于赋予的任何特定范例教导。在此想要包括落入权利要求书的领域与精神内的所有这种变化、修改以及改变。
上面范例的实施例内显示的端点结构可用各种方式修改，并且声明的发明的范围要比任何这些范例的实施例或甚至全部结合在一起都要广泛。例如：其它扩散可与所显示的结构选择性结合，以进一步修改电位分布。类似地，可使用其它形状作为场板的剖面。类似地，若需要可加入额外场板组件。除此以外，端点元件的数量与尺寸取决于相关装置的操作电压与瞬间电压。P本体植入可用来在端点区域内形成N-P-N夹层结构，并且各自局部p区域可植入来在端点区域内形成各自微N-P-N夹层。
对于其它范例类别而言，所揭示的端点结构可结合许多其它活跃装置结构。
针对其它范例，虽然较佳实施例使用硅，所揭示的本发明也可另外用Si.9Ge.1，或各种其它半导体材料来实施。
区域1010可另外掺杂非常轻微的p型掺杂物或非常轻微的n型掺杂物，以便此形成的掺杂物区域1010可为n--(ν区域)或p--型(π区域)或甚至可能是两者都有(由于掺杂物浓度内的空间变化)。
针对其它范例，所揭示的本发明还可适用于二极管。
该装置可用许多布局来制造，包括“带状”与“蜂巢式”布局。源极、本体与漏极区域的层可设置成垂直、半垂直以及横向。外延漂移区域可一致或不一致掺杂。虽然上述实施例包括在基板上成长的外延层，在某些应用当中可省略该外延层。不同实施例的各种特征可根据各种应用结合与重新结合。
该设计适用于IGBT或包括双极性导电的其它装置。该栅极沟槽的底部可用掺杂物修改；该设计也可在该源极结构与该漏极结构上改变；并且可使用替代本体结构；可先产生接点沟槽，然后切削栅极沟槽并且建构该源极与漏极结构。
下列申请案内含额外信息以及替代修改：代理人归档编号MXP-15P、序号61/058,069，6/2/2008提出并且标题为“用以包括固定电荷(PermanentCharge)装置的边缘端点”；代理人归档编号MXP-16P、序号61/060,488，6/11/2008提出并且标题为“金属氧化物半导体场效晶体管开关”；代理人归档编号MXP-17P、序号61/074,162，6/20/2008提出并且标题为“金属氧化物半导体场效晶体管开关”；代理人归档编号MXP-18P、序号61/076,767，6/30/2008提出并且标题为“沟槽栅功率装置”；代理人归档编号MXP-19P、序号61/080,702，7/15/2008提出并且标题为“金属氧化物半导体场效晶体管开关”；代理人归档编号MXP-20P、序号61/084,639，7/30/2008提出并且标题为“包括固定电荷的横向装置”；代理人归档编号MXP-21P、序号61/084,642，7/30/2008提出并且标题为“包括固定电荷的绝缘体装置上的硅S”；代理人归档编号MXP-22P、序号61/027,699，2/11/2008提出并且标题为“在沟槽侧壁使用固定电荷以制造无栅电流源极，有栅电流源极以及肖特基二极管”；代理人归档编号MXP-23P、序号61/028,790，2/14/2008提出并且标题为“沟槽金属氧化物半导体场效晶体管结构以及制造技术，其用于通过沟槽侧壁植入以形成活跃本体区域和源极区域”；代理人归档编号MXP-24P、序号61/028,783，2/14/2008提出并且标题为“用以引入和调整在沟槽金属氧化物半导体场效晶体管中的掺杂物分布的技术以得到改进的装置特性”；代理人归档编号MXP-25P、序号61/091,442，8/25/2008提出并且标题为“包括固定电荷的装置”；代理人归档编号MXP-27P、序号61/118,664，12/1/2008提出并且标题为“改进的功率金属氧化物半导体场效晶体管以及其边缘端点”以及代理人归档编号MXP-28P、序号61/122,794，12/16/2008提出并且标题为“功率金属氧化物半导体场效晶体管Transistor”。
不得将上述本申请案的说明视为暗示任何特定组件、步骤或功能必须包含在权利要求书范围内的必要元件：所申请标的的范围只由允许的权利要求所定义。此外，除非有“装置用于”加上分词的确切字眼，否则这些权利要求书并无唤起35 USC 112节中第六章的意图。
所提出的权利要求书尽可能广泛，无任何标的要撤回、独占或放弃。

Claims (21)

1.一种半导体装置，包括：
一个或多个活跃装置区段；
一边缘端点结构，其围绕一个或多个该活跃装置区段；以及
多个沟槽场板，其连续围绕该边缘端点以及彼此围绕；
其中该场板之一嵌埋在各自沟槽内，并且其中各自浓度的一补偿掺杂物位于该沟槽之下；
其中，该活跃装置区段还包括与活跃装置互相混合的凹陷场板，并且该凹陷场板底下也具有补偿掺杂物浓度，并且，该半导体装置还包括一位于该活跃装置区段与该边缘端点结构之间的过渡区，该过渡区包括与栅极沟槽和凹陷场板沟槽交错的多个多晶硅指。
2.如权利要求1的装置，其中未嵌埋在一沟槽内的一额外场板也围绕一个或多个该沟槽场板。
3.如权利要求1的装置，其中该活跃装置区段包括垂直场效晶体管。
4.如权利要求1的装置，其中，该活跃装置区段内的该凹陷场板具有与一个或多个该沟槽场板相同的特性。
5.如权利要求1的装置，其中多个该沟槽场板电浮动。
6.如权利要求1的装置，其中位于多个该沟槽场板之下的一补偿掺杂物的该各自浓度高到能够反转底下材料的导电类型。
7.如权利要求1的装置，其中位于多个该沟槽场板之下的一补偿掺杂物的该各自浓度向外扩散的距离远到能够相互重叠。
8.如权利要求1的装置，还包括在该沟槽场板内的至少一无沟槽场板。
9.如权利要求1的装置，其中该活跃装置区段包括延伸进入某些端点，但并非全部该端点的一本体结。
10.如权利要求1的装置，其中该活跃装置区段与该端点建构在外延半导体材料内。
11.如权利要求1的装置，其中在该活跃装置区段内有n++掺杂物，但是该沟槽场板之外的任何地方则没有。
12.一种操作功率半导体装置的方法，包括以下操作：
a)提供一所要的电流特性，其使用一个或多个活跃装置区段；另同时
b)使用围绕一个或多个该活跃装置区段的一边缘端点结构以及连续围绕该边缘端点和彼此围绕的多沟槽场板，来避免边缘击穿；
其中该场板之一嵌埋在各自沟槽内，并且其中各自浓度的一补偿掺杂物位于该沟槽之下；
其中，该活跃装置区段也包括与活跃装置互相混合的凹陷场板，并且该凹陷场板底下也具有补偿掺杂物浓度，并且，该半导体装置包括一位于该活跃装置区段与该边缘端点结构之间的过渡区，该过渡区包括与栅极沟槽和凹陷场板沟槽交错的多个多晶硅指。
13.如权利要求12的方法，其中未嵌埋在一沟槽内的一额外场板也围绕一个或多个该沟槽场板。
14.如权利要求12的方法，其中该活跃装置区段包括垂直场效晶体管。
15.如权利要求12的方法，其中，该活跃装置区段内的该凹陷场板具有与一个或多个该沟槽场板相同的特性。
16.如权利要求12的方法，其中多个该沟槽场板电浮动。
17.如权利要求12的方法，其中位于多个该沟槽场板之下的一补偿掺杂物的该各自浓度高到能够反转底下材料的导电类型。
18.如权利要求12的方法，其中位于多个该沟槽场板之下的一补偿掺杂物的该各自浓度向外扩散的距离远到能够相互重叠。
19.如权利要求12的方法，其中该活跃装置区段包括延伸进入某些端点，但并非全部该端点的一本体结。
20.如权利要求12的方法，其中该活跃装置区段与该端点建构在外延半导体材料内。
21.如权利要求12的方法，其中在该活跃装置区段内有n++掺杂物，但是该沟槽场板之外的任何地方则没有。
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