CN101772841B - 具有穿透主体的传导通路的封装式集成电路装置及其制造方法 - Google Patents
具有穿透主体的传导通路的封装式集成电路装置及其制造方法 Download PDFInfo
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/834,765 US7781877B2 (en) | 2007-08-07 | 2007-08-07 | Packaged integrated circuit devices with through-body conductive vias, and methods of making same |
| US11/834,765 | 2007-08-07 | ||
| PCT/US2008/071994 WO2009045626A1 (en) | 2007-08-07 | 2008-08-01 | Packaged integrated circuit devices with through- body conductive vias, and methods of making same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101772841A CN101772841A (zh) | 2010-07-07 |
| CN101772841B true CN101772841B (zh) | 2014-06-18 |
Family
ID=40012850
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200880102233.5A Active CN101772841B (zh) | 2007-08-07 | 2008-08-01 | 具有穿透主体的传导通路的封装式集成电路装置及其制造方法 |
Country Status (7)
| Country | Link |
|---|---|
| US (8) | US7781877B2 (enExample) |
| EP (2) | EP2186135A1 (enExample) |
| JP (1) | JP5723153B2 (enExample) |
| KR (1) | KR101722264B1 (enExample) |
| CN (1) | CN101772841B (enExample) |
| TW (1) | TWI437683B (enExample) |
| WO (1) | WO2009045626A1 (enExample) |
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-
2007
- 2007-08-07 US US11/834,765 patent/US7781877B2/en active Active
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2008
- 2008-08-01 EP EP08835386A patent/EP2186135A1/en not_active Ceased
- 2008-08-01 EP EP19163220.7A patent/EP3528285A1/en active Pending
- 2008-08-01 CN CN200880102233.5A patent/CN101772841B/zh active Active
- 2008-08-01 WO PCT/US2008/071994 patent/WO2009045626A1/en not_active Ceased
- 2008-08-01 KR KR1020107003568A patent/KR101722264B1/ko active Active
- 2008-08-01 JP JP2010520232A patent/JP5723153B2/ja active Active
- 2008-08-07 TW TW97130125A patent/TWI437683B/zh active
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- 2014-05-08 US US14/273,138 patent/US9099571B2/en active Active
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Also Published As
| Publication number | Publication date |
|---|---|
| US20140242751A1 (en) | 2014-08-28 |
| JP5723153B2 (ja) | 2015-05-27 |
| JP2010536178A (ja) | 2010-11-25 |
| US8723307B2 (en) | 2014-05-13 |
| KR20100050511A (ko) | 2010-05-13 |
| EP3528285A1 (en) | 2019-08-21 |
| US20230197690A1 (en) | 2023-06-22 |
| US7781877B2 (en) | 2010-08-24 |
| US11594525B2 (en) | 2023-02-28 |
| US20200279834A1 (en) | 2020-09-03 |
| US20100320585A1 (en) | 2010-12-23 |
| EP2186135A1 (en) | 2010-05-19 |
| US20220285325A1 (en) | 2022-09-08 |
| US10593653B2 (en) | 2020-03-17 |
| TW200915525A (en) | 2009-04-01 |
| TWI437683B (zh) | 2014-05-11 |
| KR101722264B1 (ko) | 2017-03-31 |
| US9099571B2 (en) | 2015-08-04 |
| US20150325554A1 (en) | 2015-11-12 |
| CN101772841A (zh) | 2010-07-07 |
| US12087738B2 (en) | 2024-09-10 |
| US20090039523A1 (en) | 2009-02-12 |
| WO2009045626A1 (en) | 2009-04-09 |
| US11398457B2 (en) | 2022-07-26 |
| US20240421131A1 (en) | 2024-12-19 |
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