KR101722264B1 - 몸체-관통 전도성 비아를 갖는 집적 회로 장치, 반도체 장치 패키지 및 반도체 장치 제조 방법 - Google Patents

몸체-관통 전도성 비아를 갖는 집적 회로 장치, 반도체 장치 패키지 및 반도체 장치 제조 방법 Download PDF

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KR101722264B1
KR101722264B1 KR1020107003568A KR20107003568A KR101722264B1 KR 101722264 B1 KR101722264 B1 KR 101722264B1 KR 1020107003568 A KR1020107003568 A KR 1020107003568A KR 20107003568 A KR20107003568 A KR 20107003568A KR 101722264 B1 KR101722264 B1 KR 101722264B1
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semiconductor
die
conductive
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encapsulating
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KR20100050511A (ko
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통비 지앙
용 푸 치아
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마이크론 테크놀로지, 인크
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/20Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/05Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/08Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs
    • H10W70/09Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H10W70/614Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together the multiple chips being integrally enclosed
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/013Manufacture or treatment of die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/0198Manufacture or treatment batch processes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/01Manufacture or treatment
    • H10W74/014Manufacture or treatment using batch processing
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/01Manufacture or treatment
    • H10W74/019Manufacture or treatment using temporary auxiliary substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • HELECTRICITY
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    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/127Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed characterised by arrangements for sealing or adhesion
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/129Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed forming a chip-scale package [CSP]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/743Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used as a support during manufacture of interconnect decals or build up layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • H10W72/07331Connecting techniques
    • HELECTRICITY
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    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241Dispositions, e.g. layouts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/823Interconnections through encapsulations, e.g. pillars through molded resin on a lateral side a chip
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/941Dispositions of bond pads
    • H10W72/9413Dispositions of bond pads on encapsulations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
KR1020107003568A 2007-08-07 2008-08-01 몸체-관통 전도성 비아를 갖는 집적 회로 장치, 반도체 장치 패키지 및 반도체 장치 제조 방법 Active KR101722264B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/834,765 US7781877B2 (en) 2007-08-07 2007-08-07 Packaged integrated circuit devices with through-body conductive vias, and methods of making same
US11/834,765 2007-08-07
PCT/US2008/071994 WO2009045626A1 (en) 2007-08-07 2008-08-01 Packaged integrated circuit devices with through- body conductive vias, and methods of making same

Publications (2)

Publication Number Publication Date
KR20100050511A KR20100050511A (ko) 2010-05-13
KR101722264B1 true KR101722264B1 (ko) 2017-03-31

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KR1020107003568A Active KR101722264B1 (ko) 2007-08-07 2008-08-01 몸체-관통 전도성 비아를 갖는 집적 회로 장치, 반도체 장치 패키지 및 반도체 장치 제조 방법

Country Status (7)

Country Link
US (8) US7781877B2 (enExample)
EP (2) EP3528285A1 (enExample)
JP (1) JP5723153B2 (enExample)
KR (1) KR101722264B1 (enExample)
CN (1) CN101772841B (enExample)
TW (1) TWI437683B (enExample)
WO (1) WO2009045626A1 (enExample)

Families Citing this family (129)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006052616A1 (en) 2004-11-03 2006-05-18 Tessera, Inc. Stacked packaging improvements
US8058101B2 (en) 2005-12-23 2011-11-15 Tessera, Inc. Microelectronic packages and methods therefor
US7781877B2 (en) 2007-08-07 2010-08-24 Micron Technology, Inc. Packaged integrated circuit devices with through-body conductive vias, and methods of making same
US8044497B2 (en) * 2007-09-10 2011-10-25 Intel Corporation Stacked die package
US7863755B2 (en) * 2008-03-19 2011-01-04 Stats Chippac Ltd. Package-on-package system with via Z-interconnections
SG142321A1 (en) * 2008-04-24 2009-11-26 Micron Technology Inc Pre-encapsulated cavity interposer
US8130527B2 (en) * 2008-09-11 2012-03-06 Micron Technology, Inc. Stacked device identification assignment
US20100133682A1 (en) * 2008-12-02 2010-06-03 Infineon Technologies Ag Semiconductor device
US8258010B2 (en) * 2009-03-17 2012-09-04 Stats Chippac, Ltd. Making a semiconductor device having conductive through organic vias
JP5215244B2 (ja) * 2009-06-18 2013-06-19 新光電気工業株式会社 半導体装置
US8310835B2 (en) * 2009-07-14 2012-11-13 Apple Inc. Systems and methods for providing vias through a modular component
TWI405306B (zh) 2009-07-23 2013-08-11 日月光半導體製造股份有限公司 半導體封裝件、其製造方法及重佈晶片封膠體
US8367470B2 (en) * 2009-08-07 2013-02-05 Stats Chippac, Ltd. Semiconductor device and method of forming cavity in build-up interconnect structure for short signal path between die
KR101088822B1 (ko) * 2009-08-10 2011-12-01 주식회사 하이닉스반도체 반도체 패키지
US7923304B2 (en) * 2009-09-10 2011-04-12 Stats Chippac Ltd. Integrated circuit packaging system with conductive pillars and method of manufacture thereof
KR101563630B1 (ko) * 2009-09-17 2015-10-28 에스케이하이닉스 주식회사 반도체 패키지
US20110084372A1 (en) 2009-10-14 2011-04-14 Advanced Semiconductor Engineering, Inc. Package carrier, semiconductor package, and process for fabricating same
US8378466B2 (en) 2009-11-19 2013-02-19 Advanced Semiconductor Engineering, Inc. Wafer-level semiconductor device packages with electromagnetic interference shielding
TWI408785B (zh) 2009-12-31 2013-09-11 日月光半導體製造股份有限公司 半導體封裝結構
US8569894B2 (en) 2010-01-13 2013-10-29 Advanced Semiconductor Engineering, Inc. Semiconductor package with single sided substrate design and manufacturing methods thereof
US8372689B2 (en) 2010-01-21 2013-02-12 Advanced Semiconductor Engineering, Inc. Wafer-level semiconductor device packages with three-dimensional fan-out and manufacturing methods thereof
US8138014B2 (en) 2010-01-29 2012-03-20 Stats Chippac, Ltd. Method of forming thin profile WLCSP with vertical interconnect over package footprint
US8320134B2 (en) 2010-02-05 2012-11-27 Advanced Semiconductor Engineering, Inc. Embedded component substrate and manufacturing methods thereof
TWI419283B (zh) 2010-02-10 2013-12-11 日月光半導體製造股份有限公司 封裝結構
TWI411075B (zh) 2010-03-22 2013-10-01 日月光半導體製造股份有限公司 半導體封裝件及其製造方法
US8698322B2 (en) * 2010-03-24 2014-04-15 Oracle International Corporation Adhesive-bonded substrates in a multi-chip module
US8278746B2 (en) * 2010-04-02 2012-10-02 Advanced Semiconductor Engineering, Inc. Semiconductor device packages including connecting elements
US8624374B2 (en) 2010-04-02 2014-01-07 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with fan-out and with connecting elements for stacking and manufacturing methods thereof
US8677613B2 (en) 2010-05-20 2014-03-25 International Business Machines Corporation Enhanced modularity in heterogeneous 3D stacks
US10672748B1 (en) * 2010-06-02 2020-06-02 Maxim Integrated Products, Inc. Use of device assembly for a generalization of three-dimensional heterogeneous technologies integration
US8482111B2 (en) 2010-07-19 2013-07-09 Tessera, Inc. Stackable molded microelectronic packages
US9159708B2 (en) 2010-07-19 2015-10-13 Tessera, Inc. Stackable molded microelectronic packages with area array unit connectors
DE102010041129A1 (de) 2010-09-21 2012-03-22 Robert Bosch Gmbh Multifunktionssensor als PoP-mWLP
TWI451546B (zh) 2010-10-29 2014-09-01 日月光半導體製造股份有限公司 堆疊式封裝結構、其封裝結構及封裝結構之製造方法
US8941222B2 (en) 2010-11-11 2015-01-27 Advanced Semiconductor Engineering Inc. Wafer level semiconductor package and manufacturing methods thereof
KR101075241B1 (ko) 2010-11-15 2011-11-01 테세라, 인코포레이티드 유전체 부재에 단자를 구비하는 마이크로전자 패키지
US20120126399A1 (en) 2010-11-22 2012-05-24 Bridge Semiconductor Corporation Thermally enhanced semiconductor assembly with bump/base/flange heat spreader and build-up circuitry
US8841171B2 (en) 2010-11-22 2014-09-23 Bridge Semiconductor Corporation Method of making stackable semiconductor assembly with bump/flange heat spreader and dual build-up circuitry
US8343808B2 (en) 2010-11-22 2013-01-01 Bridge Semiconductor Corporation Method of making stackable semiconductor assembly with bump/base/flange heat spreader and build-up circuitry
US20120146206A1 (en) 2010-12-13 2012-06-14 Tessera Research Llc Pin attachment
US9406658B2 (en) 2010-12-17 2016-08-02 Advanced Semiconductor Engineering, Inc. Embedded component device and manufacturing methods thereof
US9171792B2 (en) 2011-02-28 2015-10-27 Advanced Semiconductor Engineering, Inc. Semiconductor device packages having a side-by-side device arrangement and stacking functionality
WO2012126377A1 (en) 2011-03-22 2012-09-27 Nantong Fujitsu Microelectronics Co., Ltd. System-level packaging methods and structures
WO2012126374A1 (en) * 2011-03-22 2012-09-27 Nantong Fujitsu Microelectronics Co., Ltd. 3d system-level packaging methods and structures
KR101128063B1 (ko) 2011-05-03 2012-04-23 테세라, 인코포레이티드 캡슐화 층의 표면에 와이어 본드를 구비하는 패키지 적층형 어셈블리
US8618659B2 (en) 2011-05-03 2013-12-31 Tessera, Inc. Package-on-package assembly with wire bonds to encapsulation surface
US11830845B2 (en) 2011-05-03 2023-11-28 Tessera Llc Package-on-package assembly with wire bonds to encapsulation surface
US8389333B2 (en) * 2011-05-26 2013-03-05 Stats Chippac, Ltd. Semiconductor device and method of forming EWLB package containing stacked semiconductor die electrically connected through conductive vias formed in encapsulant around die
US8653639B2 (en) * 2011-06-09 2014-02-18 Headway Technologies, Inc. Layered chip package and method of manufacturing same
US9324659B2 (en) * 2011-08-01 2016-04-26 Stats Chippac, Ltd. Semiconductor device and method of forming POP with stacked semiconductor die and bumps formed directly on the lower die
DE112012003318T5 (de) * 2011-08-11 2014-04-30 Flipchip International, Llc Dünnfilm-Struktur für hochdichte Induktivitäten und Umverdrahtung bei Wafer-Level Packaging
US8765497B2 (en) * 2011-09-02 2014-07-01 Taiwan Semiconductor Manufacturing Company, Ltd. Packaging and function tests for package-on-package and system-in-package structures
US9123763B2 (en) 2011-10-12 2015-09-01 Taiwan Semiconductor Manufacturing Company, Ltd. Package-on-package (PoP) structure having at least one package comprising one die being disposed in a core material between first and second surfaces of the core material
US8975741B2 (en) 2011-10-17 2015-03-10 Taiwan Semiconductor Manufacturing Company, Ltd. Process for forming package-on-package structures
US9105483B2 (en) 2011-10-17 2015-08-11 Invensas Corporation Package-on-package assembly with wire bond vias
US20170374748A1 (en) 2011-10-31 2017-12-28 Unimicron Technology Corp. Package structure and manufacturing method thereof
US11445617B2 (en) * 2011-10-31 2022-09-13 Unimicron Technology Corp. Package structure and manufacturing method thereof
US9219029B2 (en) 2011-12-15 2015-12-22 Stats Chippac Ltd. Integrated circuit packaging system with terminals and method of manufacture thereof
US8629567B2 (en) 2011-12-15 2014-01-14 Stats Chippac Ltd. Integrated circuit packaging system with contacts and method of manufacture thereof
US8623711B2 (en) * 2011-12-15 2014-01-07 Stats Chippac Ltd. Integrated circuit packaging system with package-on-package and method of manufacture thereof
US8946757B2 (en) 2012-02-17 2015-02-03 Invensas Corporation Heat spreading substrate with embedded interconnects
US8372741B1 (en) 2012-02-24 2013-02-12 Invensas Corporation Method for package-on-package assembly with wire bonds to encapsulation surface
US9349706B2 (en) 2012-02-24 2016-05-24 Invensas Corporation Method for package-on-package assembly with wire bonds to encapsulation surface
KR20130123720A (ko) * 2012-05-03 2013-11-13 에스케이하이닉스 주식회사 반도체 칩과 이를 갖는 반도체 패키지 및 이를 이용한 적층 반도체 패키지
US8835228B2 (en) 2012-05-22 2014-09-16 Invensas Corporation Substrate-less stackable package with wire-bond interconnect
US9391008B2 (en) * 2012-07-31 2016-07-12 Invensas Corporation Reconstituted wafer-level package DRAM
TWI497645B (zh) * 2012-08-03 2015-08-21 矽品精密工業股份有限公司 半導體封裝件及其製法
US9502390B2 (en) 2012-08-03 2016-11-22 Invensas Corporation BVA interposer
US8987851B2 (en) * 2012-09-07 2015-03-24 Mediatek Inc. Radio-frequency device package and method for fabricating the same
KR101999262B1 (ko) * 2012-09-12 2019-07-12 삼성전자주식회사 반도체 패키지 및 그의 제조 방법
US8975738B2 (en) 2012-11-12 2015-03-10 Invensas Corporation Structure for microelectronic packaging with terminals on dielectric mass
US8878353B2 (en) 2012-12-20 2014-11-04 Invensas Corporation Structure for microelectronic packaging with bond elements to encapsulation surface
US9136254B2 (en) 2013-02-01 2015-09-15 Invensas Corporation Microelectronic package having wire bond vias and stiffening layer
KR20140111523A (ko) * 2013-03-11 2014-09-19 삼성전자주식회사 반도체 패키지 및 그 제조 방법
EP2781230B2 (de) 2013-03-22 2025-05-14 Ypsomed AG Substanzabgabevorrichtung mit Signalvorrichtung
TWI555166B (zh) * 2013-06-18 2016-10-21 矽品精密工業股份有限公司 層疊式封裝件及其製法
US8941244B1 (en) * 2013-07-03 2015-01-27 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor device and manufacturing method thereof
US9167710B2 (en) 2013-08-07 2015-10-20 Invensas Corporation Embedded packaging with preformed vias
US9685365B2 (en) 2013-08-08 2017-06-20 Invensas Corporation Method of forming a wire bond having a free end
US20150076714A1 (en) 2013-09-16 2015-03-19 Invensas Corporation Microelectronic element with bond elements to encapsulation surface
CN103474361B (zh) * 2013-09-29 2016-06-01 华进半导体封装先导技术研发中心有限公司 一种嵌入式有源埋入功能基板的封装工艺及封装结构
US9263394B2 (en) 2013-11-22 2016-02-16 Invensas Corporation Multiple bond via arrays of different wire heights on a same substrate
US9583456B2 (en) 2013-11-22 2017-02-28 Invensas Corporation Multiple bond via arrays of different wire heights on a same substrate
US9379074B2 (en) 2013-11-22 2016-06-28 Invensas Corporation Die stacks with one or more bond via arrays of wire bond wires and with one or more arrays of bump interconnects
US9583411B2 (en) 2014-01-17 2017-02-28 Invensas Corporation Fine pitch BVA using reconstituted wafer with area array accessible for testing
JP6354285B2 (ja) * 2014-04-22 2018-07-11 オムロン株式会社 電子部品を埋設した樹脂構造体およびその製造方法
US10381326B2 (en) 2014-05-28 2019-08-13 Invensas Corporation Structure and method for integrated circuits packaging with increased density
US9646917B2 (en) 2014-05-29 2017-05-09 Invensas Corporation Low CTE component with wire bond interconnects
US9412714B2 (en) 2014-05-30 2016-08-09 Invensas Corporation Wire bond support structure and microelectronic package including wire bonds therefrom
US9536753B2 (en) * 2014-10-02 2017-01-03 Texas Instruments Incorporated Circuit substrate interconnect
US9735084B2 (en) 2014-12-11 2017-08-15 Invensas Corporation Bond via array for thermal conductivity
US9888579B2 (en) 2015-03-05 2018-02-06 Invensas Corporation Pressing of wire bond wire tips to provide bent-over tips
DE102015105692A1 (de) * 2015-04-14 2016-10-20 Osram Opto Semiconductors Gmbh Halbleiterbauelement und Verfahren zur Herstellung einer Mehrzahl von Halbleiterbauelementen
US9971970B1 (en) * 2015-04-27 2018-05-15 Rigetti & Co, Inc. Microwave integrated quantum circuits with VIAS and methods for making the same
US9502372B1 (en) 2015-04-30 2016-11-22 Invensas Corporation Wafer-level packaging using wire bond wires in place of a redistribution layer
US9761554B2 (en) 2015-05-07 2017-09-12 Invensas Corporation Ball bonding metal wire bond wires to metal pads
US9741620B2 (en) * 2015-06-24 2017-08-22 Invensas Corporation Structures and methods for reliable packages
US9673183B2 (en) 2015-07-07 2017-06-06 Micron Technology, Inc. Methods of making semiconductor device packages and related semiconductor device packages
US9768145B2 (en) * 2015-08-31 2017-09-19 Taiwan Semiconductor Manufacturing Company, Ltd. Methods of forming multi-die package structures including redistribution layers
FR3041209B1 (fr) * 2015-09-15 2017-09-15 Sagem Defense Securite Systeme electronique compact et dispositif comprenant un tel systeme
US10490528B2 (en) 2015-10-12 2019-11-26 Invensas Corporation Embedded wire bond wires
US9490222B1 (en) 2015-10-12 2016-11-08 Invensas Corporation Wire bond wires for interference shielding
US10332854B2 (en) 2015-10-23 2019-06-25 Invensas Corporation Anchoring structure of fine pitch bva
US10181457B2 (en) 2015-10-26 2019-01-15 Invensas Corporation Microelectronic package for wafer-level chip scale packaging with fan-out
US9911718B2 (en) 2015-11-17 2018-03-06 Invensas Corporation ‘RDL-First’ packaged microelectronic device for a package-on-package device
US9659848B1 (en) 2015-11-18 2017-05-23 Invensas Corporation Stiffened wires for offset BVA
WO2017111952A1 (en) 2015-12-22 2017-06-29 Intel Corporation Ultra small molded module integrated with die by module-on-wafer assembly
US9984992B2 (en) 2015-12-30 2018-05-29 Invensas Corporation Embedded wire bond wires for vertical integration with separate surface mount and wire bond mounting surfaces
US10429329B2 (en) * 2016-01-29 2019-10-01 Ams Sensors Uk Limited Environmental sensor test methodology
US9935075B2 (en) 2016-07-29 2018-04-03 Invensas Corporation Wire bonding method and apparatus for electromagnetic interference shielding
US10299368B2 (en) 2016-12-21 2019-05-21 Invensas Corporation Surface integrated waveguides and circuit structures therefor
JP6708264B2 (ja) * 2016-12-21 2020-06-10 株式会社村田製作所 電子部品内蔵基板の製造方法、電子部品内蔵基板、電子部品装置及び通信モジュール
US11121301B1 (en) 2017-06-19 2021-09-14 Rigetti & Co, Inc. Microwave integrated quantum circuits with cap wafers and their methods of manufacture
US11328969B2 (en) * 2017-11-16 2022-05-10 Amkor Technology Singapore Holding Pte. Ltd. Semiconductor device and manufacturing method thereof
US10510705B2 (en) * 2017-12-29 2019-12-17 Advanced Semiconductor Engineering, Inc. Semiconductor package structure having a second encapsulant extending in a cavity defined by a first encapsulant
JP2019216187A (ja) * 2018-06-13 2019-12-19 ソニーセミコンダクタソリューションズ株式会社 撮像装置
CN108962772B (zh) * 2018-07-19 2021-01-22 通富微电子股份有限公司 封装结构及其形成方法
WO2020129808A1 (ja) * 2018-12-21 2020-06-25 株式会社村田製作所 電子部品モジュールの製造方法及び電子部品モジュール
US11251100B2 (en) * 2019-09-25 2022-02-15 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structure having an anti-arcing pattern disposed on a passivation layer and method of fabricating the semiconductor structure
IT201900024292A1 (it) 2019-12-17 2021-06-17 St Microelectronics Srl Procedimento per fabbricare dispositivi a semiconduttore e dispositivo a semiconduttore corrispondente
DE102020106518A1 (de) * 2020-03-10 2021-09-16 Infineon Technologies Ag Halbleitervorrichtungen mit parallelen elektrisch leitenden Schichten
KR102854182B1 (ko) * 2020-07-06 2025-09-03 삼성전기주식회사 전자부품 내장기판
US11699682B2 (en) * 2020-08-14 2023-07-11 Advanced Semiconductor Engineering, Inc. Semiconductor device package and method of manufacturing the same
CN113035724B (zh) * 2021-02-22 2022-07-22 复旦大学 一种多芯片封装结构及其制作方法
CN112768437B (zh) * 2021-04-08 2021-06-18 甬矽电子(宁波)股份有限公司 多层堆叠封装结构和多层堆叠封装结构的制备方法
US12477848B2 (en) * 2022-01-26 2025-11-18 Xintec Inc. Chip package and method for forming the same
WO2023201697A1 (en) * 2022-04-22 2023-10-26 Innoscience (suzhou) Semiconductor Co., Ltd. Semiconductor packaged device and method for manufacturing the same
US12525563B2 (en) * 2022-06-30 2026-01-13 Intel Corporation Microelectronic assemblies including stacked dies coupled by a through dielectric via
CN119072782A (zh) * 2023-04-03 2024-12-03 长江存储科技有限责任公司 集成化封装器件及其制备方法以及存储系统

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070035015A1 (en) * 2005-08-15 2007-02-15 Shih-Ping Hsu Stack structure with semiconductor chip embedded in carrier

Family Cites Families (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4500905A (en) * 1981-09-30 1985-02-19 Tokyo Shibaura Denki Kabushiki Kaisha Stacked semiconductor device with sloping sides
US5034347A (en) * 1987-10-05 1991-07-23 Menlo Industries Process for producing an integrated circuit device with substrate via hole and metallized backplane
US5682062A (en) * 1995-06-05 1997-10-28 Harris Corporation System for interconnecting stacked integrated circuits
US5876765A (en) * 1995-11-09 1999-03-02 Micron Technology, Inc. Injection molding equipment for encapsulating semiconductor die and the like
KR0184076B1 (ko) * 1995-11-28 1999-03-20 김광호 상하 접속 수단이 패키지 내부에 형성되어 있는 3차원 적층형 패키지
US5973393A (en) * 1996-12-20 1999-10-26 Lsi Logic Corporation Apparatus and method for stackable molded lead frame ball grid array packaging of integrated circuits
US5994166A (en) * 1997-03-10 1999-11-30 Micron Technology, Inc. Method of constructing stacked packages
KR100280398B1 (ko) * 1997-09-12 2001-02-01 김영환 적층형 반도체 패키지 모듈의 제조 방법
JP3937265B2 (ja) * 1997-09-29 2007-06-27 エルピーダメモリ株式会社 半導体装置
KR100253352B1 (ko) * 1997-11-19 2000-04-15 김영환 적층가능한 반도체 칩 및 적층된 반도체 칩 모듈의 제조 방법
KR100270888B1 (ko) * 1998-04-08 2000-12-01 윤종용 노운 굿 다이 제조장치
SG75958A1 (en) * 1998-06-01 2000-10-24 Hitachi Ulsi Sys Co Ltd Semiconductor device and a method of producing semiconductor device
US6451624B1 (en) * 1998-06-05 2002-09-17 Micron Technology, Inc. Stackable semiconductor package having conductive layer and insulating layers and method of fabrication
US6313522B1 (en) * 1998-08-28 2001-11-06 Micron Technology, Inc. Semiconductor structure having stacked semiconductor devices
US6577013B1 (en) * 2000-09-05 2003-06-10 Amkor Technology, Inc. Chip size semiconductor packages with stacked dies
US6853503B2 (en) * 2000-09-22 2005-02-08 Pentax Corporation Eccentricity-prevention mechanism for a pair of lens-supporting rings
US6674161B1 (en) * 2000-10-03 2004-01-06 Rambus Inc. Semiconductor stacked die devices
US6476476B1 (en) * 2001-08-16 2002-11-05 Amkor Technology, Inc. Integrated circuit package including pin and barrel interconnects
US7176055B2 (en) * 2001-11-02 2007-02-13 Matsushita Electric Industrial Co., Ltd. Method and apparatus for manufacturing electronic component-mounted component, and electronic component-mounted component
US6737750B1 (en) * 2001-12-07 2004-05-18 Amkor Technology, Inc. Structures for improving heat dissipation in stacked semiconductor packages
TW200302685A (en) * 2002-01-23 2003-08-01 Matsushita Electric Industrial Co Ltd Circuit component built-in module and method of manufacturing the same
JP4227341B2 (ja) * 2002-02-21 2009-02-18 セイコーインスツル株式会社 半導体集積回路の構造及びその製造方法
TWI290365B (en) * 2002-10-15 2007-11-21 United Test Ct Inc Stacked flip-chip package
DE10250621B4 (de) * 2002-10-30 2004-09-02 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zum Erzeugen verkapselter Chips und zum Erzeugen eines Stapels aus den verkapselten Chips
US6798057B2 (en) * 2002-11-05 2004-09-28 Micron Technology, Inc. Thin stacked ball-grid array package
US7208825B2 (en) * 2003-01-22 2007-04-24 Siliconware Precision Industries Co., Ltd. Stacked semiconductor packages
SG137651A1 (en) * 2003-03-14 2007-12-28 Micron Technology Inc Microelectronic devices and methods for packaging microelectronic devices
JP2005005632A (ja) * 2003-06-16 2005-01-06 Sony Corp チップ状電子部品及びその製造方法、並びにその実装構造
TWI225280B (en) 2003-06-30 2004-12-11 Advanced Semiconductor Eng Bumping process
KR100537892B1 (ko) * 2003-08-26 2005-12-21 삼성전자주식회사 칩 스택 패키지와 그 제조 방법
US20050093170A1 (en) * 2003-10-29 2005-05-05 Texas Instruments Incorporated Integrated interconnect package
KR100621992B1 (ko) * 2003-11-19 2006-09-13 삼성전자주식회사 이종 소자들의 웨이퍼 레벨 적층 구조와 방법 및 이를이용한 시스템-인-패키지
DE102004020497B8 (de) 2004-04-26 2006-06-14 Infineon Technologies Ag Verfahren zur Herstellung von Durchkontaktierungen und Halbleiterbauteil mit derartigen Durchkontaktierungen
TWI250596B (en) * 2004-07-23 2006-03-01 Ind Tech Res Inst Wafer-level chip scale packaging method
DE102004041889B4 (de) * 2004-08-30 2006-06-29 Infineon Technologies Ag Halbleitervorrichtung mit gestapelten Halbleiterbauelementen und Verfahren zu deren Herstellung
JP2006203079A (ja) * 2005-01-21 2006-08-03 Sharp Corp 半導体装置および半導体装置の製造方法
JP4551321B2 (ja) * 2005-07-21 2010-09-29 新光電気工業株式会社 電子部品実装構造及びその製造方法
DE102005043557B4 (de) 2005-09-12 2007-03-01 Infineon Technologies Ag Verfahren zur Herstellung eines Halbleiterbauteils mit Durchkontakten zwischen Oberseite und Rückseite
US7344917B2 (en) * 2005-11-30 2008-03-18 Freescale Semiconductor, Inc. Method for packaging a semiconductor device
KR100914977B1 (ko) * 2007-06-18 2009-09-02 주식회사 하이닉스반도체 스택 패키지의 제조 방법
US7781877B2 (en) 2007-08-07 2010-08-24 Micron Technology, Inc. Packaged integrated circuit devices with through-body conductive vias, and methods of making same

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070035015A1 (en) * 2005-08-15 2007-02-15 Shih-Ping Hsu Stack structure with semiconductor chip embedded in carrier

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