CN101030570B - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN101030570B
CN101030570B CN2006101445671A CN200610144567A CN101030570B CN 101030570 B CN101030570 B CN 101030570B CN 2006101445671 A CN2006101445671 A CN 2006101445671A CN 200610144567 A CN200610144567 A CN 200610144567A CN 101030570 B CN101030570 B CN 101030570B
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chip
semiconductor device
terminal
resin
encapsulated
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CN101030570A (zh
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樫本宽德
太田达雄
须藤进吾
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Abstract

本发明实现减小从主端子到半导体芯片的布线电感，并可改善主端子的机械强度的生产性高的半导体装置。本发明一个方面的半导体装置，其特征在于包括：底板；固接在所述底板上的绝缘衬底；在所述绝缘衬底上形成的布图层；包含表面电极并安装于所述布图层上的至少1个半导体芯片；经由导电性粘接层与所述表面电极及所述布图层的至少任一方连接的主端子；以及成形为将所述主端子的至少一部分、所述导电性粘接层、所述绝缘衬底、所述布图层及所述半导体芯片覆盖的树脂封装。

Description

半导体装置
技术领域
本发明涉及半导体装置，尤其涉及可减小树脂封装内的布线电感的半导体装置。
背景技术
在用传统技术制造的功率模块等的功率用半导体装置中，例如，绝缘栅型双极性晶体管芯片(IGBT芯片)及续流二极管芯片(FWD芯片)等功率芯片在固定于绝缘衬底上的中空树脂外壳内部，通过焊接层等的导电性粘接剂，安装于绝缘衬底上形成的布图层上。
各芯片的表面电极(即，IGBT芯片的发射极及FWD芯片的阳电极)经由布图层及导线与一方主端子电连接，各芯片的背面电极(IGBT芯片的集电极及FWD芯片的阴电极)经由布图层及导线与另一方主端子电连接。同样地，IGBT芯片的栅电极等的控制电极经由导线连接到控制端子(辅助端子)。该主端子及控制端子为与外部电路连接而延伸到树脂外壳的外部。如上所述，IGBT芯片及FWD芯片彼此反向并联连接，构成反相器电路。
另外，在中空树脂外壳内部为保护功率芯片及导线而填充凝胶树脂。
可是，主端子及控制端子构成为由树脂外壳支撑，并且与布图层电连接，因此从主端子及控制端子到各芯片的电极(表面电极、背面电极及控制电极)的导线及布图层，依存中空树脂外壳及布图层的形状或结构以及功率芯片的配置位置并冗长。即，依据传统方式的功率模块，随着其结构变复杂，导线及布图层的布线电感有变大的趋势。
若导线及布图层的布线电感变大，则加到IGBT芯片等功率芯片的浪涌电压成比例地增大。结果，不仅IGBT芯片的开关动作时的能量损耗变大，而且一旦施加超过IGBT芯片的耐压的浪涌电压，IGBT芯片就会被破坏。
同样地，若从控制端子连接IGBT芯片的控制电极的导线变长，则容易受来自外部的电磁波噪声的影响，可导致IGBT芯片的误点弧或失弧。
而且，在由IGBT芯片和FWD芯片构成的多组反相器电路中，若从控制端子连接IGBT芯片的控制电极的导线的布线长度互相不同，则在各反相器电路的开关定时上产生偏差(定时偏移)，产生流过各IGBT芯片的驱动电流量的不均衡。这时，若在特定的IGBT芯片流过过剩的电流，则该IGBT芯片可能被破坏。
因而，希望极力减小达到各芯片的电极的导线及布图层的长度，并在多个反相器电路中均等。
在专利文献1中公开了可减小电感的功率用半导体装置，该半导体装置构成为在外壳树脂的内部，焊接在底层导电层和导出端子电极层的螺母起外部导出端子(主端子)的作用(图1)。
另外，在专利文献2中公开了在将热固化性树脂递模成形而成的树脂封装上面设置外部端子的半导体装置，外部端子板的下端部与内部布线板连接，其上端部焊接到与外部电路连接的螺母，螺母的露出面与树脂封装的表面一致(图2)。
专利文献1：日本特开平9-321216号公报
专利文献2：日本特开平9-283681号公报
发明内容
但是，依据专利文献1，螺母由中空树脂外壳和导出端子电极层上的焊料支撑，但在中空树脂外壳内填充柔软的凝胶树脂，并未以足够的机械强度固定，因此在螺母上紧固螺母轴时，由于在此时产生的旋转力矩而存在螺母与导出端子电极层之间的固定容易错开的问题。
另一方面，依据专利文献2，在将热固化性树脂递模成形而形成树脂封装时，热固化性树脂固化所需的时间较长，因此在模型与螺母之间的微小间隙有热固化性树脂进入，在螺母上面形成树脂毛边，未必能实现螺母与外部电路之间的良好的电连接，减少制品成品率。
另外，依据专利文献2，通过外部端子板，将内部布线板与外部电路电导通，但不能忽略因外部端子板而产生的电感，使得半导体装置全体电感的减小有界限。
本发明为解决这样的问题构思而成，其目的在于实现减小与外部电路连接的主端子到半导体芯片的布线电感，并可改善主端子的机械强度的生产性高的半导体装置。
本发明一个方面的半导体装置，其特征在于包括：底板；固接在所述底板上的绝缘衬底；在所述绝缘衬底上形成的布图层；包含表面电极并反向并联连接地安装于所述布图层上的至少1组晶体管芯片及二极管芯片；经由导电性粘接层与晶体管芯片或二极管芯片的所述表面电极连接的至少1个主端子；以及成形为将所述主端子的至少一部分、所述导电性粘接层、所述绝缘衬底、所述布图层及所述至少1组晶体管芯片及二极管芯片覆盖的树脂封装。
本发明另一方面的半导体装置，其特征在于包括：底板；固接在所述底板上的绝缘衬底；在所述绝缘衬底上形成的布图层；包含表面电极并安装于所述布图层上的至少1个半导体芯片；以及经由导电性粘接层与所述表面电极连接的主端子，所述主端子设有六边形、板状或矩形的主体构件，该主体构件设有沿与所述导电性粘接层垂直方向延伸的内螺纹孔，递模成形树脂封装，以使所述内螺纹孔露出，同时覆盖所述主端子的主体构件、所述导电性粘接层、所述绝缘衬底、所述布图层及所述半导体芯片。
本发明又一方面的半导体装置，其特征在于包括：底板；固接在所述底板上的绝缘衬底；在所述绝缘衬底上形成的布图层；安装于所述布图层上的包含表面电极的至少2个半导体芯片；与所述半导体芯片的各所述表面电极上连接的引线板；经由导电性粘接层与所述引线板连接的芯片间端子；以及成形为将所述芯片间端子的至少一部分、所述导电性粘接层、所述绝缘衬底、所述布图层及所述半导体芯片覆盖的树脂封装。
依据本发明，能够提供减小从主端子到半导体芯片的布线电感，并改善了主端子的机械强度的生产效率高的半导体装置。
附图说明
图1是本发明实施例1的半导体装置的透视图。
图2是省略了图1所示的半导体装置的树脂封装的内部透视图。
图3是从图1的III-III线观看的剖视图。
图4是表示L字形主端子的变形例的透视图。
图5是本发明实施例2的半导体装置的透视图。
图6是省略了图5所示的半导体装置的树脂封装的内部透视图。
图7是从图5的VII-VII线观看的剖视图。
图8是在上模及下模之间配置的半成品半导体装置的剖视图。
图9是本发明实施例3的半导体装置的透视图。
图10是省略了图9所示的半导体装置的树脂封装的内部透视图。
图11是省略图9所示的半导体装置的树脂封装的平面图。
图12是从图9的XII-XII线观看的剖视图。
图13是本发明实施例4的半导体装置的透视图。
图14是省略了图13所示的半导体装置的树脂封装的平面图。
图15是图13所示的半导体装置的内部电路图以及将其各端子外部布线的外部接线图。
(符号说明)
1～4半导体装置，10底板，12绝缘衬底，14布图层，16导电性粘接层，20绝缘栅型双极性晶体管芯片，22发射极，24控制电极，30续流二极管芯片，32阳电极，34导线，40、50L字形主端子，42、52连接部，44、54延长部，46、56上端部，48贯通孔，58凹凸部(波形部)，60控制端子(辅助端子)，64端板，70树脂封装，72上面，80、82导电性引线板(直接引线)，90主端子，92芯片间端子，94内螺纹孔，96控制端子(辅助端子)。
具体实施方式
以下，参照附图说明本发明的半导体装置的实施例。在各实施例的说明中，为方便理解而适当采用表示方向的用语(例如，“上方”及“下方”等)，但这仅用以说明，该用语并不限定本发明。
实施例1
以下，参照图1～图4，就本发明的半导体装置的实施例1进行说明。图1是半导体装置1的透视图，图2是省略树脂封装的内部透视图，图3是从图1的III-III线观看的剖视图。
图2所示的实施例1的半导体装置1中大致设有：由铜等的金属构成的底板10；固接于底板10上的由氧化铝及氮化铝等陶瓷材料或环氧树脂等高分子材料构成的绝缘衬底12；在绝缘衬底12上形成的由铜等金属构成的布图层14；隔着焊接层等的由导电性材料构成的导电性粘接层16(图3)，安装于布图层14上的至少1个半导体芯片。还有，在本说明书中，作为半导体芯片例示绝缘栅型双极性晶体管芯片20及续流二极管芯片30(以下，分别只称为“IGBT芯片20”及“FWD芯片30”)而进行说明，但可设有其它半导体芯片，也可设有单一或3个以上的半导体芯片，本发明并不受半导体芯片的种类或数量的限定。
IGBT芯片20在面向布图层14的(朝下的)背面设有集电极(未图示)，与它相对的(朝上的)表面上设有发射极22，并设有栅电极及电流读出电极等的控制电极24.同样地，FWD芯片30在背面设有阴电极(未图示)，与它相对的表面上设有阳电极32.集电极和阴电极经由焊接层16连接到布图层14，发射极22和阳电极32经由铝线等导线34互相电连接.这样，IGBT芯片20及FWD芯片30彼此反向并联连接，构成1个反相器电路.还有在本说明书中，将发射极22、控制电极24及阳电极32统称为表面电极，并将集电极及阴电极称为背面电极.
而且，如图3所示，实施例1的半导体装置1设有通过焊接层等的任意导电性粘接层16分别在布图层14及FWD芯片30的阳电极32上连接的L字形主端子40、50。各L字形主端子40、50通过将由金属等导电性材料构成的板材弯曲来形成，是由对于与焊接层16相对的连接部42、52及焊接层16基本上沿垂直方向延伸的板状的延长部44、54构成的。
同样地、如图2及图3所示，在该半导体装置1中，在IGBT芯片20的控制电极(栅电极及电流读出电极)24上，设有采用未图示的任意导电性粘接层直接连接的控制端子(辅助端子)60。
如上述那样组装的树脂模压工序前的半成品半导体装置(图2)配置在模压模型(未图示)内，然后将热塑性树脂在模型内注射模成形，从而形成树脂封装70，并得到图1所示的半导体装置1。这时，树脂封装70成形为完全包围各L字形主端子40、50的连接部42、52，并使延长部44、54的上端部46、56及控制端子60的上端部62露出。(还有，图3中为了便于理解图面而省略树脂封装70的壳体的图示。)
依据这样构成的半导体装置1，可减小从半导体芯片20、30的表面电极22、32到在树脂封装70的上面72突出的主端子40、50及控制端子60的布线长度。因而，减小半导体装置1的布线电感，并可抑制加到半导体芯片20、30的浪涌电压，因此不仅减小半导体芯片开关动作时的能量损耗，而且可防止半导体芯片的浪涌破坏。
另外，由于各L字形主端子40、50的连接部42、52的全体及延长部44、54的大部分由树脂封装70来固定，即使露出的上端部46、56(图1)上施加了若干应力，L字形主端子40、50也不会从布图层14及阳电极32脱离，能可靠地维持连接。同样地，控制端子60中除上端部46、56的大部分被树脂封装70支撑，因此能够实现控制端子60与控制电极24之间的连接不易被断开的牢固的半导体装置1。
图2所示的各L字形主端子40、50采用平坦的板状构件来形成，但为了进一步提高与热塑性树脂的粘接力，如图4(a)及(b)所示，可将贯通孔48或凹凸部(沟部)58设于延长部44、54。
还有，对于热塑性树脂并无限定，例如可采用对聚苯硫(PPS)、聚对苯二甲酸丁二醇酯(PBT)及液晶聚合物(LCP)等。
实施例2
以下，参照图5～图8，就本发明的半导体装置的实施例2进行说明。图5是实施例2的半导体装置的透视图，图6是省略树脂封装的内部透视图，图7是从图5的VII-VII线观看的剖视图。
实施例2的半导体装置2采用与实施例1的半导体装置1同样的构成要素(及其构成材料)来构成，因此省略有关对重复的构成要素的详细说明，以下就以与实施例1不同的部分为中心进行说明。另外，对于与实施例1相同的构成部件采用同一符号进行说明。
如图6所示，实施例2的半导体装置2中设有：底板10；固接于底板10上的绝缘衬底12；在绝缘衬底12上形成的布图层14；以及隔着焊接层16(图7)安装在布图层14上的2组IGBT芯片20及FWD芯片30。与实施例1同样，通过将各组的IGBT芯片20及FWD芯片30反向并联连接来构成反相器电路，半导体装置2具有串联连接的2个反相器电路。
另外，IGBT芯片20的发射极22与FWD芯片30的阳电极32，在实施例1中用铝线等导线34来电连接，但图6所示的实施例2中通过将板状构件弯曲而形成的导电性引线板80(也称为“直接引线”)实现两者的电连接。该导电性引线板80经由布图层14电连接到附近的主端子90。
IGBT芯片20的控制电极24也同样，经由导电性引线板82电连接到端板(header)64上的端板电极66。该端板电极66在端板64内与各控制端子(辅助端子)24电连接，因此可与将IGBT芯片20的控制电极24向外部导出的控制端子60电连接。但是，可采用与传统技术相同的导线来取代导电性引线板82。
另外，实施例2的主端子90设有对焊接层16基本上沿垂直方向延伸的内螺纹孔94，树脂封装70使内螺纹孔94露出，且注射模成形为基本上埋设主端子90。主端子90只要设有内螺纹孔94，可具有任意形状，最好具有如图6所示六边螺母的形态，并由铜、铝等的良导体材料构成，且为了容易焊接而实施镀镍等的表面处理也可。但是，在内螺纹孔94内拧进螺栓，将主电极90与汇流条(均未图示)连接时，主端子90受到其轴系的旋转力矩，因此最好具有能够产生与之对抗的力的(圆柱形状以外的)外径形状。主端子90例如可为设有螺母94的板状构件或矩形构件。
如上所述，依据实施例2，可减小从半导体芯片20、30的表面电极22、24、32到在树脂封装70的上面72突出的主端子90及控制端子60的布线长度。结果，降低半导体装置2的布线电感，并可抑制加到半导体芯片20、30的浪涌电压，不仅改善半导体芯片的能量损耗，而且可防止半导体芯片的浪涌破坏。
而且，除内螺纹孔94外主端子90全体由树脂封装70包围并固定，因此，即使对主端子90施加轴系的旋转力矩，主端子90与布图层14之间的连接也不会断开，可得到牢固的半导体装置2。
还有，半导体装置1的主电极40、50设有延长部44、54，而半导体装置2未设有延长部，因此与实施例1相比，不仅进一步减小布线电感，而且可将半导体装置2在高度方向(上下方向)上进一步小型化。
而且，如图8所示，实施例2的半导体装置2，通过将树脂模压工序前的半成品半导体装置配置在模型的上模UD及下模LD之间，并上述那样，将热塑性树脂从上模UD的树脂注入口RI注入来形成，但如上述专利文献2所公开的那样，将热固化性树脂递模成形时，在主电极90与上模UD之间的微小间隙有树脂进入(图8的箭头)，在主电极90的上面形成树脂毛边，在模压成形的半导体装置的制品中，发生主电极90与汇流条之间的树脂毛边导致的连接不良，使制品成品率显著下降。
但是，在本发明中使用的热塑性树脂在上模UD中迅速被冷却并固化，因此不会发生树脂毛边，可维持半导体装置2的高生产效率(制品成品率)。
实施例3
以下，参照图9～图12，就本发明的半导体装置的实施例3进行说明。图9是实施例3的半导体装置的透视图，图10是省略树脂封装的内部透视图，图11是省略树脂封装的平面图，图12是从图9的XII-XII线观看的剖视图。
实施例3的半导体装置3采用与实施例1的半导体装置1同样的构成要素(及其构成材料)来构成，因此省略有关对重复的构成要素的详细说明，以下以与实施例1不同的部分为中心进行说明.另外，对于与实施例1相同的构成部件，采用同样的符号进行说明.
如图10所示，实施例3的半导体装置3中设有：底板10；在其上固接的绝缘衬底12；在绝缘衬底12上形成的彼此绝缘的第一和第二布图层14a、14b；以及隔着焊接层16(图12)安装在第一布图层14a上的IGBT芯片20及FWD芯片30。
另外，IGBT芯片20的发射极22和FWD芯片30的阳电极32与实施例2同样，如图10所示，经由弯曲板状构件而形成的导电性引线板80(直接引线)电连接。还有，导电性引线板80与发射极电极22和阳电极32之间，通过焊接层等的导电性粘接层16(图12)来连接。与上述实施例同样，IGBT芯片20及FWD芯片30反向并联连接，构成反相器电路。
实施例3的导电性引线板80与实施例2不同，不与布图层14连接，而芯片间端子92经由焊接层等的导电性粘接层16，连接到导电性引线板80上。
在实施例3的第一布图层14a上，与实施例2同样的主端子90通过导电性粘接层(未图示)固定。另外，第二布图层14b经由与上述同样的直接引线及未图示的焊接层，与IGBT芯片20的控制电极24电连接。还有，可采用传统技术的铝线来取代直接引线，将第二布图层14b和IGBT芯片20的控制电极24电连接。另外，在第二布图层14b上，通过焊接层等的导电性粘接层16与控制端子(辅助端子)96连接。
实施例3的主端子90、芯片间端子92及控制端子96设有对焊接层16基本上沿垂直方向延伸的内螺纹孔94，树脂封装70使各内螺纹孔94露出，并注射模成形为基本上埋设主端子90、芯片间端子92及控制端子96。主端子90、芯片间端子92及控制端子96只要设有内螺纹孔94，可具有任意形状，可为六边螺母、板状构件或矩形构件的形态。
这样构成的半导体装置3，如图12所示，夹着汇流条B，将螺栓V拧进各端子90、92、96的内螺纹孔94，可将汇流条B可靠地安装。
因而，依据实施例3，不仅极力抑制从导电性引线板80及IGBT芯片20的控制电极24到在树脂封装70的上面72突出的芯片间端子92及控制端子96的布线长度，而且可减小从第一布线图案14a到在树脂封装70的上面72突出的主端子90的布线长度。结果，减小半导体装置3的布线电感，并可抑制加到半导体芯片20、30的浪涌电压，因此，不仅改善半导体芯片的能量损耗，而且可防止半导体芯片20、30的浪涌破坏。
而且，除内螺纹孔94外主端子90全体由树脂封装70包围并固定，因此，即使对芯片间端子92、主端子90及控制端子96施加轴系的旋转力矩，主端子90与布图层14之间的连接也不会断开，可得到牢固的半导体装置3。并且，实施例3的树脂封装70与上述实施例2同样，采用热塑性树脂来成形，因此可实现难以发生树脂毛边导致的连接不良的半导体装置。
实施例4
以下，参照图13～图15，就本发明的半导体装置的实施例4进行说明。图13是实施例4的半导体装置的透视图，图14是省略树脂封装的平面图，图15是图13的半导体装置的电路图及外部接线图。
与实施例3相比，实施例4的半导体装置4中将多个半导体装置3配置在同一树脂封装70内，除此以外具有与实施例3相同的构成，因此省略对有关重复部分的详细说明。另外，对于与实施例1同样的构成部件采用同样的符号进行说明。
一般，近年的功率用半导体装置具有在更高电压下控制更大的电流，并且多个IGBT芯片及FWD芯片内置于单一树脂封装的趋势.这时，依据传统技术的半导体装置，多个IGBT芯片的各控制电极与向树脂封装外部突出的单一控制端子电连接的内部布线在树脂封装内接线.即，从单一控制端子到各IGBT芯片的控制电极的各内部布线长度因IGBT芯片的配置位置不同而异.结果，各IGBT芯片的开关并不同时(开关同时性)，流入各IGBT芯片的控制电流上产生偏差.而且，1个IGBT芯片上集中了截断电流时，该IGBT芯片可能被破坏.
但是，依据本发明实施例4的半导体装置4，如图13及图14所示，构成为：内置2行×9列的反相器电路，且各反相器电路的各主端子90、芯片间端子92及控制端子96与其它反相器电路分别独立并从树脂封装70突出。即，从各控制端子96到各IGBT芯片20的控制电极24的布线长度相同，因此从控制信号发生源(未图示)到各控制端子96的外部布线(未图示)长度设计成一定，从而能够确保各IGBT芯片的开关同时性。
另外，根据实施例4，如图13及图14所示，各反相器电路的主端子90、芯片间端子92及控制端子96相对中央线C配置成线对称，因此可容易地设计外部布线长度一定。
而且，图15(a)所示的实施例4的2行×9列的反相器电路，如图15(b)所示，能够通过将各行的反相器电路串联连接来构成控制3相(U相、V相、W相)的驱动电流的3个独立的半导体装置。
同样地，这些18个反相器电路，如图15(c)所示，能够通过将各行的反相器电路串联连接，并将3列的反相器电路并联连接来实现控制3相的大容量电流的1个半导体装置。即，使各主端子90、芯片间端子92及控制端子96独立并从树脂封装70突出，且相对中央线C配置成线对称，从而能够显著提高最终用户对外部布线电路的设计自由度。

Claims (12)

1.一种半导体装置，其特征在于包括：
底板；
固接在所述底板上的绝缘衬底；
在所述绝缘衬底上形成的布图层；
包含表面电极并反向并联连接地安装于所述布图层上的至少1组晶体管芯片及二极管芯片；
经由导电性粘接层与晶体管芯片或二极管芯片的所述表面电极连接的至少1个主端子；以及
成形为将所述主端子的至少一部分、所述导电性粘接层、所述绝缘衬底、所述布图层及所述至少1组晶体管芯片及二极管芯片覆盖的树脂封装。
2.如权利要求1所述的半导体装置，其特征在于：
所述主端子由与所述导电性粘接层相对的连接部及沿与该导电性粘接层垂直方向延伸的板状延长部构成，
所述树脂封装成形为覆盖所述连接部，并使所述延长部的至少一部分露出，
所述延长部具有贯通孔或凹凸部。
3.如权利要求2所述的半导体装置，其特征在于：
所述主端子由L字形的导电构件构成。
4.如权利要求1所述的半导体装置，其特征在于：
所述树脂封装由热塑性树脂成形。
5.一种半导体装置，其特征在于包括：
底板；
固接在所述底板上的绝缘衬底；
在所述绝缘衬底上形成的布图层；
包含表面电极并安装于所述布图层上的至少1个半导体芯片；以及
经由导电性粘接层与所述表面电极连接的主端子，
所述主端子设有六边形、板状或矩形的主体构件，该主体构件设有沿与所述导电性粘接层垂直方向延伸的内螺纹孔，
递模成形树脂封装，以使所述内螺纹孔露出，同时覆盖所述主端子的主体构件、所述导电性粘接层、所述绝缘衬底、所述布图层及所述半导体芯片。
6.如权利要求5所述的半导体装置，其特征在于：
所述主端子为导电性螺母。
7.一种半导体装置，其特征在于包括：
底板；
固接在所述底板上的绝缘衬底；
在所述绝缘衬底上形成的布图层；
安装于所述布图层上的包含表面电极的至少2个半导体芯片；
与所述半导体芯片的各所述表面电极上连接的引线板；
经由导电性粘接层与所述引线板连接的芯片间端子；以及
成形为将所述芯片间端子的至少一部分、所述导电性粘接层、所述绝缘衬底、所述布图层及所述半导体芯片覆盖的树脂封装.
8.如权利要求7所述的半导体装置，其特征在于：
所述芯片间端子设有沿与所述引线板垂直方向延伸的内螺纹孔，
所述树脂封装成形为使所述内螺纹孔露出。
9.如权利要求7所述的半导体装置，其特征在于：
半导体芯片由反向并联连接的至少一组晶体管芯片及二极管芯片构成，
与所述晶体管芯片的控制电极连接的控制端子，沿与该晶体管芯片的该控制电极垂直方向延伸，
所述树脂封装形成为使所述控制端子的一部分露出。
10.如权利要求7所述的半导体装置，其特征在于：
还设有经由导电性粘接层连接到所述布图层上的多个主端子，
半导体芯片由反向并联连接的多组晶体管芯片及二极管芯片构成，
与各所述晶体管芯片的控制电极连接的控制端子，沿与该晶体管芯片的该控制电极垂直方向延伸，
所述树脂封装成形为使各所述主端子、所述芯片间端子及所述控制端子的一部分露出。
11.如权利要求10所述的半导体装置，其特征在于：
从所述树脂封装露出的所述主端子、所述芯片间端子及所述控制端子的一部分，分别对预定的中央线呈线对称地配置。
12.如权利要求7所述的半导体装置，其特征在于：
所述树脂封装由热塑性树脂成形。
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