TWI470764B - 抗扭斜多晶粒封裝 - Google Patents
抗扭斜多晶粒封裝 Download PDFInfo
- Publication number
- TWI470764B TWI470764B TW101125197A TW101125197A TWI470764B TW I470764 B TWI470764 B TW I470764B TW 101125197 A TW101125197 A TW 101125197A TW 101125197 A TW101125197 A TW 101125197A TW I470764 B TWI470764 B TW I470764B
- Authority
- TW
- Taiwan
- Prior art keywords
- microelectronic
- package
- terminals
- component
- substrate
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/077—Connecting of TAB connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
- H10W72/07552—Controlling the environment, e.g. atmosphere composition or temperature changes in structures or sizes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/241—Dispositions, e.g. layouts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/241—Dispositions, e.g. layouts
- H10W72/244—Dispositions, e.g. layouts relative to underlying supporting features, e.g. bond pads, RDLs or vias
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/29—Bond pads specially adapted therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
- H10W72/351—Materials of die-attach connectors
- H10W72/352—Materials of die-attach connectors comprising metals or metalloids, e.g. solders
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
- H10W72/351—Materials of die-attach connectors
- H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
- H10W72/351—Materials of die-attach connectors
- H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
- H10W72/354—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/521—Structures or relative sizes of bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/701—Tape-automated bond [TAB] connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/853—On the same surface
- H10W72/856—Bump connectors and die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/853—On the same surface
- H10W72/865—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/877—Bump connectors and die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/931—Shapes of bond pads
- H10W72/932—Plan-view shape, i.e. in top view
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/944—Dispositions of multiple bond pads
- H10W72/9445—Top-view layouts, e.g. mirror arrays
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
- H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
- H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
- H10W74/142—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations exposing the passive side of the semiconductor body
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/20—Configurations of stacked chips
- H10W90/24—Configurations of stacked chips at least one of the stacked chips being laterally offset from a neighbouring stacked chip, e.g. chip stacks having a staircase shape
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/20—Configurations of stacked chips
- H10W90/26—Configurations of stacked chips the stacked chips being of the same size without any chips being laterally offset, e.g. chip stacks having a rectangular shape
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/20—Configurations of stacked chips
- H10W90/297—Configurations of stacked chips characterised by the through-semiconductor vias [TSVs] in the stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/752—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Semiconductor Memories (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201161506889P | 2011-07-12 | 2011-07-12 | |
| US13/306,068 US8502390B2 (en) | 2011-07-12 | 2011-11-29 | De-skewed multi-die packages |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201310605A TW201310605A (zh) | 2013-03-01 |
| TWI470764B true TWI470764B (zh) | 2015-01-21 |
Family
ID=46601899
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW101125197A TWI470764B (zh) | 2011-07-12 | 2012-07-12 | 抗扭斜多晶粒封裝 |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US8502390B2 (https=) |
| EP (1) | EP2732466A1 (https=) |
| JP (1) | JP2014521221A (https=) |
| KR (1) | KR102015931B1 (https=) |
| CN (1) | CN103782383B (https=) |
| TW (1) | TWI470764B (https=) |
| WO (1) | WO2013009741A1 (https=) |
Families Citing this family (43)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8553420B2 (en) | 2010-10-19 | 2013-10-08 | Tessera, Inc. | Enhanced stacked microelectronic assemblies with central contacts and improved thermal characteristics |
| US8633576B2 (en) | 2011-04-21 | 2014-01-21 | Tessera, Inc. | Stacked chip-on-board module with edge connector |
| US8928153B2 (en) | 2011-04-21 | 2015-01-06 | Tessera, Inc. | Flip-chip, face-up and face-down centerbond memory wirebond assemblies |
| US8970028B2 (en) | 2011-12-29 | 2015-03-03 | Invensas Corporation | Embedded heat spreader for package with multiple microelectronic elements and face-down connection |
| US9013033B2 (en) | 2011-04-21 | 2015-04-21 | Tessera, Inc. | Multiple die face-down stacking for two or more die |
| US8952516B2 (en) | 2011-04-21 | 2015-02-10 | Tessera, Inc. | Multiple die stacking for two or more die |
| US8823165B2 (en) | 2011-07-12 | 2014-09-02 | Invensas Corporation | Memory module in a package |
| US8502390B2 (en) * | 2011-07-12 | 2013-08-06 | Tessera, Inc. | De-skewed multi-die packages |
| US8659140B2 (en) | 2011-10-03 | 2014-02-25 | Invensas Corporation | Stub minimization using duplicate sets of signal terminals in assemblies without wirebonds to package substrate |
| US8917532B2 (en) | 2011-10-03 | 2014-12-23 | Invensas Corporation | Stub minimization with terminal grids offset from center of package |
| EP2764543A2 (en) | 2011-10-03 | 2014-08-13 | Invensas Corporation | Stub minimization for multi-die wirebond assemblies with parallel windows |
| WO2013052080A1 (en) | 2011-10-03 | 2013-04-11 | Invensas Corporation | Stub minimization for multi-die wirebond assemblies with orthogonal windows |
| US8525327B2 (en) | 2011-10-03 | 2013-09-03 | Invensas Corporation | Stub minimization for assemblies without wirebonds to package substrate |
| US8659142B2 (en) | 2011-10-03 | 2014-02-25 | Invensas Corporation | Stub minimization for wirebond assemblies without windows |
| US8659141B2 (en) | 2011-10-03 | 2014-02-25 | Invensas Corporation | Stub minimization using duplicate sets of terminals for wirebond assemblies without windows |
| US10136516B2 (en) * | 2012-03-13 | 2018-11-20 | Intel Corporation | Microelectronic device attachment on a reverse microelectronic package |
| US8848391B2 (en) | 2012-08-27 | 2014-09-30 | Invensas Corporation | Co-support component and microelectronic assembly |
| US9368477B2 (en) | 2012-08-27 | 2016-06-14 | Invensas Corporation | Co-support circuit panel and microelectronic packages |
| US8787034B2 (en) | 2012-08-27 | 2014-07-22 | Invensas Corporation | Co-support system and microelectronic assembly |
| US8848392B2 (en) | 2012-08-27 | 2014-09-30 | Invensas Corporation | Co-support module and microelectronic assembly |
| US9070423B2 (en) | 2013-06-11 | 2015-06-30 | Invensas Corporation | Single package dual channel memory with co-support |
| US8883563B1 (en) | 2013-07-15 | 2014-11-11 | Invensas Corporation | Fabrication of microelectronic assemblies having stack terminals coupled by connectors extending through encapsulation |
| US9023691B2 (en) | 2013-07-15 | 2015-05-05 | Invensas Corporation | Microelectronic assemblies with stack terminals coupled by connectors extending through encapsulation |
| US9034696B2 (en) | 2013-07-15 | 2015-05-19 | Invensas Corporation | Microelectronic assemblies having reinforcing collars on connectors extending through encapsulation |
| US9123555B2 (en) | 2013-10-25 | 2015-09-01 | Invensas Corporation | Co-support for XFD packaging |
| US9214454B2 (en) | 2014-03-31 | 2015-12-15 | Invensas Corporation | Batch process fabrication of package-on-package microelectronic assemblies |
| JP2015216263A (ja) * | 2014-05-12 | 2015-12-03 | マイクロン テクノロジー, インク. | 半導体装置 |
| US9281296B2 (en) | 2014-07-31 | 2016-03-08 | Invensas Corporation | Die stacking techniques in BGA memory package for small footprint CPU and memory motherboard design |
| EP3195356A4 (en) | 2014-09-18 | 2018-10-10 | Intel Corporation | Method of embedding wlcsp components in e-wlb and e-plb |
| US9691437B2 (en) | 2014-09-25 | 2017-06-27 | Invensas Corporation | Compact microelectronic assembly having reduced spacing between controller and memory packages |
| US9245870B1 (en) | 2014-10-17 | 2016-01-26 | Qualcomm Incorporated | Systems and methods for providing data channels at a die-to-die interface |
| US9799628B2 (en) | 2015-03-31 | 2017-10-24 | Qualcomm Incorporated | Stacked package configurations and methods of making the same |
| US9484080B1 (en) | 2015-11-09 | 2016-11-01 | Invensas Corporation | High-bandwidth memory application with controlled impedance loading |
| US10297575B2 (en) * | 2016-05-06 | 2019-05-21 | Amkor Technology, Inc. | Semiconductor device utilizing an adhesive to attach an upper package to a lower die |
| US9679613B1 (en) | 2016-05-06 | 2017-06-13 | Invensas Corporation | TFD I/O partition for high-speed, high-density applications |
| US9972609B2 (en) | 2016-07-22 | 2018-05-15 | Invensas Corporation | Package-on-package devices with WLP components with dual RDLs for surface mount dies and methods therefor |
| KR102509049B1 (ko) * | 2016-08-22 | 2023-03-13 | 에스케이하이닉스 주식회사 | 수직 적층된 칩들을 포함하는 팬 아웃 패키지 |
| US10424921B2 (en) | 2017-02-16 | 2019-09-24 | Qualcomm Incorporated | Die-to-die interface configuration and methods of use thereof |
| CN112802835A (zh) * | 2017-06-02 | 2021-05-14 | 超极存储器股份有限公司 | 半导体模块 |
| CN108364878B (zh) * | 2018-02-01 | 2019-09-17 | 深圳市华讯方舟微电子科技有限公司 | 微组装方法及芯片装置 |
| CN115966224B (zh) * | 2021-10-12 | 2025-12-30 | 瑞昱半导体股份有限公司 | 多晶粒封装 |
| US12341123B2 (en) * | 2022-05-12 | 2025-06-24 | Nanya Technology Corporation | Semiconductor device having a bonding wire in a hole in the substrate |
| KR102933121B1 (ko) * | 2022-05-26 | 2026-03-03 | 삼성전자주식회사 | 반도체 패키지 |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS641257B2 (https=) * | 1980-01-30 | 1989-01-11 | Tokai Rubber Ind Ltd | |
| TW312044B (en) * | 1996-02-23 | 1997-08-01 | Mitsubishi Electric Corp | The semiconductor package |
| US5777391A (en) * | 1994-12-20 | 1998-07-07 | Hitachi, Ltd. | Semiconductor device having an improved connection arrangement between a semiconductor pellet and base substrate electrodes and a method of manufacture thereof |
| US6894381B2 (en) * | 2002-12-17 | 2005-05-17 | Infineon Technologies Ag | Electronic device having a stack of semiconductor chips and method for the production thereof |
| KR20070088177A (ko) * | 2006-02-24 | 2007-08-29 | 삼성테크윈 주식회사 | 반도체 패키지 및 그 제조 방법 |
| TW200901194A (en) * | 2007-02-16 | 2009-01-01 | Mosaid Technologies Inc | Clock mode determination in a memory system |
Family Cites Families (146)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3670208A (en) | 1970-07-13 | 1972-06-13 | Logic Dynamics Inc | Microelectronic package, buss strip and printed circuit base assembly |
| US5148265A (en) | 1990-09-24 | 1992-09-15 | Ist Associates, Inc. | Semiconductor chip assemblies with fan-in leads |
| US5148266A (en) | 1990-09-24 | 1992-09-15 | Ist Associates, Inc. | Semiconductor chip assemblies having interposer and flexible lead |
| US5679977A (en) | 1990-09-24 | 1997-10-21 | Tessera, Inc. | Semiconductor chip assemblies, methods of making same and components for same |
| US5369552A (en) | 1992-07-14 | 1994-11-29 | Ncr Corporation | Multi-chip module with multiple compartments |
| JPH0823149A (ja) | 1994-05-06 | 1996-01-23 | Seiko Epson Corp | 半導体装置及びその製造方法 |
| SE509201C2 (sv) | 1994-07-20 | 1998-12-14 | Sandvik Ab | Aluminiumoxidbelagt verktyg |
| US5929517A (en) | 1994-12-29 | 1999-07-27 | Tessera, Inc. | Compliant integrated circuit package and method of fabricating the same |
| JPH11505957A (ja) | 1995-05-26 | 1999-05-25 | ランバス・インコーポレーテッド | 半導体チップ用のチップ・ソケット・アセンブリおよびチップ・ファイル・アセンブリ |
| JP3869045B2 (ja) | 1995-11-09 | 2007-01-17 | 株式会社日立製作所 | 半導体記憶装置 |
| US5696031A (en) | 1996-11-20 | 1997-12-09 | Micron Technology, Inc. | Device and method for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice |
| US6460245B1 (en) | 1996-03-07 | 2002-10-08 | Tessera, Inc. | Method of fabricating semiconductor chip assemblies |
| US6086386A (en) | 1996-05-24 | 2000-07-11 | Tessera, Inc. | Flexible connectors for microelectronic elements |
| US6130116A (en) | 1996-12-13 | 2000-10-10 | Tessera, Inc. | Method of encapsulating a microelectronic assembly utilizing a barrier |
| US6323436B1 (en) | 1997-04-08 | 2001-11-27 | International Business Machines Corporation | High density printed wiring board possessing controlled coefficient of thermal expansion with thin film redistribution layer |
| JPH1143503A (ja) | 1997-07-25 | 1999-02-16 | Nippon Mektron Ltd | 変性アクリル系ゴムの製造法 |
| US6525414B2 (en) | 1997-09-16 | 2003-02-25 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device including a wiring board and semiconductor elements mounted thereon |
| US5899705A (en) | 1997-11-20 | 1999-05-04 | Akram; Salman | Stacked leads-over chip multi-chip module |
| US6343019B1 (en) | 1997-12-22 | 2002-01-29 | Micron Technology, Inc. | Apparatus and method of stacking die on a substrate |
| US6742098B1 (en) | 2000-10-03 | 2004-05-25 | Intel Corporation | Dual-port buffer-to-memory interface |
| US6261867B1 (en) | 1998-03-13 | 2001-07-17 | Stratedge Corporation | Method of making a package for microelectronic devices using iron oxide as a bonding agent |
| US6197665B1 (en) | 1998-04-15 | 2001-03-06 | Tessera, Inc. | Lamination machine and method to laminate a coverlay to a microelectronic package |
| US6297960B1 (en) | 1998-06-30 | 2001-10-02 | Micron Technology, Inc. | Heat sink with alignment and retaining features |
| US6815251B1 (en) | 1999-02-01 | 2004-11-09 | Micron Technology, Inc. | High density modularity for IC's |
| JP3914651B2 (ja) | 1999-02-26 | 2007-05-16 | エルピーダメモリ株式会社 | メモリモジュールおよびその製造方法 |
| JP2000315776A (ja) | 1999-05-06 | 2000-11-14 | Hitachi Ltd | 半導体装置 |
| US6376769B1 (en) | 1999-05-18 | 2002-04-23 | Amerasia International Technology, Inc. | High-density electronic package, and method for making same |
| JP2000340737A (ja) | 1999-05-31 | 2000-12-08 | Mitsubishi Electric Corp | 半導体パッケージとその実装体 |
| KR100393095B1 (ko) | 1999-06-12 | 2003-07-31 | 앰코 테크놀로지 코리아 주식회사 | 반도체패키지와 그 제조방법 |
| US6252264B1 (en) | 1999-07-30 | 2001-06-26 | International Business Machines Corporation | Integrated circuit chip with features that facilitate a multi-chip module having a number of the chips |
| JP2001053243A (ja) | 1999-08-06 | 2001-02-23 | Hitachi Ltd | 半導体記憶装置とメモリモジュール |
| SG83742A1 (en) | 1999-08-17 | 2001-10-16 | Micron Technology Inc | Multi-chip module with extension |
| US6255899B1 (en) * | 1999-09-01 | 2001-07-03 | International Business Machines Corporation | Method and apparatus for increasing interchip communications rates |
| US6307769B1 (en) | 1999-09-02 | 2001-10-23 | Micron Technology, Inc. | Semiconductor devices having mirrored terminal arrangements, devices including same, and methods of testing such semiconductor devices |
| JP2001203318A (ja) | 1999-12-17 | 2001-07-27 | Texas Instr Inc <Ti> | 複数のフリップチップを備えた半導体アセンブリ |
| JP3768761B2 (ja) | 2000-01-31 | 2006-04-19 | 株式会社日立製作所 | 半導体装置およびその製造方法 |
| JP2001223324A (ja) | 2000-02-10 | 2001-08-17 | Mitsubishi Electric Corp | 半導体装置 |
| US6713854B1 (en) | 2000-10-16 | 2004-03-30 | Legacy Electronics, Inc | Electronic circuit module with a carrier having a mounting pad array |
| CN1207785C (zh) | 2000-03-21 | 2005-06-22 | 三菱电机株式会社 | 半导体器件、电子装置的制造方法、电子装置和携带式信息终端 |
| US6384473B1 (en) | 2000-05-16 | 2002-05-07 | Sandia Corporation | Microelectronic device package with an integral window |
| TW445608B (en) | 2000-05-19 | 2001-07-11 | Siliconware Precision Industries Co Ltd | Semiconductor package and manufacturing method thereof of lead frame without flashing |
| JP2001339043A (ja) | 2000-05-30 | 2001-12-07 | Mitsubishi Electric Corp | 半導体装置及びそれを用いた半導体モジュール |
| US6462423B1 (en) * | 2000-08-31 | 2002-10-08 | Micron Technology, Inc. | Flip-chip with matched lines and ground plane |
| US6577004B1 (en) | 2000-08-31 | 2003-06-10 | Micron Technology, Inc. | Solder ball landpad design to improve laminate performance |
| JP2002076252A (ja) | 2000-08-31 | 2002-03-15 | Nec Kyushu Ltd | 半導体装置 |
| JP3874062B2 (ja) | 2000-09-05 | 2007-01-31 | セイコーエプソン株式会社 | 半導体装置 |
| US6980184B1 (en) | 2000-09-27 | 2005-12-27 | Alien Technology Corporation | Display devices and integrated circuits |
| DE10055001A1 (de) | 2000-11-07 | 2002-05-16 | Infineon Technologies Ag | Speicheranordnung mit einem zentralen Anschlussfeld |
| US6628528B2 (en) * | 2000-11-30 | 2003-09-30 | Theodore Zale Schoenborn | Current sharing in memory packages |
| US20020122902A1 (en) | 2000-11-30 | 2002-09-05 | Tetsuji Ueda | Blank for an optical member as well as vessel and method of producing the same |
| US6798044B2 (en) | 2000-12-04 | 2004-09-28 | Fairchild Semiconductor Corporation | Flip chip in leaded molded package with two dies |
| US6528408B2 (en) | 2001-05-21 | 2003-03-04 | Micron Technology, Inc. | Method for bumped die and wire bonded board-on-chip package |
| DE10126310B4 (de) | 2001-05-30 | 2006-05-18 | Infineon Technologies Ag | Leiterplattenvorrichtung, deren Verwendung und Halbleiterspeichervorrichtung |
| KR100415281B1 (ko) | 2001-06-29 | 2004-01-16 | 삼성전자주식회사 | 양면 실장형 회로 기판 및 이를 포함하는 멀티 칩 패키지 |
| DE10139085A1 (de) | 2001-08-16 | 2003-05-22 | Infineon Technologies Ag | Leiterplattensystem, Verfahren zum Betreiben eines Leiterplattensystems, Leiterplatteneinrichtung und deren Verwendung, und Halbleitervorrichtung und deren Verwendung |
| KR100454123B1 (ko) | 2001-12-06 | 2004-10-26 | 삼성전자주식회사 | 반도체 집적 회로 장치 및 그것을 구비한 모듈 |
| US6692987B2 (en) | 2001-12-12 | 2004-02-17 | Micron Technology, Inc. | BOC BGA package for die with I-shaped bond pad layout |
| SG118103A1 (en) | 2001-12-12 | 2006-01-27 | Micron Technology Inc | BOC BGA package for die with I-shaped bond pad layout |
| US6686819B2 (en) | 2002-02-01 | 2004-02-03 | Intel Corporation | Dual referenced microstrip |
| US6982485B1 (en) | 2002-02-13 | 2006-01-03 | Amkor Technology, Inc. | Stacking structure for semiconductor chips and a semiconductor package using it |
| US7109588B2 (en) | 2002-04-04 | 2006-09-19 | Micron Technology, Inc. | Method and apparatus for attaching microelectronic substrates and support members |
| KR100460063B1 (ko) | 2002-05-03 | 2004-12-04 | 주식회사 하이닉스반도체 | 센터 패드 칩 적층 볼 그리드 어레이 패키지 및 그 제조방법 |
| US6906415B2 (en) | 2002-06-27 | 2005-06-14 | Micron Technology, Inc. | Semiconductor device assemblies and packages including multiple semiconductor devices and methods |
| JP2004063767A (ja) | 2002-07-29 | 2004-02-26 | Renesas Technology Corp | 半導体装置 |
| DE10234951B4 (de) * | 2002-07-31 | 2009-01-02 | Qimonda Ag | Verfahren zur Herstellung von Halbleiterschaltungsmodulen |
| US6765288B2 (en) | 2002-08-05 | 2004-07-20 | Tessera, Inc. | Microelectronic adaptors, assemblies and methods |
| JP4221238B2 (ja) | 2002-09-26 | 2009-02-12 | エルピーダメモリ株式会社 | メモリモジュール |
| JP2004128155A (ja) | 2002-10-01 | 2004-04-22 | Renesas Technology Corp | 半導体パッケージ |
| TWI221664B (en) | 2002-11-07 | 2004-10-01 | Via Tech Inc | Structure of chip package and process thereof |
| US7550842B2 (en) | 2002-12-12 | 2009-06-23 | Formfactor, Inc. | Integrated circuit assembly |
| JP2004221215A (ja) | 2003-01-14 | 2004-08-05 | Renesas Technology Corp | 半導体装置 |
| US6876088B2 (en) | 2003-01-16 | 2005-04-05 | International Business Machines Corporation | Flex-based IC package construction employing a balanced lamination |
| US6879028B2 (en) | 2003-02-21 | 2005-04-12 | Freescale Semiconductor, Inc. | Multi-die semiconductor package |
| JP4072505B2 (ja) | 2003-02-28 | 2008-04-09 | エルピーダメモリ株式会社 | 積層型半導体パッケージ |
| TW200419752A (en) | 2003-03-18 | 2004-10-01 | United Test Ct Inc | Semiconductor package with heat sink |
| JP4046026B2 (ja) | 2003-06-27 | 2008-02-13 | 株式会社日立製作所 | 半導体装置 |
| US7145226B2 (en) | 2003-06-30 | 2006-12-05 | Intel Corporation | Scalable microelectronic package using conductive risers |
| US7183643B2 (en) | 2003-11-04 | 2007-02-27 | Tessera, Inc. | Stacked packages and systems incorporating the same |
| US7061121B2 (en) | 2003-11-12 | 2006-06-13 | Tessera, Inc. | Stacked microelectronic assemblies with central contacts |
| US7989940B2 (en) | 2003-12-19 | 2011-08-02 | Tessera, Inc. | System and method for increasing the number of IO-s on a ball grid package by wire bond stacking of same size packages through apertures |
| US7262507B2 (en) | 2003-12-26 | 2007-08-28 | Nec Electronics Corporation | Semiconductor-mounted device and method for producing same |
| US7181584B2 (en) | 2004-02-05 | 2007-02-20 | Micron Technology, Inc. | Dynamic command and/or address mirroring system and method for memory modules |
| JP4647243B2 (ja) | 2004-05-24 | 2011-03-09 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP4543755B2 (ja) * | 2004-05-31 | 2010-09-15 | パナソニック株式会社 | 半導体集積回路 |
| KR20050119414A (ko) | 2004-06-16 | 2005-12-21 | 삼성전자주식회사 | 에지 패드형 반도체 칩의 스택 패키지 및 그 제조방법 |
| US7260691B2 (en) | 2004-06-30 | 2007-08-21 | Intel Corporation | Apparatus and method for initialization of a double-sided DIMM having at least one pair of mirrored pins |
| JP4865197B2 (ja) | 2004-06-30 | 2012-02-01 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
| JP4058642B2 (ja) | 2004-08-23 | 2008-03-12 | セイコーエプソン株式会社 | 半導体装置 |
| US6943057B1 (en) | 2004-08-31 | 2005-09-13 | Stats Chippac Ltd. | Multichip module package and fabrication method |
| US7324352B2 (en) | 2004-09-03 | 2008-01-29 | Staktek Group L.P. | High capacity thin module system and method |
| US20060081983A1 (en) | 2004-10-14 | 2006-04-20 | Giles Humpston | Wafer level microelectronic packaging with double isolation |
| TWI256092B (en) | 2004-12-02 | 2006-06-01 | Siliconware Precision Industries Co Ltd | Semiconductor package and fabrication method thereof |
| JP2006172122A (ja) | 2004-12-15 | 2006-06-29 | Toshiba Corp | カード状記憶装置 |
| KR100615606B1 (ko) | 2005-03-15 | 2006-08-25 | 삼성전자주식회사 | 메모리 모듈 및 이 모듈의 신호 라인 배치 방법 |
| JP4707446B2 (ja) * | 2005-04-26 | 2011-06-22 | 富士通セミコンダクター株式会社 | 半導体装置 |
| KR101070913B1 (ko) | 2005-05-19 | 2011-10-06 | 삼성테크윈 주식회사 | 반도체 칩 적층 패키지 |
| US7414312B2 (en) | 2005-05-24 | 2008-08-19 | Kingston Technology Corp. | Memory-module board layout for use with memory chips of different data widths |
| US7402911B2 (en) | 2005-06-28 | 2008-07-22 | Infineon Technologies Ag | Multi-chip device and method for producing a multi-chip device |
| US7414917B2 (en) | 2005-07-29 | 2008-08-19 | Infineon Technologies | Re-driving CAwD and rD signal lines |
| US7372169B2 (en) | 2005-10-11 | 2008-05-13 | Via Technologies, Inc. | Arrangement of conductive pads on grid array package and on circuit board |
| JP4906047B2 (ja) | 2005-11-28 | 2012-03-28 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| TWI279897B (en) | 2005-12-23 | 2007-04-21 | Phoenix Prec Technology Corp | Embedded semiconductor chip structure and method for fabricating the same |
| US20080185705A1 (en) | 2005-12-23 | 2008-08-07 | Tessera, Inc. | Microelectronic packages and methods therefor |
| US20070187836A1 (en) | 2006-02-15 | 2007-08-16 | Texas Instruments Incorporated | Package on package design a combination of laminate and tape substrate, with back-to-back die combination |
| US7368319B2 (en) | 2006-03-17 | 2008-05-06 | Stats Chippac Ltd. | Stacked integrated circuit package-in-package system |
| US20070241441A1 (en) | 2006-04-17 | 2007-10-18 | Stats Chippac Ltd. | Multichip package system |
| JP5026736B2 (ja) | 2006-05-15 | 2012-09-19 | パナソニックヘルスケア株式会社 | 冷凍装置 |
| US7535110B2 (en) | 2006-06-15 | 2009-05-19 | Marvell World Trade Ltd. | Stack die packages |
| SG139573A1 (en) | 2006-07-17 | 2008-02-29 | Micron Technology Inc | Microelectronic packages with leadframes, including leadframes configured for stacked die packages, and associated systems and methods |
| DE102006042775B3 (de) | 2006-09-12 | 2008-03-27 | Qimonda Ag | Schaltungsmodul und Verfahren zur Herstellung eines Schaltungsmoduls |
| US7472477B2 (en) | 2006-10-12 | 2009-01-06 | International Business Machines Corporation | Method for manufacturing a socket that compensates for differing coefficients of thermal expansion |
| US20080088030A1 (en) * | 2006-10-16 | 2008-04-17 | Formfactor, Inc. | Attaching and interconnecting dies to a substrate |
| US7719121B2 (en) | 2006-10-17 | 2010-05-18 | Tessera, Inc. | Microelectronic packages and methods therefor |
| US7870459B2 (en) | 2006-10-23 | 2011-01-11 | International Business Machines Corporation | High density high reliability memory module with power gating and a fault tolerant address and command bus |
| US7692278B2 (en) | 2006-12-20 | 2010-04-06 | Intel Corporation | Stacked-die packages with silicon vias and surface activated bonding |
| US7518226B2 (en) | 2007-02-06 | 2009-04-14 | Stats Chippac Ltd. | Integrated circuit packaging system with interposer |
| JP2008198841A (ja) | 2007-02-14 | 2008-08-28 | Elpida Memory Inc | 半導体装置 |
| JP4751351B2 (ja) | 2007-02-20 | 2011-08-17 | 株式会社東芝 | 半導体装置とそれを用いた半導体モジュール |
| JP4913640B2 (ja) | 2007-03-19 | 2012-04-11 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US7696629B2 (en) | 2007-04-30 | 2010-04-13 | Chipmos Technology Inc. | Chip-stacked package structure |
| US7906853B2 (en) | 2007-09-06 | 2011-03-15 | Micron Technology, Inc. | Package structure for multiple die stack |
| KR20090043898A (ko) | 2007-10-30 | 2009-05-07 | 삼성전자주식회사 | 스택 패키지 및 그 제조 방법, 및 스택 패키지를 포함하는카드 및 시스템 |
| US9460951B2 (en) | 2007-12-03 | 2016-10-04 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of wafer level package integration |
| JP5207868B2 (ja) | 2008-02-08 | 2013-06-12 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| TWM338433U (en) | 2008-02-14 | 2008-08-11 | Orient Semiconductor Elect Ltd | Multi-chip package structure |
| JP2009200101A (ja) | 2008-02-19 | 2009-09-03 | Liquid Design Systems:Kk | 半導体チップ及び半導体装置 |
| US8228679B2 (en) | 2008-04-02 | 2012-07-24 | Spansion Llc | Connections for electronic devices on double-sided circuit board |
| TWI362732B (en) | 2008-04-07 | 2012-04-21 | Nanya Technology Corp | Multi-chip stack package |
| US7838975B2 (en) | 2008-05-27 | 2010-11-23 | Mediatek Inc. | Flip-chip package with fan-out WLCSP |
| US7745920B2 (en) | 2008-06-10 | 2010-06-29 | Micron Technology, Inc. | Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices |
| US8276269B2 (en) | 2008-06-20 | 2012-10-02 | Intel Corporation | Dual epoxy dielectric and photosensitive solder mask coatings, and processes of making same |
| JP2010056139A (ja) | 2008-08-26 | 2010-03-11 | Toshiba Corp | 積層型半導体装置 |
| JP5056718B2 (ja) | 2008-10-16 | 2012-10-24 | 株式会社デンソー | 電子装置の製造方法 |
| KR20100046760A (ko) | 2008-10-28 | 2010-05-07 | 삼성전자주식회사 | 반도체 패키지 |
| US7839163B2 (en) | 2009-01-22 | 2010-11-23 | International Business Machines Corporation | Programmable through silicon via |
| TWI401785B (zh) | 2009-03-27 | 2013-07-11 | 南茂科技股份有限公司 | 多晶片堆疊封裝 |
| EP2419971A4 (en) | 2009-04-17 | 2013-03-27 | Hewlett Packard Co | METHOD AND SYSTEM FOR REDUCING LENGTH AND TRACE CAPACITY IN IMPORTANT MEMORY FOOTPRINT |
| KR101601847B1 (ko) | 2009-05-21 | 2016-03-09 | 삼성전자주식회사 | 반도체 패키지 |
| JP2010278318A (ja) | 2009-05-29 | 2010-12-09 | Renesas Electronics Corp | 半導体装置 |
| JP5635247B2 (ja) | 2009-08-20 | 2014-12-03 | 富士通株式会社 | マルチチップモジュール |
| US8907457B2 (en) | 2010-02-08 | 2014-12-09 | Micron Technology, Inc. | Microelectronic devices with through-substrate interconnects and associated methods of manufacturing |
| US8395195B2 (en) | 2010-02-09 | 2013-03-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bottom-notched SiGe FinFET formation using condensation |
| US8796135B2 (en) | 2010-07-23 | 2014-08-05 | Tessera, Inc. | Microelectronic elements with rear contacts connected with via first or via middle structures |
| US8847376B2 (en) | 2010-07-23 | 2014-09-30 | Tessera, Inc. | Microelectronic elements with post-assembly planarization |
| JP4979097B2 (ja) * | 2010-12-06 | 2012-07-18 | ルネサスエレクトロニクス株式会社 | マルチチップモジュール |
| US8502390B2 (en) * | 2011-07-12 | 2013-08-06 | Tessera, Inc. | De-skewed multi-die packages |
-
2011
- 2011-11-29 US US13/306,068 patent/US8502390B2/en not_active Expired - Fee Related
-
2012
- 2012-07-10 WO PCT/US2012/046049 patent/WO2013009741A1/en not_active Ceased
- 2012-07-10 JP JP2014520247A patent/JP2014521221A/ja active Pending
- 2012-07-10 CN CN201280043482.8A patent/CN103782383B/zh not_active Expired - Fee Related
- 2012-07-10 KR KR1020147003469A patent/KR102015931B1/ko not_active Expired - Fee Related
- 2012-07-10 EP EP12741420.9A patent/EP2732466A1/en not_active Withdrawn
- 2012-07-12 TW TW101125197A patent/TWI470764B/zh not_active IP Right Cessation
-
2013
- 2013-07-25 US US13/950,912 patent/US8759982B2/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS641257B2 (https=) * | 1980-01-30 | 1989-01-11 | Tokai Rubber Ind Ltd | |
| US5777391A (en) * | 1994-12-20 | 1998-07-07 | Hitachi, Ltd. | Semiconductor device having an improved connection arrangement between a semiconductor pellet and base substrate electrodes and a method of manufacture thereof |
| TW312044B (en) * | 1996-02-23 | 1997-08-01 | Mitsubishi Electric Corp | The semiconductor package |
| US6894381B2 (en) * | 2002-12-17 | 2005-05-17 | Infineon Technologies Ag | Electronic device having a stack of semiconductor chips and method for the production thereof |
| KR20070088177A (ko) * | 2006-02-24 | 2007-08-29 | 삼성테크윈 주식회사 | 반도체 패키지 및 그 제조 방법 |
| TW200901194A (en) * | 2007-02-16 | 2009-01-01 | Mosaid Technologies Inc | Clock mode determination in a memory system |
Also Published As
| Publication number | Publication date |
|---|---|
| US20130307138A1 (en) | 2013-11-21 |
| TW201310605A (zh) | 2013-03-01 |
| KR20140057544A (ko) | 2014-05-13 |
| CN103782383A (zh) | 2014-05-07 |
| US8502390B2 (en) | 2013-08-06 |
| US20130015586A1 (en) | 2013-01-17 |
| EP2732466A1 (en) | 2014-05-21 |
| KR102015931B1 (ko) | 2019-08-29 |
| WO2013009741A9 (en) | 2013-03-07 |
| WO2013009741A1 (en) | 2013-01-17 |
| US8759982B2 (en) | 2014-06-24 |
| CN103782383B (zh) | 2017-02-15 |
| JP2014521221A (ja) | 2014-08-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI470764B (zh) | 抗扭斜多晶粒封裝 | |
| US8436457B2 (en) | Stub minimization for multi-die wirebond assemblies with parallel windows | |
| US8345441B1 (en) | Stub minimization for multi-die wirebond assemblies with parallel windows | |
| US9633975B2 (en) | Multi-die wirebond packages with elongated windows | |
| US9508629B2 (en) | Memory module in a package | |
| US8441111B2 (en) | Stub minimization for multi-die wirebond assemblies with parallel windows | |
| US9423824B2 (en) | Stub minimization for multi-die wirebond assemblies with parallel windows | |
| US8513817B2 (en) | Memory module in a package | |
| US9214455B2 (en) | Stub minimization with terminal grids offset from center of package | |
| KR101737591B1 (ko) | 공동-지원을 갖는 마이크로전자 패키지 및 마이크로전자 조립체 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |