PL3629123T3 - Moduł pamięci z lokalną synchronizacją - Google Patents

Moduł pamięci z lokalną synchronizacją

Info

Publication number
PL3629123T3
PL3629123T3 PL19159900T PL19159900T PL3629123T3 PL 3629123 T3 PL3629123 T3 PL 3629123T3 PL 19159900 T PL19159900 T PL 19159900T PL 19159900 T PL19159900 T PL 19159900T PL 3629123 T3 PL3629123 T3 PL 3629123T3
Authority
PL
Poland
Prior art keywords
memory module
local synchronization
synchronization
local
module
Prior art date
Application number
PL19159900T
Other languages
English (en)
Inventor
Hyun Lee
Jayesh R. Bhakta
Original Assignee
Netlist, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Netlist, Inc. filed Critical Netlist, Inc.
Publication of PL3629123T3 publication Critical patent/PL3629123T3/pl

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/04—Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/023—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in clock generator or timing circuitry
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1066—Output synchronization
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1093—Input synchronization
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G06F13/4243—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with synchronous protocol
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4247—Bus transfer protocol, e.g. handshake; Synchronisation on a daisy chain bus
    • G06F13/4256—Bus transfer protocol, e.g. handshake; Synchronisation on a daisy chain bus using a clocked protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
PL19159900T 2013-07-27 2014-07-28 Moduł pamięci z lokalną synchronizacją PL3629123T3 (pl)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201361859215P 2013-07-27 2013-07-27
EP19159900.0A EP3629123B1 (en) 2013-07-27 2014-07-28 Memory module with local synchronization
PCT/US2014/048517 WO2015017356A1 (en) 2013-07-27 2014-07-28 Memory module with local synchronization
EP14831654.0A EP3028153B1 (en) 2013-07-27 2014-07-28 Memory module with local synchronization

Publications (1)

Publication Number Publication Date
PL3629123T3 true PL3629123T3 (pl) 2021-08-16

Family

ID=52432365

Family Applications (1)

Application Number Title Priority Date Filing Date
PL19159900T PL3629123T3 (pl) 2013-07-27 2014-07-28 Moduł pamięci z lokalną synchronizacją

Country Status (6)

Country Link
US (4) US10324841B2 (pl)
EP (2) EP3028153B1 (pl)
KR (1) KR20160038034A (pl)
CN (2) CN105706064B (pl)
PL (1) PL3629123T3 (pl)
WO (1) WO2015017356A1 (pl)

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US10522209B2 (en) * 2013-11-13 2019-12-31 Hewlett Packard Enterprise Development Lp Non-binary rank multiplication of memory module
KR102536657B1 (ko) * 2016-07-12 2023-05-30 에스케이하이닉스 주식회사 반도체 장치 및 반도체 시스템
CN106533869B (zh) * 2016-11-08 2020-10-20 北京飞利信电子技术有限公司 数据转发方法及装置、电子设备
KR102302087B1 (ko) * 2016-11-18 2021-09-15 삼성전자주식회사 메모리 시스템의 인터페이스 방법, 이를 수행하는 인터페이스 회로 및 메모리 모듈
KR102368966B1 (ko) * 2017-10-23 2022-03-03 삼성전자주식회사 불휘발성 메모리 장치, 불휘발성 메모리 장치들을 포함하는 스토리지 장치, 그리고 제어기와 불휘발성 메모리 장치들 사이에서 데이터 입력 및 출력 라인들을 트레이닝하는 방법
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CN112151087B (zh) * 2019-06-28 2023-11-24 深圳市金邦科技发展有限公司 一种阻抗变换网络及包括阻抗变换网络的内存模块
US11513725B2 (en) * 2019-09-16 2022-11-29 Netlist, Inc. Hybrid memory module having a volatile memory subsystem and a module controller sourcing read strobes to accompany read data from the volatile memory subsystem
KR20210034726A (ko) * 2019-09-20 2021-03-31 삼성전자주식회사 메모리 모듈, 그것을 제어하는 메모리 제어기의 에러 정정 방법, 및 그것을포함하는 컴퓨팅 시스템
KR20210069514A (ko) * 2019-12-03 2021-06-11 에스케이하이닉스 주식회사 메모리 시스템 및 메모리 시스템의 트레이닝 방법
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US10884923B2 (en) 2021-01-05
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