IT1089225B - Memoria con dispositivo rivelatore e correttore a intervento selettivo - Google Patents

Memoria con dispositivo rivelatore e correttore a intervento selettivo

Info

Publication number
IT1089225B
IT1089225B IT31170/77A IT3117077A IT1089225B IT 1089225 B IT1089225 B IT 1089225B IT 31170/77 A IT31170/77 A IT 31170/77A IT 3117077 A IT3117077 A IT 3117077A IT 1089225 B IT1089225 B IT 1089225B
Authority
IT
Italy
Prior art keywords
corrector
memory
detector device
selective intervention
intervention
Prior art date
Application number
IT31170/77A
Other languages
English (en)
Inventor
Calogero Mantellina
Alessandro Scotti
Claudio Gentili
Original Assignee
Honeywell Inf Systems
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Inf Systems filed Critical Honeywell Inf Systems
Priority to IT31170/77A priority Critical patent/IT1089225B/it
Priority to DE19782854748 priority patent/DE2854748A1/de
Priority to JP15812778A priority patent/JPS5496936A/ja
Priority to GB7849588A priority patent/GB2034942B/en
Priority to FR7836050A priority patent/FR2412885B1/fr
Priority to AU42759/78A priority patent/AU520615B2/en
Priority to US05/973,448 priority patent/US4249253A/en
Priority to CA318,643A priority patent/CA1109159A/en
Application granted granted Critical
Publication of IT1089225B publication Critical patent/IT1089225B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • G06F11/1052—Bypassing or disabling error detection or correction

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Detection And Correction Of Errors (AREA)
  • Debugging And Monitoring (AREA)
IT31170/77A 1977-12-23 1977-12-23 Memoria con dispositivo rivelatore e correttore a intervento selettivo IT1089225B (it)

Priority Applications (8)

Application Number Priority Date Filing Date Title
IT31170/77A IT1089225B (it) 1977-12-23 1977-12-23 Memoria con dispositivo rivelatore e correttore a intervento selettivo
DE19782854748 DE2854748A1 (de) 1977-12-23 1978-12-19 Speichereinrichtung
JP15812778A JPS5496936A (en) 1977-12-23 1978-12-21 Data processing memory
GB7849588A GB2034942B (en) 1977-12-23 1978-12-21 Errorcorrecting memory
FR7836050A FR2412885B1 (fr) 1977-12-23 1978-12-21 Memoire munie d'un dispositif detecteur et correcteur d'erreurs a intervention selective
AU42759/78A AU520615B2 (en) 1977-12-23 1978-12-21 Memory with error checking and correcting device with selective intervention
US05/973,448 US4249253A (en) 1977-12-23 1978-12-26 Memory with selective intervention error checking and correcting device
CA318,643A CA1109159A (en) 1977-12-23 1978-12-27 Memory with error checking and correcting device with selective intervention

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT31170/77A IT1089225B (it) 1977-12-23 1977-12-23 Memoria con dispositivo rivelatore e correttore a intervento selettivo

Publications (1)

Publication Number Publication Date
IT1089225B true IT1089225B (it) 1985-06-18

Family

ID=11233213

Family Applications (1)

Application Number Title Priority Date Filing Date
IT31170/77A IT1089225B (it) 1977-12-23 1977-12-23 Memoria con dispositivo rivelatore e correttore a intervento selettivo

Country Status (8)

Country Link
US (1) US4249253A (it)
JP (1) JPS5496936A (it)
AU (1) AU520615B2 (it)
CA (1) CA1109159A (it)
DE (1) DE2854748A1 (it)
FR (1) FR2412885B1 (it)
GB (1) GB2034942B (it)
IT (1) IT1089225B (it)

Families Citing this family (50)

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DE2915159A1 (de) * 1978-08-04 1980-02-21 Honeywell Inf Systems Verfahren und vorrichtung zur fehlerkorrektur bei datenverarbeitungssystemen
US4336611A (en) * 1979-12-03 1982-06-22 Honeywell Information Systems Inc. Error correction apparatus and method
US4359771A (en) * 1980-07-25 1982-11-16 Honeywell Information Systems Inc. Method and apparatus for testing and verifying the operation of error control apparatus within a memory
JPS5750307A (en) * 1980-09-05 1982-03-24 Sony Corp Time base correcting device
US4384353A (en) * 1981-02-19 1983-05-17 Fairchild Camera And Instrument Corp. Method and means for internal error check in a digital memory
JPS5823395A (ja) * 1981-07-31 1983-02-12 Fujitsu Ltd デ−タ記憶装置誤り制御方式
US4455655A (en) * 1981-09-28 1984-06-19 Hewlett-Packard Company Real time fault tolerant error correction mechanism
JPS595497A (ja) * 1982-07-02 1984-01-12 Hitachi Ltd 半導体ｒｏｍ
JPS59117800A (ja) * 1982-12-25 1984-07-07 Fujitsu Ltd バツフア・ストレ−ジの１ビツトエラ−処理方式
JPS6050669A (ja) * 1983-08-29 1985-03-20 Hitachi Ltd デ−タ復調方式
IT1206331B (it) * 1983-10-25 1989-04-14 Honeywell Inf Systems Architettura di sistema di elaborazione dati.
US4604750A (en) * 1983-11-07 1986-08-05 Digital Equipment Corporation Pipeline error correction
DE3473365D1 (en) * 1984-05-26 1988-09-15 Honeywell Bull Spa Single error correction circuit for system memory
US4646312A (en) * 1984-12-13 1987-02-24 Ncr Corporation Error detection and correction system
JPS61158078A (ja) * 1984-12-28 1986-07-17 Sony Corp 情報再生装置
JPS61217999A (ja) * 1985-03-25 1986-09-27 Toshiba Corp 半導体メモリ
JP2865692B2 (ja) * 1989-02-22 1999-03-08 株式会社日立製作所 スイッチングシステム及びその構成方法
US6330240B1 (en) 1987-04-24 2001-12-11 Hitachi, Ltd. ATM cell switching system
US5365519A (en) * 1991-03-05 1994-11-15 Hitachi, Ltd. ATM switch1ng system connectable to I/O links having different transmission rates
USRE36716E (en) * 1987-07-15 2000-05-30 Hitachi, Ltd. Switching system for switching cells having error detection apparatus
USRE36751E (en) * 1987-07-15 2000-06-27 Hitachi, Ltd. ATM switching system connectable to I/O links having different transmission rates
JPH0766340B2 (ja) * 1987-12-25 1995-07-19 松下電器産業株式会社 演算装置
JP2606862B2 (ja) * 1987-12-28 1997-05-07 株式会社東芝 単−エラー検出・訂正方式
US4884271A (en) * 1987-12-28 1989-11-28 International Business Machines Corporation Error checking and correcting for read-modified-write operations
AU628971B2 (en) * 1989-05-22 1992-09-24 Tandem Computers Incorporated Sequential parity correction
JPH04162300A (ja) * 1990-10-26 1992-06-05 Nec Corp 半導体メモリ
GB2250838A (en) * 1990-12-11 1992-06-17 Honda Motor Co Ltd Patching a program stored in ROM
JPH04248642A (ja) * 1991-01-18 1992-09-04 Kenneth W Iobst メモリ集積回路のｐｉｍチップおよびその制御方法
US5906656A (en) * 1991-12-26 1999-05-25 International Business Machines Corporation Method and system for providing actions by way of electronic distributions
US5452429A (en) * 1993-11-17 1995-09-19 International Business Machines Corporation Error correction code on add-on cards for writing portions of data words
US5488691A (en) * 1993-11-17 1996-01-30 International Business Machines Corporation Memory card, computer system and method of operation for differentiating the use of read-modify-write cycles in operating and initializaiton modes
EP0704854B1 (en) * 1994-09-30 1999-12-01 STMicroelectronics S.r.l. Memory device having error detection and correction function, and methods for writing and erasing the memory device
EP0766174B1 (en) * 1995-09-29 2002-05-22 STMicroelectronics S.r.l. Memory device having improved yield and reliability
US5857069A (en) * 1996-12-30 1999-01-05 Lucent Technologies Inc. Technique for recovering defective memory
JP3177207B2 (ja) 1998-01-27 2001-06-18 インターナショナル・ビジネス・マシーンズ・コーポレ−ション リフレッシュ間隔制御装置及び方法、並びにコンピュータ
US8250295B2 (en) 2004-01-05 2012-08-21 Smart Modular Technologies, Inc. Multi-rank memory module that emulates a memory module having a different number of ranks
US7289386B2 (en) 2004-03-05 2007-10-30 Netlist, Inc. Memory module decoder
US7916574B1 (en) 2004-03-05 2011-03-29 Netlist, Inc. Circuit providing load isolation and memory domain translation for memory module
US7490283B2 (en) 2004-05-13 2009-02-10 Sandisk Corporation Pipelined data relocation and improved chip architectures
EP1635261B1 (en) * 2004-09-10 2008-06-11 STMicroelectronics S.r.l. Memory with embedded error correction code circuit
US7120051B2 (en) 2004-12-14 2006-10-10 Sandisk Corporation Pipelined programming of non-volatile memories using early data
US7409473B2 (en) 2004-12-21 2008-08-05 Sandisk Corporation Off-chip data relocation
US7849381B2 (en) 2004-12-21 2010-12-07 Sandisk Corporation Method for copying data in reprogrammable non-volatile memory
JP2009181425A (ja) * 2008-01-31 2009-08-13 Nec Corp メモリモジュール
US8516185B2 (en) 2009-07-16 2013-08-20 Netlist, Inc. System and method utilizing distributed byte-wise buffers on a memory module
US8154901B1 (en) 2008-04-14 2012-04-10 Netlist, Inc. Circuit providing load isolation and noise reduction
US9128632B2 (en) 2009-07-16 2015-09-08 Netlist, Inc. Memory module with distributed data buffers and method of operation
WO2012061633A2 (en) 2010-11-03 2012-05-10 Netlist, Inc. Method and apparatus for optimizing driver load in a memory package
CN109065096A (zh) * 2012-12-21 2018-12-21 慧与发展有限责任合伙企业 具有错误校正逻辑的存储模块
US10324841B2 (en) 2013-07-27 2019-06-18 Netlist, Inc. Memory module with local synchronization

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5232544B2 (it) * 1971-12-07 1977-08-22
US3809884A (en) * 1972-11-15 1974-05-07 Honeywell Inf Systems Apparatus and method for a variable memory cycle in a data processing unit
US3814922A (en) * 1972-12-01 1974-06-04 Honeywell Inf Systems Availability and diagnostic apparatus for memory modules
JPS5339293B2 (it) * 1974-12-26 1978-10-20
US3949208A (en) * 1974-12-31 1976-04-06 International Business Machines Corporation Apparatus for detecting and correcting errors in an encoded memory word
US4045779A (en) * 1976-03-15 1977-08-30 Xerox Corporation Self-correcting memory circuit
US4077565A (en) * 1976-09-29 1978-03-07 Honeywell Information Systems Inc. Error detection and correction locator circuits
US4058851A (en) * 1976-10-18 1977-11-15 Sperry Rand Corporation Conditional bypass of error correction for dual memory access time selection

Also Published As

Publication number Publication date
US4249253A (en) 1981-02-03
JPS6321223B2 (it) 1988-05-06
AU520615B2 (en) 1982-02-11
JPS5496936A (en) 1979-07-31
CA1109159A (en) 1981-09-15
FR2412885B1 (fr) 1986-03-14
DE2854748A1 (de) 1979-06-28
GB2034942B (en) 1982-06-16
GB2034942A (en) 1980-06-11
FR2412885A1 (fr) 1979-07-20
AU4275978A (en) 1979-06-28

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