KR970013226A - 금속 플로그로서 형성된 다층 배선을 갖는 반도체 장치 및 그 제조 - Google Patents

금속 플로그로서 형성된 다층 배선을 갖는 반도체 장치 및 그 제조

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Publication number
KR970013226A
KR970013226A KR1019950033916A KR19960033916A KR970013226A KR 970013226 A KR970013226 A KR 970013226A KR 1019950033916 A KR1019950033916 A KR 1019950033916A KR 19960033916 A KR19960033916 A KR 19960033916A KR 970013226 A KR970013226 A KR 970013226A
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South Korea
Prior art keywords
metal
contact
forming
semiconductor device
insulating layer
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KR1019950033916A
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English (en)
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KR100448959B1 (ko
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미찌오 마노
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이데이 노부유끼
소니 가부시끼가이샤
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Publication of KR970013226A publication Critical patent/KR970013226A/ko
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Publication of KR100448959B1 publication Critical patent/KR100448959B1/ko

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76895—Local interconnects; Local pads, as exemplified by patent document EP0896365
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226—Via connections in a multilevel interconnection structure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Memories (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

트랜지스터 형성 후에, 제1 층간 절연막을 형성하고, 이 제1 층간 절연막을 관통하는 컨택트 내에 밀착층으로 되는 제1 금속 형성 후에, 제2 금속에 의해 매립한 후 제1 금속으로 국부 배선용 패턴을 형성하며, 그런 후 제2 층간 절연층을 형성하고, 상기 제2 금속에 이르는 컨택트를 개구하며, 상층의 배선 패턴과 상기 제2 금속을 접속하는 반도체 장치 및 그 제조 방법.

Description

금속 플로그로서 형성된 다층 배선을 갖는 반도체 장치 및 그 제조
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
도1 은 완전 CMOS형 SRAM의 평면 패턴도의 참고예를 도시한 도면.

Claims (8)

  1. 반도체 기판에 형성된 트랜지스터; 상기 트랜지스터상에 형성된 제1 층간 절연막; 상기 제1 층간 절연막을 관통하는, 제1 컨택트를 통하여 상기 트랜지스터와 접속하는 제1 배선 패턴; 상기 제1 배선패턴에 접하여 상기 제1 배선 패턴상에 형성된 제2 층간 절연막; 및 상기 제2 층간 절연막을 관통하는, 제2 컨택트를 통하여 상기 제1 배선 패턴과 접속하는 제2 배선 패턴으로 이루어지고, 상기 제1 컨택트 및 상기 제2 컨택트는 내부가 금속으로 매립된 것을 특징으로 하는 반도체 장치.
  2. 제1항에 있어서, 상기 반도체 장치가 제1 도전형의 절연 게이트 전계 효과 트랜지스터; 상기 제1 도전형과는 도전형이 반대인 제2 도전형의 절연 게이트 전계 효과 트랜지스터로 이루어지는 것을 특징으로 하는 반도체 장치.
  3. 제1항에 있어서, 상기 제1 컨택트는 반도체 기판에 접속하는 제1 금속; 상기 제1 컨택트 내부를 매립하는 제2 금속에 의해 형성된 것을 특징으로 하는 반도체 장치.
  4. 제3항에 있어서, 상기 제1 금속은 티탄 혹은 질화 티탄 또는 산질화 티탄 혹은 이들이 적층체인 것을 특징으로 하는 반도체 장치.
  5. 제3항에 있어서, 상기 제1 금속에 의해 상기 트랜지스터 사이가 접속된 것을 특징으로 하는 반도체 장치.
  6. 반도체 기판상에 트랜지스터를 형성한 후, 상기 반도체 기판상에 제1 절연층을 형성하는 공정; 상기 제1절연층에 제1 컨택트 개구부를 형성하는 공정; 상기 개구부 형성후에 제1 금속층을 형성하는 공정; 상기 제1컨택트 내부를 제2 금속으로 비립하는 공정; 및 상기 제1 금속을 패터닝하는 공정으로 이루어지는 것을 특징으로 하는 반도체 장치의 제조 방법.
  7. 반도체 기판상에 트랜지스터를 형성한 후, 상기 반도체 기판상에 제1 절연층을 형성하는 공정; 상기 제1절연층에 제1 컨택트 개구부를 형성하는 공정; 상기 개구부 형성 후에, 제1 금속층을 형성하는 공정; 상기 제1컨택트 내부를 제2 금속으로 매립하는 공정; 상기 제1 금속을 패터닝하는 공정; 상기 제1 금속에 접하여 제2절연층을 형성하는 공정; 및 상기 제2 절연층에 제2 컨택트 개구부를 형성하는 공정으로 이루어진 것을 특징으로 하는 반도체 장치의 제조 방법.
  8. 제7항에 있어서, 상기 제1 금속은 티탄 혹은 질화 티탄 혹은 이들이 적층체인 것을 특징으로 하는 반도체 장치의 제조 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019960033916A 1995-08-17 1996-08-16 금속플러그에의해형성된국소배선을갖는반도체장치및그제조방법 KR100448959B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP95-209796 1995-08-17
JP95209796 1995-08-17
JP7209796A JPH0955440A (ja) 1995-08-17 1995-08-17 半導体装置及び半導体装置の製造方法

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KR970013226A true KR970013226A (ko) 1997-03-29
KR100448959B1 KR100448959B1 (ko) 2004-11-26

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JPH0955440A (ja) 1997-02-25
US5880020A (en) 1999-03-09
US5814886A (en) 1998-09-29
KR100448959B1 (ko) 2004-11-26

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