KR960042954A - 반도체 장치의 확산장벽용 산화루테늄막 형성방법 - Google Patents

반도체 장치의 확산장벽용 산화루테늄막 형성방법 Download PDF

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Publication number
KR960042954A
KR960042954A KR1019950012306A KR19950012306A KR960042954A KR 960042954 A KR960042954 A KR 960042954A KR 1019950012306 A KR1019950012306 A KR 1019950012306A KR 19950012306 A KR19950012306 A KR 19950012306A KR 960042954 A KR960042954 A KR 960042954A
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diffusion barrier
barrier metal
metal layer
forming
plasma
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KR1019950012306A
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KR0172772B1 (ko
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최경근
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김주용
현대전자산업 주식회사
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Priority to KR1019950012306A priority Critical patent/KR0172772B1/ko
Priority to US08/648,285 priority patent/US5637533A/en
Priority to TW085105771A priority patent/TW301020B/zh
Priority to DE19620022A priority patent/DE19620022C2/de
Priority to CN96108935A priority patent/CN1048819C/zh
Priority to GB9610393A priority patent/GB2300970B/en
Priority to JP8123722A priority patent/JPH08316321A/ja
Publication of KR960042954A publication Critical patent/KR960042954A/ko
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Publication of KR0172772B1 publication Critical patent/KR0172772B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76853Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76855After-treatment introducing at least one additional element into the layer
    • H01L21/76856After-treatment introducing at least one additional element into the layer by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28568Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising transition metals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76843Barrier, adhesion or liner layers formed in openings in a dielectric
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76853Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76855After-treatment introducing at least one additional element into the layer

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

본 발명은 루비듐과 실리콘 계면에서의 실리사이드화를 방지하며, 고온에서도 안정한 산화루비듐막을 제조할 수 있는 반도체 소자의 확산장벽 금속층 형성방법을 제공하는데 그 목적이 있다.
상기 목적을 달성하기 위하여 본 발명은 반도체 소자 제조공정중 실리콘층과 접속되는 금속배선 형성시 배선 물질이 실리콘층으로 확산되는 것을 방지하기 위한 확산장벽 금속층 형성방법에 있어서, 실리콘층과 확산장벽 금속층 계면의 실리사이드화를 방지하기 위해 실리콘층 표면을 플라즈마 처리하는 제1단계; 제1확산장벽 금속층을 형성하는 제2단계; 상기 구조 전체 상부에 산소를 임플란트하는 제3단계; 제2확산장벽 금속층을 형성하는 제4단계를 포함하여 이루어지는 것을 특징으로 한다.

Description

반도체 장치의 확산장벽용 산화루테늄막 형성방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1A도 내지 제1F도는 본 발명의 일실시예에 따른 확산장벽 금속층 형성과정을 나타내는 단면도.

Claims (9)

  1. 반도체 소자 제조공정중 실리콘층과 접속되는 금속배선 형성시 배선 물질이 실리콘층으로 확산되는 것을 방지하기 위한 확산장벽 금속층 형성방법에 있어서, 실리콘층과 확산장벽 금속층 계면의 실리사이드화를 방지하기 위해 실리콘층 표면을 플라즈마 처리하는 제1단계; 제1확산장벽 금속층을 형성하는 제2단계; 상기 구조 전체 상부에 산소를 임플란트하는 제3단계; 제2확산장벽 금속층을 형성하는 제4단계를 포함하여 이루어지는 것을 특징으로 하는 반도체 소자의 확산장벽 금속층 형성방법.
  2. 제1항에 있어서, 상기 제1단계의 플라즈마는 산소(O2) 플라즈마인 것을 특징으로 하는 반도체 소자의 확산장벽 금속층 형성방법.
  3. 제2항에 있어서, 상기 산소 플라즈마는 플라즈마 보조 화학기상증착 반응기에서 50w 이하의 저전력(power)하에서 5내지 50sccm 정도의 소프트 플라즈마 조건으로 형성되는 것을 특징으로 하는 반도체 소자의 확산장벽 금속층 형성방법.
  4. 제1항에 있어서, 상기 제1 및 제2확산장벽 금속층은 루비듐(Ru)층인 것을 특징으로 하는 반도체 소자의 확산장벽 금속층 형성방법.
  5. 제4항에 있어서, 상기 제1확산장벽 금속층은 100A내지 500A 두께로 형성되는 것을 특징으로 하는 반도체 소자의 확산장벽 금속층 형성방법.
  6. 제1항 또는 제4항에 있어서, 제4단계 후 확산장벽 금속층을 산화시키는 제5단계를 더 포함하여 이루어지는 것을 특징으로 하는 반도체 소자의 확산장벽 금속층 형성방법.
  7. 제6항에 있어서, 상기 제5단계는 아르곤 또는 질소/ 산소를 혼합시킨 튜브에서 1 내지 5시간 정도 열처리 함으로써 이루어지는 것을 특징으로 하는 반도체 소자의 확산장벽 금속층 형성방법.
  8. 제7항에 있어서, 상기 튜브에 유입되는 아르곤 또는 질소/산소는 100(sccm)/10(sccm) 내지 2000(sccm)/300(sccm)의 유량비로 유입되는 것을 특징으로 하는 반도체 소자의 확산장벽 금속층 형성방법.
  9. 제8항에 있어서, 상기 튜브 내부의 온도는 400℃ 내지 700℃정도로 유지되는 것을 특징으로 하는 반도체 소자의 확산장벽 금속층 형성방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950012306A 1995-05-17 1995-05-17 반도체 장치의 확산장벽용 산화루테늄막 형성 방법 KR0172772B1 (ko)

Priority Applications (7)

Application Number Priority Date Filing Date Title
KR1019950012306A KR0172772B1 (ko) 1995-05-17 1995-05-17 반도체 장치의 확산장벽용 산화루테늄막 형성 방법
US08/648,285 US5637533A (en) 1995-05-17 1996-05-15 Method for fabricating a diffusion barrier metal layer in a semiconductor device
TW085105771A TW301020B (ko) 1995-05-17 1996-05-16
DE19620022A DE19620022C2 (de) 1995-05-17 1996-05-17 Verfahren zur Herstellung einer Diffusionssperrmetallschicht in einer Halbleitervorrichtung
CN96108935A CN1048819C (zh) 1995-05-17 1996-05-17 在半导体器件中制作阻挡扩散金属层的方法
GB9610393A GB2300970B (en) 1995-05-17 1996-05-17 Semiconductor device and method for fabricating a diffusion barrier metal layertherein
JP8123722A JPH08316321A (ja) 1995-05-17 1996-05-17 半導体装置の拡散障壁膜の形成方法

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KR1019950012306A KR0172772B1 (ko) 1995-05-17 1995-05-17 반도체 장치의 확산장벽용 산화루테늄막 형성 방법

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KR960042954A true KR960042954A (ko) 1996-12-21
KR0172772B1 KR0172772B1 (ko) 1999-03-30

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US (1) US5637533A (ko)
JP (1) JPH08316321A (ko)
KR (1) KR0172772B1 (ko)
CN (1) CN1048819C (ko)
DE (1) DE19620022C2 (ko)
GB (1) GB2300970B (ko)
TW (1) TW301020B (ko)

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DE19620022C2 (de) 2002-09-19
GB2300970A (en) 1996-11-20
KR0172772B1 (ko) 1999-03-30
GB2300970B (en) 1999-10-13
US5637533A (en) 1997-06-10
JPH08316321A (ja) 1996-11-29
TW301020B (ko) 1997-03-21
CN1147145A (zh) 1997-04-09

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