CN1062978C - 半导体器件中制作金属阻挡层的方法 - Google Patents
半导体器件中制作金属阻挡层的方法 Download PDFInfo
- Publication number
- CN1062978C CN1062978C CN95109193A CN95109193A CN1062978C CN 1062978 C CN1062978 C CN 1062978C CN 95109193 A CN95109193 A CN 95109193A CN 95109193 A CN95109193 A CN 95109193A CN 1062978 C CN1062978 C CN 1062978C
- Authority
- CN
- China
- Prior art keywords
- gas
- tino
- film
- metal barrier
- tin film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 230000004888 barrier function Effects 0.000 title claims abstract description 26
- 238000000034 method Methods 0.000 title claims abstract description 25
- 239000004065 semiconductor Substances 0.000 title description 3
- 229910052751 metal Inorganic materials 0.000 claims abstract description 25
- 239000002184 metal Substances 0.000 claims abstract description 25
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims abstract description 19
- 238000009792 diffusion process Methods 0.000 claims abstract description 13
- -1 oxygen ions Chemical class 0.000 claims abstract description 8
- 238000004544 sputter deposition Methods 0.000 claims abstract description 6
- 238000000137 annealing Methods 0.000 claims abstract description 4
- 238000004519 manufacturing process Methods 0.000 claims description 5
- 239000007789 gas Substances 0.000 abstract description 7
- 229910052760 oxygen Inorganic materials 0.000 abstract description 2
- 239000001301 oxygen Substances 0.000 abstract description 2
- 239000012299 nitrogen atmosphere Substances 0.000 abstract 1
- 230000000694 effects Effects 0.000 description 5
- 150000002500 ions Chemical class 0.000 description 5
- 125000004429 atom Chemical group 0.000 description 4
- 125000004430 oxygen atom Chemical group O* 0.000 description 4
- 238000002347 injection Methods 0.000 description 3
- 239000007924 injection Substances 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76861—Post-treatment or after-treatment not introducing additional chemical elements into the layer
- H01L21/76864—Thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76855—After-treatment introducing at least one additional element into the layer
- H01L21/76856—After-treatment introducing at least one additional element into the layer by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76855—After-treatment introducing at least one additional element into the layer
- H01L21/76859—After-treatment introducing at least one additional element into the layer by ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
- H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Plasma & Fusion (AREA)
- Physical Vapour Deposition (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
一种制作TiNO金属阻挡层的方法,该金属阻挡层是在金属层间作为阻止Si原子扩散用的扩散阻挡层,所述方法包括使用Ar和N2气体,通过一个溅射设备制作一TiN膜的步骤,该方法还包括如下步骤:在所述TiN膜上部注入N2O气体;和把所生成的膜层在N2气氛下退火,使氧离子扩散,从而将所述所生成的膜层制成均匀的TiNO膜。
Description
本发明涉及在半导体器件的制作过程中,用于多层间电连接的金属阻挡层的制作方法。特别涉及TiNO结构的扩散金属阻挡层的制作方法。
在制造具有薄结合层的亚微细器件时,通常铝合金与金属阻挡层一起使用以防止结合部尖峰效应及减小接触部位的电阻。
另一方面,为方便起见,金属阻挡层主要由包括Ti/TiN膜的双层结构组成。TiN膜被用作扩散阻挡层以阻断在金属层之间的Si原子的扩散。为了能作到完全阻挡,TiN的构成比例必须是1∶1。
但是现有的溅射设备难于把该比例控制为1∶1。并且TiN膜由于其多孔性而难于有效地阻止原子的扩散。
本发明是基于上述问题而作出的。本发明的目的是提供一种制作TiNO金属阻挡层的方法,该TiNO金属阻挡层比TiN金属阻挡层具有更致密的结构。
为实现该目的,本发明提供一种制作TiNO金属阻挡层的方法,该金属阻挡层是在金属层间作为阻止Si原子扩散用的扩散阻挡层,所述方法包括使用Ar和N2气体,通过一个溅射设备制作一TiN膜的步骤,该方法还包括如下步骤:在所述TiN膜上部注入N2O气体;和把所生成的膜层在N2气氛下退火,使氧离子扩散,从而将所述所生成的膜层制成均匀的TiNO膜。
通过以下结合附图所作的说明,本发明的上述和其它目的、特征和优点将更清楚。
图1A到图1C是说明本发明第一个实施例制作金属阻挡层的方法的横剖视图。
图2A到图2C是说明本发明第二个实施例制作金属阻挡层的方法的横剖视图。
图3A到图3C是说明本发明第三个实施例制作金属阻挡层的方法的横剖视图。
现在参照图1A到图1C、图2A到图2C和图3A到图3C来详述本发明。
图1A到图1C是说明本发明第一个实施例制作金属阻挡层的方法的横剖视图。
首先,如图1A所示,用0~50sccm的Ar气和30~1000sccm N2气,通过溅射设备制作一TiN膜11。
接着,如图1B所示,把5~200sccm的N2O气注入TiN膜11上部,生成比TiN膜结构更致密的TiNO膜12。为了防止因氧原子过多存留在TiNO膜12里使TiN膜11电阻值增大的负效应,此工序分两步进行。
最后,如图1C所示,在温度为200~500℃的N2气氛下退火,使TiNO膜12中多余的氧离子扩散到TiN膜11中。
图2A到图2C是说明本发明的第二个实施例制作金属阻挡层的方法的横剖视图。
首先,如图2A所示,在预制作金属阻挡层的部位上制作一TiN膜21。
其次,如图2B所示,用等离子体增强化学气相沉积法,即PECVD法,在温度为300~500℃的氧气氛下通过等离子体对TiN膜21进行处理,使O-2、O-、O+和O2+离子注入TiN膜21中。此时,由于膜片的温度超过300℃,而且高温对注入的离子提供了激活能量,因而在初始阶段不稳定的TiN膜21就很容易与氧离子结合在一起。
结果,如图2C所示,经以上工序形成了TiNO膜22。
图3A到图3C是说明本发明的第三个实施例制作金属阻挡层的方法的横剖视图。
首先,如图3A所示,制作一个厚度超过300的Ti膜31。
接着,如图3B所示,把氧离子通过一个离子注入系统注入到Ti膜31的表面上。此时,离子的注入要直到氧原子置入Ti膜31中部为止。
最后,如图3C所示,把它在N2气氛下退火,形成具有TiNO结构的扩散阻挡膜层33。
这里,退火过程可在温度超过660℃下以快速加热工艺(RPT)进行,也可以在450℃的炉中进行。当在N2气氛下退火处理时,Ti膜中的一部分氧原子扩散到Ti膜底部,另一部分氧原子扩散入Ti膜表面。结果,形成了具有TiNO结构的金属阻挡层。此时,由于过量的氧离子的存在会使元器件产生负效应,因此这时很重要的一点是控制离子注入量,以便使TiNO膜中氧离子的存留量低于10%。
按本发明的方法所制作的具有TiNO结构的金属阻挡层可以作为扩散阻挡层,因为它有着致密的结构,在它里面的原子不易扩散。
并且,由于起到很好阻挡作用的膜层厚度很薄,所以膜的应力可以减小。另外,也可以获得使亚微细薄层结合处的结合漏电流稳定的作用。
Claims (3)
1.一种制作TiNO金属阻挡层的方法,该金属阻挡层是在金属层间作为阻止Si原子扩散用的扩散阻挡层,所述方法包括使用Ar和N2气体,通过一个溅射设备制作一TiN膜的步骤,
其特征在于,该方法还包括如下步骤:
在所述TiN膜上部注入N2O气体;和
把所生成的膜层在N2气氛下退火,使氧离子扩散,从而将所述所生成的膜层制成均匀的TiNO膜。
2.根据权利要求1所述的方法,其特征在于,注入所述溅射设备中的所述气体包括:0-50sccm Ar气体,30-1000sccm N2气体和5-200sccm N2O气体。
3.根据权利要求2所述的方法,其特征在于,所述退火工序在200-500℃温度下进行。
Applications Claiming Priority (9)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1994-16350 | 1994-07-07 | ||
KR199416350 | 1994-07-07 | ||
KR1019940016350A KR100310468B1 (ko) | 1994-07-07 | 1994-07-07 | 반도체 소자의 장벽금속막 형성방법 |
KR1019940016509A KR970007175B1 (ko) | 1994-07-08 | 1994-07-08 | 반도체 소자의 금속배선 형성방법 |
KR1019940016514A KR960005873A (ko) | 1994-07-08 | 1994-07-08 | 반도체 소자의 금속배선 형성방법 |
KR199416514 | 1994-07-08 | ||
KR199416509 | 1994-07-08 | ||
KR1994-16514 | 1994-07-08 | ||
KR1994-16509 | 1994-07-08 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1115116A CN1115116A (zh) | 1996-01-17 |
CN1062978C true CN1062978C (zh) | 2001-03-07 |
Family
ID=27349082
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN95109193A Expired - Fee Related CN1062978C (zh) | 1994-07-07 | 1995-07-07 | 半导体器件中制作金属阻挡层的方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US5877031A (zh) |
CN (1) | CN1062978C (zh) |
GB (1) | GB2291264B (zh) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR0172772B1 (ko) * | 1995-05-17 | 1999-03-30 | 김주용 | 반도체 장치의 확산장벽용 산화루테늄막 형성 방법 |
US6590913B1 (en) | 1999-05-14 | 2003-07-08 | Triquint Technology Holding Co. | Barrier layer and method of making the same |
DE102009047307B4 (de) * | 2009-11-30 | 2012-10-31 | Globalfoundries Dresden Module One Limited Liability Company & Co. Kg | Verfahren zur Vergrößerung der Stabilität eines Gatedielektrikums mit großem ε in einem Gatestapel mit großem ε durch eine sauerstoffreiche Titannitriddeckschicht |
CN102623389A (zh) * | 2011-01-31 | 2012-08-01 | 北京泰龙电子技术有限公司 | 一种金属氮化物阻挡层的制备方法 |
CN102392216A (zh) * | 2011-11-22 | 2012-03-28 | 南京大学 | 一种高热稳定性双层扩散阻挡层材料的制备方法 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH056865A (ja) * | 1991-06-27 | 1993-01-14 | Sanyo Electric Co Ltd | 半導体装置の製造方法 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63124411A (ja) * | 1986-11-13 | 1988-05-27 | Fujitsu Ltd | 半導体装置の製造方法 |
JPH0226051A (ja) * | 1988-07-14 | 1990-01-29 | Seiko Epson Corp | 半導体装置の製造方法 |
JPH0666287B2 (ja) * | 1988-07-25 | 1994-08-24 | 富士通株式会社 | 半導体装置の製造方法 |
US4968886A (en) * | 1989-08-30 | 1990-11-06 | Texas Instruments Incorporated | Infrared detector and method |
US4987102A (en) * | 1989-12-04 | 1991-01-22 | Motorola, Inc. | Process for forming high purity thin films |
JPH0677216A (ja) * | 1990-09-28 | 1994-03-18 | Applied Materials Inc | 蒸着薄膜の障壁特性を高めるプラズマアニーリング法 |
US5250467A (en) * | 1991-03-29 | 1993-10-05 | Applied Materials, Inc. | Method for forming low resistance and low defect density tungsten contacts to silicon semiconductor wafer |
JP2725919B2 (ja) * | 1991-10-09 | 1998-03-11 | シャープ株式会社 | 半導体装置の製造方法 |
JP2655213B2 (ja) * | 1991-10-14 | 1997-09-17 | 三菱電機株式会社 | 半導体装置の配線接続構造およびその製造方法 |
EP0545602A1 (en) * | 1991-11-26 | 1993-06-09 | STMicroelectronics, Inc. | Method for forming barrier metal layers |
JPH05291177A (ja) * | 1992-04-09 | 1993-11-05 | Sony Corp | 半導体装置の製造方法 |
JPH06110198A (ja) * | 1992-09-28 | 1994-04-22 | Kawasaki Steel Corp | 基板表面の反射率低減方法 |
JPH06268083A (ja) * | 1993-03-11 | 1994-09-22 | Sony Corp | 半導体装置の配線 |
-
1995
- 1995-07-07 GB GB9513938A patent/GB2291264B/en not_active Expired - Fee Related
- 1995-07-07 CN CN95109193A patent/CN1062978C/zh not_active Expired - Fee Related
- 1995-07-07 US US08/499,791 patent/US5877031A/en not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH056865A (ja) * | 1991-06-27 | 1993-01-14 | Sanyo Electric Co Ltd | 半導体装置の製造方法 |
Also Published As
Publication number | Publication date |
---|---|
US5877031A (en) | 1999-03-02 |
GB2291264A (en) | 1996-01-17 |
CN1115116A (zh) | 1996-01-17 |
GB2291264B (en) | 1998-07-29 |
GB9513938D0 (en) | 1995-09-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4584427A (en) | Thin film solar cell with free tin on tin oxide transparent conductor | |
EP0841706B1 (en) | Transparent conductive film of thin-film solar cell and method for producing the transparent conductive film | |
TW495630B (en) | Thin film transistor, a method for producing the thin film transistor, and a liquid crystal display using a array substrate | |
JPH08316321A (ja) | 半導体装置の拡散障壁膜の形成方法 | |
US20100288354A1 (en) | Cadmium stannate tco structure with diffusion barrier layer and separation layer | |
EP0268027A1 (en) | Silicide to silicon bond | |
CN1062978C (zh) | 半导体器件中制作金属阻挡层的方法 | |
US6417042B2 (en) | Method of manufacturing a capacitor in a semiconductor device | |
CN1270362C (zh) | 形成自行对准金属硅化物的方法 | |
US8741687B2 (en) | Photovoltaic device with crystalline layer | |
CN1315178C (zh) | 半导体装置的制造方法 | |
Murakami et al. | Thermally stable ohmic contacts to n‐type GaAs. VII. Addition of Ge or Si to NiInW ohmic contacts | |
JPH01201968A (ja) | 光電変換装置 | |
KR100310468B1 (ko) | 반도체 소자의 장벽금속막 형성방법 | |
KR970007175B1 (ko) | 반도체 소자의 금속배선 형성방법 | |
JP2785482B2 (ja) | 半導体装置の製造方法 | |
KR950008796B1 (ko) | 캐패시터 제조방법 | |
JP3244336B2 (ja) | 強誘電体素子 | |
JP2821631B2 (ja) | シリサイド膜の形成方法 | |
KR0172283B1 (ko) | 반도체 소자의 금속배선 형성방법 | |
JPH01205417A (ja) | 半導体装置の製造方法 | |
JPH05182926A (ja) | 配線形成方法 | |
KR100252871B1 (ko) | 반도체 소자의 박막 형성방법 | |
JPS6248069A (ja) | 半導体装置 | |
DE202019103911U1 (de) | Solarzelle mit dielektrischem Schichtsystem und Beschichtungsanlage zur Herstellung der Solarzelle |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20010307 Termination date: 20130707 |