KR960002078B1 - 반도체메모리의 제조방법 - Google Patents

반도체메모리의 제조방법 Download PDF

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Publication number
KR960002078B1
KR960002078B1 KR1019900022098A KR900022098A KR960002078B1 KR 960002078 B1 KR960002078 B1 KR 960002078B1 KR 1019900022098 A KR1019900022098 A KR 1019900022098A KR 900022098 A KR900022098 A KR 900022098A KR 960002078 B1 KR960002078 B1 KR 960002078B1
Authority
KR
South Korea
Prior art keywords
layer
insulating film
film
contact hole
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1019900022098A
Other languages
English (en)
Korean (ko)
Other versions
KR910013505A (ko
Inventor
다꾸 후지이
나라까주 시모무라
Original Assignee
샤프 가부시끼가이샤
쓰지 하루오
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP1340159A external-priority patent/JP2574910B2/ja
Priority claimed from JP2074639A external-priority patent/JP2547882B2/ja
Application filed by 샤프 가부시끼가이샤, 쓰지 하루오 filed Critical 샤프 가부시끼가이샤
Publication of KR910013505A publication Critical patent/KR910013505A/ko
Application granted granted Critical
Publication of KR960002078B1 publication Critical patent/KR960002078B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto
    • H10B12/033Making the capacitor or connections thereto the capacitor extending over the transistor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/014Capacitor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/109Memory devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Memories (AREA)
KR1019900022098A 1989-12-29 1990-12-28 반도체메모리의 제조방법 Expired - Fee Related KR960002078B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP1-340159 1989-12-29
JP1340159A JP2574910B2 (ja) 1989-12-29 1989-12-29 半導体装置の製造方法
JP2074639A JP2547882B2 (ja) 1990-03-23 1990-03-23 半導体装置の製造方法
JP2-74639 1990-03-23

Publications (2)

Publication Number Publication Date
KR910013505A KR910013505A (ko) 1991-08-08
KR960002078B1 true KR960002078B1 (ko) 1996-02-10

Family

ID=26415810

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900022098A Expired - Fee Related KR960002078B1 (ko) 1989-12-29 1990-12-28 반도체메모리의 제조방법

Country Status (5)

Country Link
US (2) US5118640A (enExample)
EP (1) EP0439965B1 (enExample)
KR (1) KR960002078B1 (enExample)
DE (1) DE69030433T2 (enExample)
TW (1) TW218933B (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE59009067D1 (de) * 1990-04-27 1995-06-14 Siemens Ag Verfahren zur Herstellung einer Öffnung in einem Halbleiterschichtaufbau und dessen Verwendung zur Herstellung von Kontaktlöchern.
JP2524863B2 (ja) * 1990-05-02 1996-08-14 三菱電機株式会社 半導体装置およびその製造方法
US5236860A (en) * 1991-01-04 1993-08-17 Micron Technology, Inc. Lateral extension stacked capacitor
US5231043A (en) * 1991-08-21 1993-07-27 Sgs-Thomson Microelectronics, Inc. Contact alignment for integrated circuits
TW243541B (enExample) * 1991-08-31 1995-03-21 Samsung Electronics Co Ltd
KR960003773B1 (ko) * 1992-08-25 1996-03-22 금성일렉트론주식회사 디램(DRAM) 셀(Cell) 제조방법
US5563089A (en) * 1994-07-20 1996-10-08 Micron Technology, Inc. Method of forming a bit line over capacitor array of memory cells and an array of bit line over capacitor array of memory cells
US5605857A (en) * 1993-02-12 1997-02-25 Micron Technology, Inc. Method of forming a bit line over capacitor array of memory cells and an array of bit line over capacitor array of memory cells
US5840605A (en) * 1993-04-19 1998-11-24 Industrial Technology Research Institute Dual layer polysilicon capacitor node DRAM process
KR100388519B1 (ko) * 1995-02-22 2003-09-19 마이크론 테크놀로지, 인크. 메모리셀의커패시터배열위에비트선을형성하는방법및이를이용한집적회로및반도체메모리장치
WO2001009946A1 (de) * 1999-07-29 2001-02-08 Infineon Technologies Ag Verfahren zur herstellung integrierter halbleiterbauelemente
DE10332600B3 (de) * 2003-07-17 2005-04-14 Infineon Technologies Ag Verfahren zum Herstellen eines elektrisch leitenden Kontaktes
JP4301227B2 (ja) * 2005-09-15 2009-07-22 セイコーエプソン株式会社 電気光学装置及びその製造方法、電子機器並びにコンデンサー

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3986903A (en) * 1974-03-13 1976-10-19 Intel Corporation Mosfet transistor and method of fabrication
US3984822A (en) * 1974-12-30 1976-10-05 Intel Corporation Double polycrystalline silicon gate memory device
US4268951A (en) * 1978-11-13 1981-05-26 Rockwell International Corporation Submicron semiconductor devices
JPS5681968A (en) * 1979-12-07 1981-07-04 Toshiba Corp Manufacture of semiconductor device
US4577392A (en) * 1984-08-03 1986-03-25 Advanced Micro Devices, Inc. Fabrication technique for integrated circuits
JPS6237960A (ja) * 1985-08-13 1987-02-18 Toshiba Corp 読み出し専用半導体記憶装置の製造方法
JPS6286853A (ja) * 1985-10-14 1987-04-21 Fujitsu Ltd 半導体装置の製造方法
DE3609274A1 (de) * 1986-03-19 1987-09-24 Siemens Ag Verfahren zur herstellung eines selbstjustiert positionierten metallkontaktes
JPS63237551A (ja) * 1987-03-26 1988-10-04 Toshiba Corp 半導体装置の製造方法
US4916083A (en) * 1987-05-11 1990-04-10 International Business Machines Corporation High performance sidewall emitter transistor
JPH0834311B2 (ja) * 1987-06-10 1996-03-29 日本電装株式会社 半導体装置の製造方法
JP2612836B2 (ja) * 1987-09-23 1997-05-21 シーメンス、アクチエンゲゼルシヤフト 自己整合ゲートを備えるmesfetの製造方法
US4852062A (en) * 1987-09-28 1989-07-25 Motorola, Inc. EPROM device using asymmetrical transistor characteristics
JPH01129440A (ja) * 1987-11-14 1989-05-22 Fujitsu Ltd 半導体装置
US4977105A (en) * 1988-03-15 1990-12-11 Mitsubishi Denki Kabushiki Kaisha Method for manufacturing interconnection structure in semiconductor device
JP2723530B2 (ja) * 1988-04-13 1998-03-09 日本電気株式会社 ダイナミック型ランダムアクセスメモリ装置の製造方法
JP2695185B2 (ja) * 1988-05-02 1997-12-24 株式会社日立製作所 半導体集積回路装置及びその製造方法
US4951175A (en) * 1988-05-18 1990-08-21 Kabushiki Kaisha Toshiba Semiconductor memory device with stacked capacitor structure and the manufacturing method thereof
JPH0278270A (ja) * 1988-09-14 1990-03-19 Hitachi Ltd 半導体記憶装置及びその製造方法
JP2633650B2 (ja) * 1988-09-30 1997-07-23 株式会社東芝 半導体記憶装置およびその製造方法
JP2904533B2 (ja) * 1989-03-09 1999-06-14 株式会社東芝 半導体装置の製造方法
US4965217A (en) * 1989-04-13 1990-10-23 International Business Machines Corporation Method of making a lateral transistor

Also Published As

Publication number Publication date
US5118640A (en) 1992-06-02
EP0439965B1 (en) 1997-04-09
DE69030433D1 (de) 1997-05-15
TW218933B (enExample) 1994-01-11
US5100828A (en) 1992-03-31
KR910013505A (ko) 1991-08-08
EP0439965A3 (en) 1991-12-04
EP0439965A2 (en) 1991-08-07
DE69030433T2 (de) 1997-10-09

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